1 /* 2 * CDDL HEADER START 3 * 4 * The contents of this file are subject to the terms of the 5 * Common Development and Distribution License (the "License"). 6 * You may not use this file except in compliance with the License. 7 * 8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 9 * or http://www.opensolaris.org/os/licensing. 10 * See the License for the specific language governing permissions 11 * and limitations under the License. 12 * 13 * When distributing Covered Code, include this CDDL HEADER in each 14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 15 * If applicable, add the following below this CDDL HEADER, with the 16 * fields enclosed by brackets "[]" replaced with your own identifying 17 * information: Portions Copyright [yyyy] [name of copyright owner] 18 * 19 * CDDL HEADER END 20 */ 21 /* 22 * Copyright 2007 Sun Microsystems, Inc. All rights reserved. 23 * Use is subject to license terms. 24 */ 25 26 /* Copyright (c) 1984, 1986, 1987, 1988, 1989 AT&T */ 27 /* All Rights Reserved */ 28 29 /* 30 * Portions of this source code were derived from Berkeley 4.3 BSD 31 * under license from the Regents of the University of California. 32 */ 33 34 #pragma ident "%Z%%M% %I% %E% SMI" 35 36 /* 37 * UNIX machine dependent virtual memory support. 38 */ 39 40 #include <sys/vm.h> 41 #include <sys/exec.h> 42 #include <sys/cmn_err.h> 43 #include <sys/cpu_module.h> 44 #include <sys/cpu.h> 45 #include <sys/elf_SPARC.h> 46 #include <sys/archsystm.h> 47 #include <vm/hat_sfmmu.h> 48 #include <sys/memnode.h> 49 #include <sys/mem_cage.h> 50 #include <vm/vm_dep.h> 51 52 #if defined(__sparcv9) && defined(SF_ERRATA_57) 53 caddr_t errata57_limit; 54 #endif 55 56 uint_t page_colors = 0; 57 uint_t page_colors_mask = 0; 58 uint_t page_coloring_shift = 0; 59 int consistent_coloring; 60 int update_proc_pgcolorbase_after_fork = 0; 61 62 uint_t mmu_page_sizes = DEFAULT_MMU_PAGE_SIZES; 63 uint_t max_mmu_page_sizes = MMU_PAGE_SIZES; 64 uint_t mmu_hashcnt = DEFAULT_MAX_HASHCNT; 65 uint_t max_mmu_hashcnt = MAX_HASHCNT; 66 size_t mmu_ism_pagesize = DEFAULT_ISM_PAGESIZE; 67 68 /* 69 * The sun4u hardware mapping sizes which will always be supported are 70 * 8K, 64K, 512K and 4M. If sun4u based machines need to support other 71 * page sizes, platform or cpu specific routines need to modify the value. 72 * The base pagesize (p_szc == 0) must always be supported by the hardware. 73 */ 74 int mmu_exported_pagesize_mask = (1 << TTE8K) | (1 << TTE64K) | 75 (1 << TTE512K) | (1 << TTE4M); 76 uint_t mmu_exported_page_sizes; 77 78 uint_t szc_2_userszc[MMU_PAGE_SIZES]; 79 uint_t userszc_2_szc[MMU_PAGE_SIZES]; 80 81 extern uint_t vac_colors_mask; 82 extern int vac_shift; 83 84 hw_pagesize_t hw_page_array[] = { 85 {MMU_PAGESIZE, MMU_PAGESHIFT, 0, MMU_PAGESIZE >> MMU_PAGESHIFT}, 86 {MMU_PAGESIZE64K, MMU_PAGESHIFT64K, 0, 87 MMU_PAGESIZE64K >> MMU_PAGESHIFT}, 88 {MMU_PAGESIZE512K, MMU_PAGESHIFT512K, 0, 89 MMU_PAGESIZE512K >> MMU_PAGESHIFT}, 90 {MMU_PAGESIZE4M, MMU_PAGESHIFT4M, 0, MMU_PAGESIZE4M >> MMU_PAGESHIFT}, 91 {MMU_PAGESIZE32M, MMU_PAGESHIFT32M, 0, 92 MMU_PAGESIZE32M >> MMU_PAGESHIFT}, 93 {MMU_PAGESIZE256M, MMU_PAGESHIFT256M, 0, 94 MMU_PAGESIZE256M >> MMU_PAGESHIFT}, 95 {0, 0, 0, 0} 96 }; 97 98 /* 99 * Maximum page size used to map 64-bit memory segment kmem64_base..kmem64_end 100 */ 101 int max_bootlp_tteszc = TTE4M; 102 103 /* 104 * use_text_pgsz64k and use_text_pgsz512k allow the user to turn on these 105 * additional text page sizes for USIII-IV+ and OPL by changing the default 106 * values via /etc/system. 107 */ 108 int use_text_pgsz64K = 0; 109 int use_text_pgsz512K = 0; 110 111 /* 112 * Maximum and default segment size tunables for user heap, stack, private 113 * and shared anonymous memory, and user text and initialized data. 114 */ 115 size_t max_uheap_lpsize = MMU_PAGESIZE4M; 116 size_t default_uheap_lpsize = MMU_PAGESIZE; 117 size_t max_ustack_lpsize = MMU_PAGESIZE4M; 118 size_t default_ustack_lpsize = MMU_PAGESIZE; 119 size_t max_privmap_lpsize = MMU_PAGESIZE4M; 120 size_t max_uidata_lpsize = MMU_PAGESIZE; 121 size_t max_utext_lpsize = MMU_PAGESIZE4M; 122 size_t max_shm_lpsize = MMU_PAGESIZE4M; 123 124 void 125 adjust_data_maxlpsize(size_t ismpagesize) 126 { 127 if (max_uheap_lpsize == MMU_PAGESIZE4M) { 128 max_uheap_lpsize = ismpagesize; 129 } 130 if (max_ustack_lpsize == MMU_PAGESIZE4M) { 131 max_ustack_lpsize = ismpagesize; 132 } 133 if (max_privmap_lpsize == MMU_PAGESIZE4M) { 134 max_privmap_lpsize = ismpagesize; 135 } 136 if (max_shm_lpsize == MMU_PAGESIZE4M) { 137 max_shm_lpsize = ismpagesize; 138 } 139 } 140 141 /* 142 * map_addr_proc() is the routine called when the system is to 143 * choose an address for the user. We will pick an address 144 * range which is just below the current stack limit. The 145 * algorithm used for cache consistency on machines with virtual 146 * address caches is such that offset 0 in the vnode is always 147 * on a shm_alignment'ed aligned address. Unfortunately, this 148 * means that vnodes which are demand paged will not be mapped 149 * cache consistently with the executable images. When the 150 * cache alignment for a given object is inconsistent, the 151 * lower level code must manage the translations so that this 152 * is not seen here (at the cost of efficiency, of course). 153 * 154 * addrp is a value/result parameter. 155 * On input it is a hint from the user to be used in a completely 156 * machine dependent fashion. For MAP_ALIGN, addrp contains the 157 * minimal alignment. 158 * 159 * On output it is NULL if no address can be found in the current 160 * processes address space or else an address that is currently 161 * not mapped for len bytes with a page of red zone on either side. 162 * If vacalign is true, then the selected address will obey the alignment 163 * constraints of a vac machine based on the given off value. 164 */ 165 /*ARGSUSED4*/ 166 void 167 map_addr_proc(caddr_t *addrp, size_t len, offset_t off, int vacalign, 168 caddr_t userlimit, struct proc *p, uint_t flags) 169 { 170 struct as *as = p->p_as; 171 caddr_t addr; 172 caddr_t base; 173 size_t slen; 174 uintptr_t align_amount; 175 int allow_largepage_alignment = 1; 176 177 base = p->p_brkbase; 178 if (userlimit < as->a_userlimit) { 179 /* 180 * This happens when a program wants to map something in 181 * a range that's accessible to a program in a smaller 182 * address space. For example, a 64-bit program might 183 * be calling mmap32(2) to guarantee that the returned 184 * address is below 4Gbytes. 185 */ 186 ASSERT(userlimit > base); 187 slen = userlimit - base; 188 } else { 189 slen = p->p_usrstack - base - (((size_t)rctl_enforced_value( 190 rctlproc_legacy[RLIMIT_STACK], p->p_rctls, p) + PAGEOFFSET) 191 & PAGEMASK); 192 } 193 len = (len + PAGEOFFSET) & PAGEMASK; 194 195 /* 196 * Redzone for each side of the request. This is done to leave 197 * one page unmapped between segments. This is not required, but 198 * it's useful for the user because if their program strays across 199 * a segment boundary, it will catch a fault immediately making 200 * debugging a little easier. 201 */ 202 len += (2 * PAGESIZE); 203 204 /* 205 * If the request is larger than the size of a particular 206 * mmu level, then we use that level to map the request. 207 * But this requires that both the virtual and the physical 208 * addresses be aligned with respect to that level, so we 209 * do the virtual bit of nastiness here. 210 * 211 * For 32-bit processes, only those which have specified 212 * MAP_ALIGN or an addr will be aligned on a page size > 4MB. Otherwise 213 * we can potentially waste up to 256MB of the 4G process address 214 * space just for alignment. 215 */ 216 if (p->p_model == DATAMODEL_ILP32 && ((flags & MAP_ALIGN) == 0 || 217 ((uintptr_t)*addrp) != 0)) { 218 allow_largepage_alignment = 0; 219 } 220 if ((mmu_page_sizes == max_mmu_page_sizes) && 221 allow_largepage_alignment && 222 (len >= MMU_PAGESIZE256M)) { /* 256MB mappings */ 223 align_amount = MMU_PAGESIZE256M; 224 } else if ((mmu_page_sizes == max_mmu_page_sizes) && 225 allow_largepage_alignment && 226 (len >= MMU_PAGESIZE32M)) { /* 32MB mappings */ 227 align_amount = MMU_PAGESIZE32M; 228 } else if (len >= MMU_PAGESIZE4M) { /* 4MB mappings */ 229 align_amount = MMU_PAGESIZE4M; 230 } else if (len >= MMU_PAGESIZE512K) { /* 512KB mappings */ 231 align_amount = MMU_PAGESIZE512K; 232 } else if (len >= MMU_PAGESIZE64K) { /* 64KB mappings */ 233 align_amount = MMU_PAGESIZE64K; 234 } else { 235 /* 236 * Align virtual addresses on a 64K boundary to ensure 237 * that ELF shared libraries are mapped with the appropriate 238 * alignment constraints by the run-time linker. 239 */ 240 align_amount = ELF_SPARC_MAXPGSZ; 241 if ((flags & MAP_ALIGN) && ((uintptr_t)*addrp != 0) && 242 ((uintptr_t)*addrp < align_amount)) 243 align_amount = (uintptr_t)*addrp; 244 } 245 246 /* 247 * 64-bit processes require 1024K alignment of ELF shared libraries. 248 */ 249 if (p->p_model == DATAMODEL_LP64) 250 align_amount = MAX(align_amount, ELF_SPARCV9_MAXPGSZ); 251 #ifdef VAC 252 if (vac && vacalign && (align_amount < shm_alignment)) 253 align_amount = shm_alignment; 254 #endif 255 256 if ((flags & MAP_ALIGN) && ((uintptr_t)*addrp > align_amount)) { 257 align_amount = (uintptr_t)*addrp; 258 } 259 len += align_amount; 260 261 /* 262 * Look for a large enough hole starting below the stack limit. 263 * After finding it, use the upper part. Addition of PAGESIZE is 264 * for the redzone as described above. 265 */ 266 as_purge(as); 267 if (as_gap(as, len, &base, &slen, AH_HI, NULL) == 0) { 268 caddr_t as_addr; 269 270 addr = base + slen - len + PAGESIZE; 271 as_addr = addr; 272 /* 273 * Round address DOWN to the alignment amount, 274 * add the offset, and if this address is less 275 * than the original address, add alignment amount. 276 */ 277 addr = (caddr_t)((uintptr_t)addr & (~(align_amount - 1l))); 278 addr += (long)(off & (align_amount - 1l)); 279 if (addr < as_addr) { 280 addr += align_amount; 281 } 282 283 ASSERT(addr <= (as_addr + align_amount)); 284 ASSERT(((uintptr_t)addr & (align_amount - 1l)) == 285 ((uintptr_t)(off & (align_amount - 1l)))); 286 *addrp = addr; 287 288 #if defined(SF_ERRATA_57) 289 if (AS_TYPE_64BIT(as) && addr < errata57_limit) { 290 *addrp = NULL; 291 } 292 #endif 293 } else { 294 *addrp = NULL; /* no more virtual space */ 295 } 296 } 297 298 /* 299 * Platform-dependent page scrub call. 300 */ 301 void 302 pagescrub(page_t *pp, uint_t off, uint_t len) 303 { 304 /* 305 * For now, we rely on the fact that pagezero() will 306 * always clear UEs. 307 */ 308 pagezero(pp, off, len); 309 } 310 311 /*ARGSUSED*/ 312 void 313 sync_data_memory(caddr_t va, size_t len) 314 { 315 cpu_flush_ecache(); 316 } 317 318 /* 319 * platform specific large pages for kernel heap support 320 */ 321 void 322 mmu_init_kcontext() 323 { 324 extern void set_kcontextreg(); 325 326 if (kcontextreg) 327 set_kcontextreg(); 328 } 329 330 void 331 contig_mem_init(void) 332 { 333 /* not applicable to sun4u */ 334 } 335 336 /*ARGSUSED*/ 337 caddr_t 338 contig_mem_prealloc(caddr_t alloc_base, pgcnt_t npages) 339 { 340 /* not applicable to sun4u */ 341 return (alloc_base); 342 } 343 344 size_t 345 exec_get_spslew(void) 346 { 347 return (0); 348 } 349