1*7c478bd9Sstevel@tonic-gate# 2*7c478bd9Sstevel@tonic-gate# CDDL HEADER START 3*7c478bd9Sstevel@tonic-gate# 4*7c478bd9Sstevel@tonic-gate# The contents of this file are subject to the terms of the 5*7c478bd9Sstevel@tonic-gate# Common Development and Distribution License, Version 1.0 only 6*7c478bd9Sstevel@tonic-gate# (the "License"). You may not use this file except in compliance 7*7c478bd9Sstevel@tonic-gate# with the License. 8*7c478bd9Sstevel@tonic-gate# 9*7c478bd9Sstevel@tonic-gate# You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 10*7c478bd9Sstevel@tonic-gate# or http://www.opensolaris.org/os/licensing. 11*7c478bd9Sstevel@tonic-gate# See the License for the specific language governing permissions 12*7c478bd9Sstevel@tonic-gate# and limitations under the License. 13*7c478bd9Sstevel@tonic-gate# 14*7c478bd9Sstevel@tonic-gate# When distributing Covered Code, include this CDDL HEADER in each 15*7c478bd9Sstevel@tonic-gate# file and include the License file at usr/src/OPENSOLARIS.LICENSE. 16*7c478bd9Sstevel@tonic-gate# If applicable, add the following below this CDDL HEADER, with the 17*7c478bd9Sstevel@tonic-gate# fields enclosed by brackets "[]" replaced with your own identifying 18*7c478bd9Sstevel@tonic-gate# information: Portions Copyright [yyyy] [name of copyright owner] 19*7c478bd9Sstevel@tonic-gate# 20*7c478bd9Sstevel@tonic-gate# CDDL HEADER END 21*7c478bd9Sstevel@tonic-gate# 22*7c478bd9Sstevel@tonic-gate# 23*7c478bd9Sstevel@tonic-gate# Copyright 2005 Sun Microsystems, Inc. All rights reserved. 24*7c478bd9Sstevel@tonic-gate# Use is subject to license terms. 25*7c478bd9Sstevel@tonic-gate# 26*7c478bd9Sstevel@tonic-gate#ident "%Z%%M% %I% %E% SMI" 27*7c478bd9Sstevel@tonic-gate# 28*7c478bd9Sstevel@tonic-gate 29*7c478bd9Sstevel@tonic-gatename="ppm" parent="pseudo" instance=0; 30*7c478bd9Sstevel@tonic-gate 31*7c478bd9Sstevel@tonic-gate# 32*7c478bd9Sstevel@tonic-gate# ppm configuration format 33*7c478bd9Sstevel@tonic-gate# 34*7c478bd9Sstevel@tonic-gate# "ppm-domains" - in form of "domain_xxx" where "xxx" string highlights 35*7c478bd9Sstevel@tonic-gate# the nature of the domain; 36*7c478bd9Sstevel@tonic-gate# 37*7c478bd9Sstevel@tonic-gate# "domain_xxx-model" - PM model: CPU, PCI, PCI_PROP, FET or LED. 38*7c478bd9Sstevel@tonic-gate# 39*7c478bd9Sstevel@tonic-gate# "domain_xxx-propname" - a property name that is exported by device in 40*7c478bd9Sstevel@tonic-gate# a domain. Currently, it is used by PCI_PROP model to identify devices 41*7c478bd9Sstevel@tonic-gate# that are to have their clocks stopped when all power-manageable devices 42*7c478bd9Sstevel@tonic-gate# in the domain are at D3 power level. 43*7c478bd9Sstevel@tonic-gate# 44*7c478bd9Sstevel@tonic-gate# "domain-xxx-devices" - a list of prom path(s) to include every devices 45*7c478bd9Sstevel@tonic-gate# that fall into "domain_xxx", where wildcard '*' is allowed by following 46*7c478bd9Sstevel@tonic-gate# the expectation: 47*7c478bd9Sstevel@tonic-gate# 48*7c478bd9Sstevel@tonic-gate# "domain-xxx-ctrl" - blank space separated definitions in form of 49*7c478bd9Sstevel@tonic-gate# keyword=definition [keyword=definition...] 50*7c478bd9Sstevel@tonic-gate# The keywords are as follows, where 'method' must come before mask as it 51*7c478bd9Sstevel@tonic-gate# tells how to store 'mask' and 'val'. Missing 'val' defaults to 0. 52*7c478bd9Sstevel@tonic-gate# 53*7c478bd9Sstevel@tonic-gate# which keywords apply depend on cmd. There are two sets as shown below. 54*7c478bd9Sstevel@tonic-gate# Here is the first: 55*7c478bd9Sstevel@tonic-gate# cmd=[CPU_GO | LED_ON | LED_OFF | FET_ON | FET_OFF | CLK_ON | CLK_OFF] 56*7c478bd9Sstevel@tonic-gate# path=<prompath> - control device's /devices pathname (includes minor) 57*7c478bd9Sstevel@tonic-gate# method=[KIO|I2CKIO] This selects a method which maybe 58*7c478bd9Sstevel@tonic-gate# an ioctl that sets a single value or an i2c ioctl that 59*7c478bd9Sstevel@tonic-gate# takes a value and a mask for access gpio register 60*7c478bd9Sstevel@tonic-gate# iord=<integer> - value of ioctl command for reading 61*7c478bd9Sstevel@tonic-gate# iowr=<integer> - value of ioctl command for writing 62*7c478bd9Sstevel@tonic-gate# val=<integer> - a single integer value, generally the value to which 63*7c478bd9Sstevel@tonic-gate# to set the relevant bits of a register 64*7c478bd9Sstevel@tonic-gate# mask=<integer> - which bits of val are relevant (if method is I2CKIO) 65*7c478bd9Sstevel@tonic-gate# 66*7c478bd9Sstevel@tonic-gate# Here is the second: 67*7c478bd9Sstevel@tonic-gate# cmd=[CPU_NEXT | PRE_CHNG | POST_CHNG] 68*7c478bd9Sstevel@tonic-gate# path=<prompath> - control device's prom pathname, including minor 69*7c478bd9Sstevel@tonic-gate# method=[CPUSPEEDKIO | VCORE] This selects a method that uses 70*7c478bd9Sstevel@tonic-gate# information like cpu speed index, value for 71*7c478bd9Sstevel@tonic-gate# adjust cpu core voltage, delays, etc. 72*7c478bd9Sstevel@tonic-gate# iowr=<integer> - value of ioctl write command 73*7c478bd9Sstevel@tonic-gate# speeds=<integer> - indicates the number of cpu speeds that are 74*7c478bd9Sstevel@tonic-gate# supported 75*7c478bd9Sstevel@tonic-gate# 76*7c478bd9Sstevel@tonic-gate 77*7c478bd9Sstevel@tonic-gateppm-domains="domain_cpu", "domain_idefet", "domain_led", 78*7c478bd9Sstevel@tonic-gate "domain_pcislot_0", "domain_pcislot_1", "domain_pcislot_2", 79*7c478bd9Sstevel@tonic-gate "domain_pcislot_3", "domain_pcislot_4"; 80*7c478bd9Sstevel@tonic-gate 81*7c478bd9Sstevel@tonic-gate 82*7c478bd9Sstevel@tonic-gate# 83*7c478bd9Sstevel@tonic-gate# 0x6a02 is JPPMIOC_NEXT (('j' << 8) | 2) 84*7c478bd9Sstevel@tonic-gate# 0x6a03 is JBPPMIOC_GO (('j' << 8) | 3) 85*7c478bd9Sstevel@tonic-gate# 86*7c478bd9Sstevel@tonic-gatedomain_cpu-devices="/SUNW,UltraSPARC-IIIi@*"; 87*7c478bd9Sstevel@tonic-gatedomain_cpu-model="CPU"; 88*7c478bd9Sstevel@tonic-gatedomain_cpu-control= 89*7c478bd9Sstevel@tonic-gate "cmd=CPU_NEXT path=/ppm@1e,0:jbus-ppm method=CPUSPEEDKIO iowr=0x6a02 speeds=3", 90*7c478bd9Sstevel@tonic-gate "cmd=PRE_CHNG path=/pci@1e,600000/pmu@6/ppm@0,b3:gpo32 method=VCORE iowr=0x6c02 iord=0x6c01 val=4 delay=150000", 91*7c478bd9Sstevel@tonic-gate "cmd=CPU_GO path=/ppm@1e,0:jbus-ppm method=KIO iowr=0x6a03 val=0", 92*7c478bd9Sstevel@tonic-gate "cmd=POST_CHNG path=/pci@1e,600000/pmu@6/ppm@0,b3:gpo32 method=VCORE iowr=0x6c02 iord=0x6c01 val=5"; 93*7c478bd9Sstevel@tonic-gate 94*7c478bd9Sstevel@tonic-gate# 95*7c478bd9Sstevel@tonic-gate# iord -- 0x6c01 is M1535PPMIOC_GET (('l' << 8) | 1) 96*7c478bd9Sstevel@tonic-gate# iowr -- 0x6c02 is M1535PPMIOC_SET (('l' << 8) | 2) 97*7c478bd9Sstevel@tonic-gate# 98*7c478bd9Sstevel@tonic-gate# Notes 99*7c478bd9Sstevel@tonic-gate# 100*7c478bd9Sstevel@tonic-gate# - No devices to claim in the LED domain 101*7c478bd9Sstevel@tonic-gate# - Both spled and idefet are active low 102*7c478bd9Sstevel@tonic-gate# 103*7c478bd9Sstevel@tonic-gate 104*7c478bd9Sstevel@tonic-gatedomain_idefet-devices = "/pci@1e,600000/ide@d"; 105*7c478bd9Sstevel@tonic-gatedomain_idefet-model = "FET"; 106*7c478bd9Sstevel@tonic-gatedomain_idefet-control = 107*7c478bd9Sstevel@tonic-gate "cmd=FET_ON path=/pci@1e,600000/pmu@6/ppm@0,b3:gpo37 method=KIO iowr=0x6c02 iord=0x6c01 val=0 delay=1000000 post_delay=1000000", 108*7c478bd9Sstevel@tonic-gate "cmd=FET_OFF path=/pci@1e,600000/pmu@6/ppm@0,b3:gpo37 method=KIO iowr=0x6c02 iord=0x6c01 val=2"; 109*7c478bd9Sstevel@tonic-gate 110*7c478bd9Sstevel@tonic-gatedomain_led-devices = ""; 111*7c478bd9Sstevel@tonic-gatedomain_led-model = "LED"; 112*7c478bd9Sstevel@tonic-gatedomain_led-control = 113*7c478bd9Sstevel@tonic-gate "cmd=LED_ON path=/pci@1e,600000/pmu@6/ppm@0,b3:spled method=KIO iowr=0x6c02 iord=0x6c01 val=0", 114*7c478bd9Sstevel@tonic-gate "cmd=LED_OFF path=/pci@1e,600000/pmu@6/ppm@0,b3:spled method=KIO iowr=0x6c02 iord=0x6c01 val=1"; 115*7c478bd9Sstevel@tonic-gate 116*7c478bd9Sstevel@tonic-gate 117*7c478bd9Sstevel@tonic-gate# The following describes per pci slot domain control. 118*7c478bd9Sstevel@tonic-gate# Note that the "domain_pcislot?-devices" property contains wildcard 119*7c478bd9Sstevel@tonic-gate# character '*', here is how '*' usage is defined in this context: 120*7c478bd9Sstevel@tonic-gate# first wildcard indicates device driver name, 121*7c478bd9Sstevel@tonic-gate# second wildcard, if presents, indicates function number. 122*7c478bd9Sstevel@tonic-gate# 123*7c478bd9Sstevel@tonic-gate# Slots 0 to 3 are on the PCI A leaf (/pci@1e,600000) and slot 4 (the 124*7c478bd9Sstevel@tonic-gate# 66MHz slot) is on the PCI B leaf (/pci@1f,700000). Note that old Taco 125*7c478bd9Sstevel@tonic-gate# spec (incorrectly) numbers these slots from 1 to 5 instead of 126*7c478bd9Sstevel@tonic-gate# from 0 to 4. 127*7c478bd9Sstevel@tonic-gate# 128*7c478bd9Sstevel@tonic-gate 129*7c478bd9Sstevel@tonic-gate# slot 0, PCIA segment, 33MHz 130*7c478bd9Sstevel@tonic-gate# iowr = (ICS951601_MODIFY_CLOCK | ICS951601_PCI1A_4) = 0x2310 131*7c478bd9Sstevel@tonic-gate# iord = (ICS951601_READ_CLOCK | ICS951601_PCI1A_4) = 0x1310 132*7c478bd9Sstevel@tonic-gate# 133*7c478bd9Sstevel@tonic-gatedomain_pcislot_0-devices = "/pci@1e,600000/*@2,*", "/pci@1e,600000/*@2"; 134*7c478bd9Sstevel@tonic-gatedomain_pcislot_0-model = "PCI_PROP"; 135*7c478bd9Sstevel@tonic-gatedomain_pcislot_0-propname = "nonidle-bus-clock-pm"; 136*7c478bd9Sstevel@tonic-gatedomain_pcislot_0-control = 137*7c478bd9Sstevel@tonic-gate "cmd=CLK_ON path=/pci@1e,600000/isa@7/i2c@0,320/clock-generator@0,d2:ics951601_0 method=KIO iowr=0x2310 iord=0x1310 val=1", 138*7c478bd9Sstevel@tonic-gate "cmd=CLK_OFF path=/pci@1e,600000/isa@7/i2c@0,320/clock-generator@0,d2:ics951601_0 method=KIO iowr=0x2310 iord=0x1310 val=0"; 139*7c478bd9Sstevel@tonic-gate 140*7c478bd9Sstevel@tonic-gate# slot 1, PCIA segment, 33MHz 141*7c478bd9Sstevel@tonic-gate# iowr = (ICS951601_MODIFY_CLOCK | ICS951601_PCI1A_5) = 0x2320 142*7c478bd9Sstevel@tonic-gate# iord = (ICS951601_READ_CLOCK | ICS951601_PCI1A_5) = 0x1320 143*7c478bd9Sstevel@tonic-gate# 144*7c478bd9Sstevel@tonic-gatedomain_pcislot_1-devices = "/pci@1e,600000/*@3,*", "/pci@1e,600000/*@3"; 145*7c478bd9Sstevel@tonic-gatedomain_pcislot_1-model = "PCI_PROP"; 146*7c478bd9Sstevel@tonic-gatedomain_pcislot_1-propname = "nonidle-bus-clock-pm"; 147*7c478bd9Sstevel@tonic-gatedomain_pcislot_1-control = 148*7c478bd9Sstevel@tonic-gate "cmd=CLK_ON path=/pci@1e,600000/isa@7/i2c@0,320/clock-generator@0,d2:ics951601_0 method=KIO iowr=0x2320 iord=0x1320 val=1", 149*7c478bd9Sstevel@tonic-gate "cmd=CLK_OFF path=/pci@1e,600000/isa@7/i2c@0,320/clock-generator@0,d2:ics951601_0 method=KIO iowr=0x2320 iord=0x1320 val=0"; 150*7c478bd9Sstevel@tonic-gate 151*7c478bd9Sstevel@tonic-gate# slot 2, PCIA segment, 33MHz 152*7c478bd9Sstevel@tonic-gate# iowr = (ICS951601_MODIFY_CLOCK | ICS951601_PCI1A_6) = 0x2340 153*7c478bd9Sstevel@tonic-gate# iord = (ICS951601_READ_CLOCK | ICS951601_PCI1A_6) = 0x1340 154*7c478bd9Sstevel@tonic-gate# 155*7c478bd9Sstevel@tonic-gatedomain_pcislot_2-devices = "/pci@1e,600000/*@4,*", "/pci@1e,600000/*@4"; 156*7c478bd9Sstevel@tonic-gatedomain_pcislot_2-model = "PCI_PROP"; 157*7c478bd9Sstevel@tonic-gatedomain_pcislot_2-propname = "nonidle-bus-clock-pm"; 158*7c478bd9Sstevel@tonic-gatedomain_pcislot_2-control = 159*7c478bd9Sstevel@tonic-gate "cmd=CLK_ON path=/pci@1e,600000/isa@7/i2c@0,320/clock-generator@0,d2:ics951601_0 method=KIO iowr=0x2340 iord=0x1340 val=1", 160*7c478bd9Sstevel@tonic-gate "cmd=CLK_OFF path=/pci@1e,600000/isa@7/i2c@0,320/clock-generator@0,d2:ics951601_0 method=KIO iowr=0x2340 iord=0x1340 val=0"; 161*7c478bd9Sstevel@tonic-gate 162*7c478bd9Sstevel@tonic-gate# slot 3, PCIA segment, 33MHz 163*7c478bd9Sstevel@tonic-gate# iowr = (ICS951601_MODIFY_CLOCK | ICS951601_PCI1A_7) = 0x2380 164*7c478bd9Sstevel@tonic-gate# iord = (ICS951601_READ_CLOCK | ICS951601_PCI1A_7) = 0x1380 165*7c478bd9Sstevel@tonic-gate# 166*7c478bd9Sstevel@tonic-gatedomain_pcislot_3-devices = "/pci@1e,600000/*@5,*", "/pci@1e,600000/*@5"; 167*7c478bd9Sstevel@tonic-gatedomain_pcislot_3-model = "PCI_PROP"; 168*7c478bd9Sstevel@tonic-gatedomain_pcislot_3-propname = "nonidle-bus-clock-pm"; 169*7c478bd9Sstevel@tonic-gatedomain_pcislot_3-control = 170*7c478bd9Sstevel@tonic-gate "cmd=CLK_ON path=/pci@1e,600000/isa@7/i2c@0,320/clock-generator@0,d2:ics951601_0 method=KIO iowr=0x2380 iord=0x1380 val=1", 171*7c478bd9Sstevel@tonic-gate "cmd=CLK_OFF path=/pci@1e,600000/isa@7/i2c@0,320/clock-generator@0,d2:ics951601_0 method=KIO iowr=0x2380 iord=0x1380 val=0"; 172*7c478bd9Sstevel@tonic-gate 173*7c478bd9Sstevel@tonic-gate# slot 4, PCIB segment, 66MHz 174*7c478bd9Sstevel@tonic-gate# iowr = (ICS951601_MODIFY_CLOCK | ICS951601_PCI2B_1) = 0x2540 175*7c478bd9Sstevel@tonic-gate# iord = (ICS951601_READ_CLOCK | ICS951601_PCI2B_1) = 0x1540 176*7c478bd9Sstevel@tonic-gate# 177*7c478bd9Sstevel@tonic-gatedomain_pcislot_4-devices = "/pci@1f,700000/*@3,*", "/pci@1f,700000/*@3"; 178*7c478bd9Sstevel@tonic-gatedomain_pcislot_4-model = "PCI_PROP"; 179*7c478bd9Sstevel@tonic-gatedomain_pcislot_4-propname = "nonidle-bus-clock-pm"; 180*7c478bd9Sstevel@tonic-gatedomain_pcislot_4-control = 181*7c478bd9Sstevel@tonic-gate "cmd=CLK_ON path=/pci@1e,600000/isa@7/i2c@0,320/clock-generator@0,d2:ics951601_0 method=KIO iowr=0x2540 iord=0x1540 val=1", 182*7c478bd9Sstevel@tonic-gate "cmd=CLK_OFF path=/pci@1e,600000/isa@7/i2c@0,320/clock-generator@0,d2:ics951601_0 method=KIO iowr=0x2540 iord=0x1540 val=0"; 183