xref: /titanic_41/usr/src/uts/sun4u/sys/mc.h (revision 6f45ec7b0b964c3be967c4880e8867ac1e7763a5)
1 /*
2  * CDDL HEADER START
3  *
4  * The contents of this file are subject to the terms of the
5  * Common Development and Distribution License, Version 1.0 only
6  * (the "License").  You may not use this file except in compliance
7  * with the License.
8  *
9  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
10  * or http://www.opensolaris.org/os/licensing.
11  * See the License for the specific language governing permissions
12  * and limitations under the License.
13  *
14  * When distributing Covered Code, include this CDDL HEADER in each
15  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
16  * If applicable, add the following below this CDDL HEADER, with the
17  * fields enclosed by brackets "[]" replaced with your own identifying
18  * information: Portions Copyright [yyyy] [name of copyright owner]
19  *
20  * CDDL HEADER END
21  */
22 /*
23  * Copyright 2004 Sun Microsystems, Inc.  All rights reserved.
24  * Use is subject to license terms.
25  */
26 
27 #ifndef	_SYS_MC_H
28 #define	_SYS_MC_H
29 
30 #pragma ident	"%Z%%M%	%I%	%E% SMI"
31 
32 #ifdef	__cplusplus
33 extern "C" {
34 #endif
35 
36 /*
37  * Interface of Memory Controller driver
38  *
39  * Logical view: memory -> segment -> bank -> device group -> device
40  * physical view: mc -> device group -> device
41  *
42  * MCIOC_MEM, MCIOC_SEG, MCIOC_CTRLCONF, MCIOC_CONTROL are
43  * associated with various length struct. If given number is less than the
44  * number in kernel, kernel will update the number and return EINVAL so that
45  * user could allocate enough space for the struct and fill the right number
46  * of ids at the struct.
47  *
48  * All varaiable number ids will be paired, global and local. Global id is
49  * unique in the same object list and local id is only unique to
50  * its upper layer. For instance, one memory module group has N memory modules.
51  * local ids of this memory module group is from 0 to N - 1, but global id
52  * is unique in all memory modules. So global id will be the key in the list
53  * and pass it to driver to search. Local id will be returned to user
54  * application via ioctl.
55  */
56 
57 #define	MCIOC		('M' << 8)
58 #define	MCIOC_MEMCONF	(MCIOC|8)
59 #define	MCIOC_MEM	(MCIOC|9)
60 #define	MCIOC_SEG	(MCIOC|10)
61 #define	MCIOC_BANK	(MCIOC|11)
62 #define	MCIOC_DEVGRP	(MCIOC|12)
63 #define	MCIOC_CTRLCONF	(MCIOC|13)
64 #define	MCIOC_CONTROL	(MCIOC|14)
65 #define	MCIOC_ECFLUSH	(MCIOC|15)
66 
67 /*
68  * libdevinfo property name for exporting the Memory Address
69  * Decode Registers for each Logical bank. An array of [NBANK]
70  * uint64_t's is created for each memory-controller node.
71  */
72 #define	MEM_CFG_PROP_NAME	"logical-bank-ma-regs"
73 
74 struct mc_ids {
75 	int	globalid;
76 	int	localid;
77 };
78 
79 /*
80  * Enabled memory controller is able to get memory-layout property, and
81  * it could be with or without memory.
82  */
83 struct mc_memconf {
84 	int nmcs;	/* The number of enabled memory controllers */
85 	int nsegments;	/* The number of memory segments */
86 	int nbanks;	/* The max. number of banks per segment */
87 	int ndevgrps;	/* The max. number of device groups per mc */
88 	int ndevs;	/* The max. number of devices per device group */
89 	int len_dev;	/* The length of device label */
90 	int xfer_size;	/* Data transfer size in CPU cache line */
91 };
92 
93 struct mc_memory {
94 	uint64_t size;		/* size of physical memory */
95 	int nsegments;		/* The number of memory segments */
96 	struct mc_ids segmentids[1]; /* segment ids for next iteration */
97 };
98 
99 struct mc_segment {
100 	int id;			/* unique segment id */
101 	int ifactor;		/* interleave factor for this segment */
102 	uint64_t base;		/* starting physical address */
103 	uint64_t size;		/* in bytes */
104 	int nbanks;		/* The number of banks at this segment */
105 	struct mc_ids bankids[1]; /* logical bank ids for next iteration */
106 };
107 
108 struct mc_bank {
109 	int id;			/* unique id for logic bank */
110 	struct mc_ids devgrpid;	/* Only one device group id per logical bank */
111 	uint64_t mask;		/* If (Physic Address & MASK) == MATCH, */
112 	uint64_t match;		/* Physic Address is located at this bank. */
113 	uint64_t size;		/* memory size per logical bank */
114 };
115 
116 struct mc_ctrlconf {
117 	int nmcs;		/* The number of enabled memory controllers */
118 	struct mc_ids mcids[1];	/* mc ids for next iteration */
119 };
120 
121 struct mc_control {
122 	int id;			/* unique id for memory controllers */
123 	int ndevgrps;		/* The number of device groups on this mc */
124 	struct mc_ids devgrpids[1]; /* device group ids for next iteration */
125 };
126 
127 struct mc_devgrp {
128 	int id;		/* unique id for device groups */
129 	int ndevices;	/* The number of available devices on this dev group */
130 	uint64_t size;	/* memory size per physical dimm group */
131 };
132 
133 #ifdef	__cplusplus
134 }
135 #endif
136 
137 #endif	/* _SYS_MC_H */
138