1 /* 2 * CDDL HEADER START 3 * 4 * The contents of this file are subject to the terms of the 5 * Common Development and Distribution License, Version 1.0 only 6 * (the "License"). You may not use this file except in compliance 7 * with the License. 8 * 9 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 10 * or http://www.opensolaris.org/os/licensing. 11 * See the License for the specific language governing permissions 12 * and limitations under the License. 13 * 14 * When distributing Covered Code, include this CDDL HEADER in each 15 * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 16 * If applicable, add the following below this CDDL HEADER, with the 17 * fields enclosed by brackets "[]" replaced with your own identifying 18 * information: Portions Copyright [yyyy] [name of copyright owner] 19 * 20 * CDDL HEADER END 21 */ 22 /* 23 * Copyright (c) 2000 by Sun Microsystems, Inc. 24 * All rights reserved. 25 */ 26 27 #ifndef _SYS_GPIO_87317_H 28 #define _SYS_GPIO_87317_H 29 30 #pragma ident "%Z%%M% %I% %E% SMI" 31 32 #ifdef __cplusplus 33 extern "C" { 34 #endif 35 36 37 /* ioctl commands - ioctl(..., int request, ...) */ 38 #define GPIO_CMD_SET_BITS 0 /* gpio_reg[bank][offset] |= gpio_data */ 39 #define GPIO_CMD_CLR_BITS 1 /* gpio_reg[bank][offset] &= ~gpio_data */ 40 #define GPIO_CMD_GET 2 /* gpio_data = gpio_reg[bank][offset] */ 41 #define GPIO_CMD_SET 3 /* gpio_reg[bank][offset] = gpio_data */ 42 43 /* SuperIO gpio bank 0 (gpio_bank=0) register offsets (gpio_offset) */ 44 #define GPIO_87317_PORT1_DATA 0 /* port 1 data */ 45 #define GPIO_87317_PORT1_DIR 1 /* port 1 direction */ 46 #define GPIO_87317_PORT1_OUT 2 /* port 1 output type */ 47 #define GPIO_87317_PORT1_CTRL 3 /* port 1 pull-up control */ 48 #define GPIO_87317_PORT2_DATA 4 /* port 2 data */ 49 #define GPIO_87317_PORT2_DIR 5 /* port 2 direction */ 50 #define GPIO_87317_PORT2_OUT 6 /* port 2 output type */ 51 #define GPIO_87317_PORT2_CTRL 7 /* port 2 pull-up control */ 52 53 /* SuperIO gpio bank 1 (gpio_bank=1) register offsets (gpio_offset) */ 54 #define GPIO_87317_PORT1_LOCK 0 /* port 1 lock */ 55 #define GPIO_87317_PORT1_POLARITY 1 /* port 1 polarity */ 56 #define GPIO_87317_PORT1_IN2OUT 2 /* port 1 in to out */ 57 /* offset 3 is reserved */ 58 #define GPIO_87317_PORT3_DATA 4 /* port 3 data */ 59 #define GPIO_87317_PORT3_DIR 5 /* port 3 direction */ 60 #define GPIO_87317_PORT3_OUT 6 /* port 3 output type */ 61 #define GPIO_87317_PORT3_CTRL 7 /* port 3 pull-up control */ 62 63 /* ioctl operation structure - ioctl(..., void *arg) */ 64 typedef struct gpio_87317_op_s { 65 int gpio_bank; /* identify gpio bank: 0 or 1 */ 66 uint8_t gpio_offset; /* offset of gpio register: 0-7 */ 67 uint8_t gpio_data; /* bits to set/clear; or data to read/write */ 68 } gpio_87317_op_t; 69 70 71 #ifdef __cplusplus 72 } 73 #endif 74 75 #endif /* _SYS_GPIO_87317_H */ 76