xref: /titanic_41/usr/src/uts/sun4u/starfire/sys/idn_xf.h (revision 54925bf60766fbb4f1f2d7c843721406a7b7a3fb)
1 /*
2  * CDDL HEADER START
3  *
4  * The contents of this file are subject to the terms of the
5  * Common Development and Distribution License, Version 1.0 only
6  * (the "License").  You may not use this file except in compliance
7  * with the License.
8  *
9  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
10  * or http://www.opensolaris.org/os/licensing.
11  * See the License for the specific language governing permissions
12  * and limitations under the License.
13  *
14  * When distributing Covered Code, include this CDDL HEADER in each
15  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
16  * If applicable, add the following below this CDDL HEADER, with the
17  * fields enclosed by brackets "[]" replaced with your own identifying
18  * information: Portions Copyright [yyyy] [name of copyright owner]
19  *
20  * CDDL HEADER END
21  */
22 /*
23  * Copyright (c) 1999 by Sun Microsystems, Inc.
24  * All rights reserved.
25  *
26  * Inter-Domain Network - Xfire specifics.
27  */
28 
29 #ifndef	_SYS_IDN_XF_H
30 #define	_SYS_IDN_XF_H
31 
32 #pragma ident	"%Z%%M%	%I%	%E% SMI"
33 
34 #include <sys/pda.h>
35 #include <sys/cpu_sgnblk_defs.h>
36 #include <sys/idn_sigb.h>
37 #include <sys/starfire.h>
38 
39 #include <sys/idn.h>
40 
41 #ifdef	__cplusplus
42 extern "C" {
43 #endif
44 
45 /*
46  * These address bits fit into PA[17:9].
47  */
48 #define	CIC_CONFIG0_ADDR	0x002
49 #define	CIC_CONFIG1_ADDR	0x003
50 #define	CIC_DOMAIN_MASK_ADDR	0x004
51 #define	CIC_SM_MASK_ADDR	0x005
52 #define	CIC_SM_BAR_LSB_ADDR	0x006
53 #define	CIC_SM_BAR_MSB_ADDR	0x007
54 #define	CIC_SM_LAR_LSB_ADDR	0x008
55 #define	CIC_SM_LAR_MSB_ADDR	0x009
56 
57 #define	CIC_CONFIG0_BUSMODE_MASK	0x3
58 #define	CIC_CONFIG0_BUSMODE_SHIFT	2
59 #define	CIC_CONFIG0_BUSMODE(c) \
60 	(((c) >> CIC_CONFIG0_BUSMODE_SHIFT) & CIC_CONFIG0_BUSMODE_MASK)
61 #define	CIC_CONFIG1_SMMASK_MASK		0x1
62 #define	CIC_CONFIG1_SMMASK_SHIFT	1
63 #define	CIC_CONFIG1_SMMASK_BIT(c) \
64 	(((c) >> CIC_CONFIG1_SMMASK_SHIFT) & CIC_CONFIG1_SMMASK_MASK)
65 
66 #define	CIC_CSR_ADDR_MASK	0x1ff
67 #define	CIC_CSR_ADDR_SHIFT	9
68 #define	CSR_TYPE_CIC		0xe
69 
70 #define	CSR_BOARD_MASK		0xf	/* PA[39:36] */
71 #define	CSR_BOARD_SHIFT		36
72 
73 #define	CSR_TYPE_MASK		0xf	/* PA[35:32] */
74 #define	CSR_TYPE_SHIFT		32
75 
76 #define	CSR_BUS_MASK		0x3
77 #define	CSR_BUS_SHIFT		6    /* XXX - depends on config/shuffle */
78 
79 				/* bd=board, t=type, a=addr, bs=bus */
80 #define	MAKE_CIC_CSR_PA(bd, t, a, bs) \
81 		(((u_longlong_t)1 << 40) \
82 		    | ((u_longlong_t)((bd) & CSR_BOARD_MASK) \
83 			<< CSR_BOARD_SHIFT) \
84 		    | ((u_longlong_t)((t) & CSR_TYPE_MASK) \
85 			<< CSR_TYPE_SHIFT) \
86 		    | ((u_longlong_t)((a) & CIC_CSR_ADDR_MASK) \
87 			<< CIC_CSR_ADDR_SHIFT) \
88 		    | ((u_longlong_t)((bs) & CSR_BUS_MASK) \
89 			<< CSR_BUS_SHIFT))
90 
91 #define	STARFIRE_PC_MADR_VALIDBIT	0x80000000
92 
93 /*
94  * Macro to calculate address of CIC prep buffer
95  * that resides in PC.
96  * This macro really belongs in <sys/starfire.h>
97  */
98 #define	STARFIRE_PC_CICBUF_ADDR(bb, p) \
99 		(STARFIRE_BRD_TO_PSI(bb) | \
100 		((uint64_t)(p) << STARFIRE_UPS_MID_SHIFT) | \
101 		STARFIRE_PSI_PCREG_OFF | \
102 		STARFIRE_PC_CIC_WRITE_DATA)
103 
104 /*
105  * ---------------------------------------------------------------------
106  */
107 
108 extern cpu_t		cpu0;
109 
110 extern int	get_hw_config(struct hwconfig *loc_hw);
111 extern int	update_local_hw_config(idn_domain_t *ldp,
112 				struct hwconfig *loc_hw);
113 extern boardset_t	cic_read_domain_mask(int board, int bus);
114 extern boardset_t	cic_read_sm_mask(int board, int bus);
115 extern uint_t	cic_read_sm_bar(int board, int bus);
116 extern uint_t	cic_read_sm_lar(int board, int bus);
117 extern void	pc_read_madr(pda_handle_t ph, int lboard,
118 				uint_t mc_adr[], int  local_only);
119 extern void	mc_get_adr_all(pda_handle_t ph, uint_t mc_adr[],
120 				int *nmcadr);
121 extern int	post2obp_valid(post2obp_info_t *p2o);
122 
123 extern uint_t	xf_physio_rdword(u_longlong_t physaddr);
124 extern void	xf_physio_wrword(u_longlong_t physaddr, uint_t value);
125 extern ushort_t	xf_physio_rdhword(u_longlong_t physaddr);
126 extern void	xf_physio_wrhword(u_longlong_t physaddr, ushort_t value);
127 
128 
129 #ifdef	__cplusplus
130 }
131 #endif
132 
133 #endif /* _SYS_IDN_XF_H */
134