1 /* 2 * CDDL HEADER START 3 * 4 * The contents of this file are subject to the terms of the 5 * Common Development and Distribution License (the "License"). 6 * You may not use this file except in compliance with the License. 7 * 8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 9 * or http://www.opensolaris.org/os/licensing. 10 * See the License for the specific language governing permissions 11 * and limitations under the License. 12 * 13 * When distributing Covered Code, include this CDDL HEADER in each 14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 15 * If applicable, add the following below this CDDL HEADER, with the 16 * fields enclosed by brackets "[]" replaced with your own identifying 17 * information: Portions Copyright [yyyy] [name of copyright owner] 18 * 19 * CDDL HEADER END 20 */ 21 /* 22 * Copyright 2006 Sun Microsystems, Inc. All rights reserved. 23 * Use is subject to license terms. 24 * 25 * Inter-Domain Network 26 */ 27 28 #ifndef _SYS_IDN_H 29 #define _SYS_IDN_H 30 31 #pragma ident "%Z%%M% %I% %E% SMI" 32 33 #ifndef _ASM 34 35 #ifdef _KERNEL 36 37 #include <sys/note.h> 38 39 #include <sys/cmn_err.h> 40 #include <sys/dditypes.h> 41 #include <sys/stream.h> 42 #include <sys/machsystm.h> 43 #include <sys/ethernet.h> 44 #include <sys/dlpi.h> 45 #include <sys/time.h> 46 #include <sys/kmem.h> 47 #include <sys/atomic.h> 48 #include <sys/cpuvar.h> 49 50 #include <sys/idn_sigb.h> 51 #include <sys/idn_smr.h> 52 #endif /* _KERNEL */ 53 54 #ifdef __cplusplus 55 extern "C" { 56 #endif 57 58 typedef const char * const procname_t; 59 60 #define MB2B(m) ((size_t)(m) << 20) /* MBytes to Bytes */ 61 #define B2MB(b) ((uint_t)((b) >> 20)) /* Bytes to MBytes */ 62 63 #ifdef _KERNEL 64 65 /* 66 * IDN_PROP_SMRSIZE - User specified size in MBytes. 67 * IDN_PROP_SMRADDR - OBP's internal physical address of the region. 68 * 69 * OBP properties of "memory" node that define the SMR space. 70 */ 71 #define IDN_PROP_SMRSIZE "idn-smr-size" 72 #define IDN_PROP_SMRADDR "idn-smr-addr" 73 74 /* 75 * IDN_AWOLMSG_INTERVAL (driver.conf) 76 * 77 * Number of seconds between AWOL messages on a per-domain basis. 78 * The purpose is to throttle the frequency at which these 79 * messages appear. 80 * 81 * IDN_MSGWAIT_NEGO (driver.conf) 82 * IDN_MSGWAIT_CFG 83 * IDN_MSGWAIT_CON 84 * IDN_MSGWAIT_FIN 85 * IDN_MSGWAIT_CMD 86 * IDN_MSGWAIT_DATA 87 * 88 * Number of seconds to wait for response to respective 89 * message type. 90 * 91 * IDN_RETRYFREQ_NEGO (driver.conf) 92 * IDN_RETRYFREQ_CON 93 * IDN_RETRYFREQ_FIN 94 * 95 * Number of seconds to wait between retries of the respective 96 * message type. 97 * 98 * IDN_SMR_ALIGN (not tunable) 99 * 100 * The hardware registers that describe the SMR are based on a 64K 101 * aligned physical address. 102 * 103 * IDN_SMR_SIZE (OBP [only]) 104 * 105 * Total size of the SMR (Shared Memory Region) in bytes. 106 * 107 * IDN_NWR_SIZE (driver.conf) 108 * 109 * Total size of the NWR (NetWork Region) portion of the SMR which 110 * is actually used to support network activity. The NWR is managed 111 * as simply a pool of I/O buffers which are distributed by the 112 * Master domain to the Slaves for the purpose of communicating 113 * between each other. If not set then the entire SMR is used 114 * as the NWR. 115 * Req: IDN_NWR_SIZE <= IDN_SMR_SIZE 116 * 117 * IDN_SMR_BUFSIZE (driver.conf) 118 * 119 * Size of individual SMR buffers. The SMR is divided into chunks 120 * of IDN_SMR_BUFSIZE bytes. The IDN_MTU is based on this size 121 * and thus the IDN_SMR_BUFSIZE should be chosen based on performance. 122 * 123 * IDN_DATA_SIZE (NOT tunable) 124 * 125 * Portion of IDN_SMR_BUFSIZE that can contain raw non-IDN dependent 126 * data. We subtract IDN_ALIGNSIZE bytes to allow for fast bcopy 127 * alignment. 128 * Req: IDN_DATA_SIZE <= 129 * (IDN_SMR_BUFSIZE - sizeof (smr_pkthdr_t) - IDN_ALIGNSIZE) 130 * 131 * IDN_MTU (indirectly tunable via IDN_SMR_BUFSIZE) 132 * 133 * This size represents the portion of an SMR I/O buffers that can 134 * contain (ethernet headerless) data. 135 * Req: IDN_MTU <= IDN_DATA_SIZE - sizeof (ether_header) 136 * 137 * IDN_WINDOW_MAX (driver.conf) 138 * 139 * Maximum number of outstanding packets that are allowed per 140 * domain. If this value is exceeded for a particular domain 141 * no further I/Os will be transmitted to that domain until it 142 * has acknowledged enough of the previous transmission to bring 143 * down its outstanding I/O count (idn_domain.dio) below this 144 * value. In addition, if this value is exceeded then a Timer 145 * is scheduled to check for any response from the remote domain. 146 * 147 * IDN_WINDOW_INCR (driver.conf) 148 * 149 * As more channels/nets are activated on a particular domain 150 * the greater the number of possible outstanding data packets 151 * that can be outstanding to a given domain. Since this natural 152 * occurence can result in the outstanding-I/O count to a given 153 * domain to increase we run the risk of dropping into the 154 * IDN_WINDOW_MAX region even though the receiving domain 155 * may be fine with handling the load. In order to compensate 156 * for this increased activity and to not incur unjustified 157 * slips into the IDN_WINDOW_MAX region, the IDN_WINDOW_MAX 158 * value is adjusted by IDN_WINDOW_INCR for each channel/net 159 * that is activated for a given domain. 160 * 161 * IDN_WINDOW_EMAX (not tunable) 162 * 163 * The effective value of IDN_WINDOW_MAX once it has 164 * been adjusted by IDN_WINDOW_INCR. 165 * 166 * IDN_RECLAIM_MIN (driver.conf) 167 * 168 * Minimum number of outstanding packets that our allowed 169 * before subsequent sends will attempt to reclaim some number 170 * of outstanding data packets. 171 * 172 * IDN_RECLAIM_MAX (driver.conf) 173 * This value represents the maximum number of outstanding 174 * packets we will try to reclaim during a send once we've 175 * passed the IDN_RECLAIM_MIN boundary. 176 * 177 * IDN_MODUNLOADABLE (ndd) 178 * 179 * By default the IDN driver is unloadable. Setting this 180 * variable will allow the IDN driver to be unloaded provided 181 * it's not in use. 182 * 183 * IDN_LOWAT/IDN_HIWAT (driver.conf) 184 * 185 * Low/High water marks for the STREAM interface to IDN. 186 * 187 * IDN_MBOX_PER_NET (driver.conf) 188 * 189 * Number of mailbox entries that are allocated per channel/net. 190 * This value effectively represents the amount of outstanding 191 * activity that can reside at a domain. Increasing this value 192 * allows more packets to be in transit to a domain, however 193 * at some point there are diminishing returns since the receiver 194 * can only consume packets so fast. 195 * 196 * IDN_MAX_NETS (driver.conf) 197 * 198 * Maximum number of network interfaces (channels) that IDN 199 * is currently configured to allow. The absolute max is 200 * IDN_MAXMAX_NETS. We don't automatically default IDN_MAX_NETS 201 * to IDN_MAXMAX_NETS because it would mean wasted space in 202 * the mailbox region having to reserve mailboxes that will 203 * very likely go unused. The smaller this value the fewer 204 * the number of mailboxes in the SMR and thus the greater the 205 * number of possible I/O buffers available. 206 * Req: IDN_MAX_NETS <= IDN_MAXMAX_NETS 207 * 208 * IDN_CHECKSUM (driver.conf) 209 * 210 * If enabled, IDN validates the smr_pkthdr_t of incoming packets 211 * via a checksum, and calculates the checksum for outgoing packets. 212 * Only the first 3 fields of smr_pkthdr_t are checksummed and 213 * must be set to their expected values prior to calculating the 214 * checksum. Turned OFF by default when compiled DEBUG. 215 * 216 * IDN_SMR_MAXSIZE (not tunable) 217 * 218 * The absolute maximum size of the SMR region that we'll allow. 219 * Note that the virtual address space comes out kernelmap. 220 */ 221 #define IDN_AWOLMSG_INTERVAL 60 /* seconds */ 222 #define IDN_MSGWAIT_NEGO 20 /* seconds */ 223 #define IDN_MSGWAIT_CFG 40 224 #define IDN_MSGWAIT_CON 20 225 #define IDN_MSGWAIT_FIN 40 226 #define IDN_MSGWAIT_CMD 40 227 #define IDN_MSGWAIT_DATA 30 228 #define IDN_RETRYFREQ_NEGO 2 229 #define IDN_RETRYFREQ_CON 2 230 #define IDN_RETRYFREQ_FIN 3 231 232 #define IDN_SMR_BUFSIZE_MIN 512 233 #define IDN_SMR_BUFSIZE_MAX (512*1024) 234 #define IDN_SMR_BUFSIZE_DEF (16*1024) 235 236 #define IDN_SMR_SHIFT (16) 237 #define IDN_SMR_ALIGN (1 << IDN_SMR_SHIFT) /* 64K */ 238 #define IDN_SMR_SIZE idn_smr_size 239 #define IDN_NWR_SIZE idn_nwr_size 240 #define IDN_SMR_BUFSIZE idn_smr_bufsize 241 #define IDN_DATA_SIZE (IDN_SMR_BUFSIZE \ 242 - sizeof (smr_pkthdr_t) \ 243 - IDN_ALIGNSIZE) 244 #define IDN_MTU (IDN_DATA_SIZE - sizeof (struct ether_header)) 245 #define IDN_WINDOW_MAX idn_window_max 246 #define IDN_WINDOW_INCR idn_window_incr 247 #define IDN_WINDOW_EMAX idn_window_emax 248 #define IDN_RECLAIM_MIN idn_reclaim_min 249 #define IDN_RECLAIM_MAX idn_reclaim_max 250 #define IDN_MODUNLOADABLE idn_modunloadable 251 #define IDN_LOWAT idn_lowat 252 #define IDN_HIWAT idn_hiwat 253 #define IDN_MBOX_PER_NET idn_mbox_per_net 254 #define IDN_MAX_NETS idn_max_nets 255 #define IDN_CHECKSUM idn_checksum 256 #define IDN_SMR_MAXSIZE 96 257 #define _IDN_SMR_SIZE 32 /* 32M */ 258 #define _IDN_NWR_SIZE _IDN_SMR_SIZE /* 32M */ 259 #define _IDN_SMR_BUFSIZE (16 * 1024) /* 16K */ 260 261 262 #define IDN_TUNEVAR_NAME(v) (*(char **)((ulong_t)&(v)+(sizeof (ulong_t)))) 263 #define IDN_TUNEVAR_VALUE(v) (v) 264 265 /* 266 * History structure to support problem analysis. 267 */ 268 #define IDN_HISTORY_NUM 1024 269 #define IDN_HISTORY_LOG(op, d0, d1, d2) \ 270 if (idn_history) { \ 271 mutex_enter(&idnhlog.h_mutex); \ 272 idnhlog.h_log[idnhlog.h_index].e_time = TIMESTAMP(); \ 273 idnhlog.h_log[idnhlog.h_index].e_op = (ushort_t)(op); \ 274 idnhlog.h_log[idnhlog.h_index].e_data[0] = (ushort_t)(d0); \ 275 idnhlog.h_log[idnhlog.h_index].e_data[1] = (ushort_t)(d1); \ 276 idnhlog.h_log[idnhlog.h_index].e_data[2] = (ushort_t)(d2); \ 277 idnhlog.h_index++; \ 278 idnhlog.h_index &= (IDN_HISTORY_NUM - 1); \ 279 mutex_exit(&idnhlog.h_mutex); \ 280 } 281 282 #define IDNH_GSTATE 0x0001 /* d0=gstate, d1=, d2= */ 283 #define IDNH_DSTATE 0x0002 /* d0=domid, d1=dstate, d2=cpuid */ 284 #define IDNH_AWOL 0x0003 /* d0=domid, d1=dstate, d2=cpuid */ 285 #define IDNH_MASTERID 0x0004 /* d0=masterid, d1=oldid, d2= */ 286 #define IDNH_NEGO 0x0005 /* d0=domid, d1=ds_trans_on, d2=ds_connected */ 287 #define IDNH_FIN 0x0006 /* d0=domid, d1=finstate, d2= */ 288 #define IDNH_RELINK 0x0007 /* d0=domid, d1=dstate, d2=ds_relink */ 289 290 struct idn_h_entry { 291 hrtime_t e_time; 292 ushort_t e_op; 293 ushort_t e_data[3]; 294 }; 295 296 struct idn_history { 297 kmutex_t h_mutex; 298 int h_index; 299 struct idn_h_entry h_log[IDN_HISTORY_NUM]; 300 }; 301 #endif /* _KERNEL */ 302 303 /* 304 * IDN_SIGBPIL - Interrupt level at which IDN driver 305 * wakes up idn_sigbhandler_thread 306 */ 307 #define IDN_SIGBPIL PIL_3 308 309 /* 310 * Definition of sigbintr.sb_busy values which 311 * represents state of idn_sigbhandler. 312 */ 313 #define IDNSIGB_NOTREADY ((uchar_t)0) 314 #define IDNSIGB_INACTIVE ((uchar_t)1) 315 #define IDNSIGB_STARTED ((uchar_t)2) 316 #define IDNSIGB_ACTIVE ((uchar_t)3) 317 #define IDNSIGB_DIE ((uchar_t)4) 318 319 /* 320 * Some Xfire based macros that assume 4 cpus per board. 321 */ 322 #define CPUID_TO_BOARDID(c) ((c) >> 2) 323 #define MAX_CPU_PER_BRD 4 324 #define CPUSET_TO_BOARDSET(cset, bset) \ 325 { \ 326 register int c, b; \ 327 (bset) = 0; \ 328 for (b = 0; b < MAX_BOARDS; b++) \ 329 for (c = 0; c < MAX_CPU_PER_BRD; c++) \ 330 if (CPU_IN_SET((cset), \ 331 (b * MAX_CPU_PER_BRD) + c)) \ 332 (bset) |= 1 << b; \ 333 } 334 335 /* 336 * Macros to manipulate boardset and domainset masks. 337 */ 338 typedef ushort_t boardset_t; /* assumes max of 16 boards */ 339 typedef ushort_t domainset_t; /* assumes max of 16 domains */ 340 341 #define BOARDSET(brd) ((boardset_t)(1 << (brd))) 342 #define BOARDSET_ALL ((boardset_t)~0) 343 #define BOARD_IN_SET(set, brd) ((set) & BOARDSET(brd)) 344 #define BOARDSET_ADD(set, brd) ((set) |= BOARDSET(brd)) 345 #define BOARDSET_DEL(set, brd) ((set) &= ~BOARDSET(brd)) 346 #define DOMAINSET(d) ((domainset_t)1 << (d)) 347 #define DOMAINSET_ALL ((domainset_t)~0) 348 #define DOMAIN_IN_SET(s, d) ((s) & DOMAINSET(d)) 349 #define DOMAINSET_ADD(s, d) ((s) |= DOMAINSET(d)) 350 #define DOMAINSET_DEL(s, d) ((s) &= ~DOMAINSET(d)) 351 352 /* 353 * PFN_TO_SMADDR macro converts a PFN to a IDN_SMR_ALIGN'ed 354 * address suitable for the CIC bar/lar registers. 355 */ 356 #if (IDN_SMR_SHIFT <= MMU_PAGESHIFT) 357 #define PFN_TO_SMADDR(pfn) ((pfn) << (MMU_PAGESHIFT - IDN_SMR_SHIFT)) 358 #else 359 #define PFN_TO_SMADDR(pfn) ((pfn) >> (IDN_SMR_SHIFT - MMU_PAGESHIFT)) 360 #endif 361 362 /* 363 * Translate a physical address to a unique domain identifier. 364 * IMPORTANT - Assumes each board's memory is configured on a 8GB 365 * boundary. PA(8G) = PFN(1M). 366 */ 367 #define MEM8G_SHIFT 33 /* (1 << 33) == 8G */ 368 #define PADDR_TO_DOMAINID(paddr) ((int)((paddr) >> MEM8G_SHIFT) & 0xf) 369 370 #define VALID_NWROFFSET(off, align) \ 371 (((uint_t)(off) >= 0) && \ 372 ((size_t)(off) < MB2B(IDN_NWR_SIZE)) && \ 373 !((uint_t)(off) & ((align) - 1))) 374 #define VALID_NWRADDR(addr, align) \ 375 (((caddr_t)(addr) >= idn.smr.vaddr) && \ 376 VALID_NWROFFSET(((caddr_t)(addr) - idn.smr.vaddr), (align))) 377 #define VALID_DOMAINID(d) (((d) >= 0) && ((d) < MAX_DOMAINS)) 378 #define VALID_UDOMAINID(d) ((d) < MAX_DOMAINS) 379 #define VALID_CPUID(c) (((c) >= 0) && ((c) < NCPU)) 380 #define VALID_CHANNEL(c) (((c) >= 0) && ((c) < IDN_MAX_NETS)) 381 #define VALID_UCHANNEL(c) ((c) < IDN_MAX_NETS) 382 383 /* 384 * The following are bit values of idn_debug, currently 385 * only useful if compiled with DEBUG. 386 */ 387 #ifdef DEBUG 388 #define STRING(sss) char sss[20] 389 #define INUM2STR(mm, ss) inum2str((mm), (ss)) 390 391 #define IDNDBG_XDC 0x00000001 392 #define IDNDBG_XF 0x00000002 393 #define IDNDBG_REGS 0x00000004 394 #define IDNDBG_SMR 0x00000008 395 #define IDNDBG_PROTO 0x00000010 396 #define IDNDBG_STR 0x00000020 397 #define IDNDBG_DRV 0x00000040 398 #define IDNDBG_DATA 0x00000080 399 #define IDNDBG_STATE 0x00000100 400 #define IDNDBG_DLPI 0x00000200 401 #define IDNDBG_KERN 0x00000400 402 #define IDNDBG_ALLOC 0x00000800 403 #define IDNDBG_REMAP 0x00001000 404 #define IDNDBG_TIMER 0x00002000 405 #define IDNDBG_CHAN 0x00004000 406 #define IDNDBG_AWOL 0x00008000 407 #define IDNDBG_SYNC 0x00010000 408 #define _IDNDBG_UNUSED0 0x00020000 409 #define IDNDBG_HITLIST 0x00040000 410 #define IDNDBG_XMON 0x00080000 411 #define IDNDBG_TEST 0x80000000 412 #define IDNDBG_ALL ((uint_t)-1) 413 414 #define PR_ALL if (idn_debug) printf 415 #define PR_XDC if (idn_debug & IDNDBG_XDC) printf 416 #define PR_XF if (idn_debug & IDNDBG_XF) printf 417 #define PR_REGS if (idn_debug & IDNDBG_REGS) printf 418 #define PR_SMR if (idn_debug & IDNDBG_SMR) printf 419 #define PR_PROTO if (idn_debug & IDNDBG_PROTO) printf 420 #define PR_STR if (idn_debug & IDNDBG_STR) printf 421 #define PR_DRV if (idn_debug & IDNDBG_DRV) printf 422 #define PR_DATA if (idn_debug & IDNDBG_DATA) printf 423 #define PR_STATE if (idn_debug & IDNDBG_STATE) printf 424 #define PR_DLPI if (idn_debug & IDNDBG_DLPI) printf 425 #define PR_KERN if (idn_debug & IDNDBG_KERN) printf 426 #define PR_ALLOC if (idn_debug & IDNDBG_ALLOC) printf 427 #define PR_REMAP if (idn_debug & (IDNDBG_SMR|IDNDBG_REMAP)) printf 428 #define PR_TIMER if (idn_debug & IDNDBG_TIMER) printf 429 #define PR_CHAN if (idn_debug & IDNDBG_CHAN) printf 430 #define PR_AWOL if (idn_debug & (IDNDBG_PROTO|IDNDBG_AWOL)) printf 431 #define PR_SYNC if (idn_debug & IDNDBG_SYNC) printf 432 #define _PR_UNUSED0 if (idn_debug & _IDNDBG_UNUSED0) printf 433 #define PR_HITLIST if (idn_debug & IDNDBG_HITLIST) printf 434 #define PR_XMON if (idn_debug & IDNDBG_XMON) printf 435 #define PR_TEST if (idn_debug & IDNDBG_TEST) printf 436 #else 437 #define STRING(sss) char *sss = "" 438 #define INUM2STR(mm, ss) 439 440 #define PR_ALL if (0) printf 441 #define PR_XDC PR_ALL 442 #define PR_XF PR_ALL 443 #define PR_REGS PR_ALL 444 #define PR_SMR PR_ALL 445 #define PR_PROTO PR_ALL 446 #define PR_STR PR_ALL 447 #define PR_DRV PR_ALL 448 #define PR_DATA PR_ALL 449 #define PR_STATE PR_ALL 450 #define PR_DLPI PR_ALL 451 #define PR_KERN PR_ALL 452 #define PR_ALLOC PR_ALL 453 #define PR_REMAP PR_ALL 454 #define PR_TIMER PR_ALL 455 #define PR_CHAN PR_ALL 456 #define PR_AWOL PR_ALL 457 #define PR_SYNC PR_ALL 458 #define PR_SNOOP PR_ALL 459 #define PR_HITLIST PR_ALL 460 #define PR_XMON PR_ALL 461 #define PR_TEST PR_ALL 462 #endif /* DEBUG */ 463 464 #ifdef _KERNEL 465 /* 466 * IDN drivers fields. 467 * 468 * IDNMINPSZ Minimum packet size the IDN supports. 469 * 470 * IDNMAXPSZ Maximum packet size that IDN supports from upper 471 * layers. Is equal to IDN_MTU + ether_header. Note 472 * that the IDN driver could support larger packets 473 * however the infrastructure to support fragmentation 474 * does not (and should not) exist with respect to 475 * ethernet packet types. 476 */ 477 #ifdef DEBUG 478 #define IDNDESC "Inter-Domain Network (DEBUG)" 479 #else 480 #define IDNDESC "Inter-Domain Network" 481 #endif /* DEBUG */ 482 483 #define IDNIDNUM 8264 484 #define IDNNAME "idn" 485 #define IDNMINPSZ 0 /* set at idnopen() */ 486 #define IDNMAXPSZ 0 /* set at idnopen() */ 487 488 #endif /* _KERNEL */ 489 490 /* 491 * IDN Global States. 492 */ 493 typedef enum { 494 /* 0 */ IDNGS_OFFLINE = 0, /* idle */ 495 /* 1 */ IDNGS_CONNECT, /* connecting initial domain */ 496 /* 2 */ IDNGS_ONLINE, /* master selected */ 497 /* 3 */ IDNGS_DISCONNECT, /* local is unlinking */ 498 /* 4 */ IDNGS_RECONFIG, /* selecting new master */ 499 /* 5 */ _IDNGS_UNUNSED5, 500 /* 6 */ _IDNGS_UNUNSED6, 501 /* 7 */ _IDNGS_UNUNSED7, 502 /* 8 */ _IDNGS_UNUNSED8, 503 /* 9 */ _IDNGS_UNUNSED9, 504 /* 10 */ IDNGS_IGNORE /* ignore requests (fault injection) */ 505 } idn_gstate_t; 506 507 #ifdef _KERNEL 508 509 #define TIMESTAMP() (gethrtime() / 1000000ull) 510 511 /* 512 * Spaced defined in: 513 * sigblkp[cpu0.cpu_id]->sigb_idn.reserved1. 514 */ 515 #define IDNSB_GSTATE_NEW 0 516 #define IDNSB_GSTATE_OLD 1 517 #define IDNSB_MASTERCPU 2 518 #define IDNSB_RESERVED 3 519 520 #define IDNSB_HWCHKPT_MAX 4 521 522 #define IDNSB_SIZE 72 523 /* 524 * This structure gets overlay onto: 525 * sigblkp[cpu0.cpu_id]->sigb_idn.reserved1. 526 * 527 * This structure must be exactly IDNSB_SIZE bytes. 528 */ 529 typedef struct idnsb { 530 uchar_t id_gstate; 531 uchar_t id_pgstate; 532 uchar_t id_master_board; 533 uchar_t id_pmaster_board; 534 535 uchar_t reserved_DO_NOT_USE[24]; /* idnevent_t field */ 536 537 struct { 538 uchar_t d_board; 539 uchar_t d_state; 540 } id_status[MAX_DOMAINS]; 541 uint_t id_hwstate; 542 ushort_t id_hwchkpt[IDNSB_HWCHKPT_MAX]; 543 } idnsb_t; /* sizeof = 72 (0x48) 18X bytes */ 544 545 546 #define IDNSB_DOMAIN_UPDATE(dp) \ 547 { \ 548 mutex_enter(&idn.idnsb_mutex); \ 549 if (idn.idnsb) { \ 550 int domid = (dp)->domid; \ 551 if ((dp)->dcpu == IDN_NIL_DCPU) \ 552 idn.idnsb->id_status[domid].d_board = \ 553 (uchar_t)0xff; \ 554 else if ((dp)->dvote.v.board == 0) \ 555 idn.idnsb->id_status[domid].d_board = \ 556 (uchar_t)CPUID_TO_BOARDID((dp)->dcpu); \ 557 else \ 558 idn.idnsb->id_status[domid].d_board = \ 559 (uchar_t)(dp)->dvote.v.board; \ 560 idn.idnsb->id_status[domid].d_state = \ 561 (uchar_t)(dp)->dstate; \ 562 } \ 563 mutex_exit(&idn.idnsb_mutex); \ 564 } 565 /* 566 * The following definitions and macros pertain to the 567 * id_hwstate and id_hwchkpt[] fields. 568 * 569 * id_hwstate (m = mark: 1=open, 2=close) 570 * 0 1 2 3 4 5 6 7 571 * --------------------------------- 572 * | m | m | m | m | XX unused XXX | 573 * --------------------------------- 574 * | | | | 575 * | | | +- CACHE 576 * | | +- CHAN 577 * | +- LINK 578 * +- SMR 579 * 580 * Note that nibble 4 is used in DEBUG for noting cache 581 * flush progress through idnxf_flushall_ecache(). This 582 * will override id_hwchkpt[] since it only has room for 583 * 4 items, however the BBSRAM space is there and 584 * unofficially available :-o 585 * 586 * id_hwchkpt[0] = SMR boardset 587 * id_hwchkpt[1] = LINK boardset 588 * id_hwchkpt[2] = CHAN boardset 589 * id_hwchkpt[3] = CACHE boardset. 590 */ 591 #define IDNSB_CHKPT_SMR 0 592 #define IDNSB_CHKPT_LINK 1 593 #define IDNSB_CHKPT_CHAN 2 594 #define IDNSB_CHKPT_CACHE 3 595 #define IDNSB_CHKPT_UNUSED 4 /* This is the max you can have */ 596 597 #define _CHKPT_MARKIT(item, mark) \ 598 { \ 599 uint_t mk = (((uint_t)((mark) & 0xf)) << \ 600 (((sizeof (uint_t) << 1) - 1 - (item)) << 2)); \ 601 uint_t *sp = &idn.idnsb->id_hwstate; \ 602 ASSERT(idn.idnsb); \ 603 *sp &= ~(((uint_t)0xf) << (((sizeof (uint_t) << 1) \ 604 - 1 - (item)) << 2)); \ 605 *sp |= mk; \ 606 } 607 608 #define CHECKPOINT_OPENED(item, bset, mark) \ 609 { \ 610 mutex_enter(&idn.idnsb_mutex); \ 611 if (idn.idnsb) { \ 612 ushort_t *sp = &idn.idnsb->id_hwchkpt[0]; \ 613 _CHKPT_MARKIT((item), (mark)); \ 614 sp[item] |= ((ushort_t)(bset)); \ 615 } \ 616 mutex_exit(&idn.idnsb_mutex); \ 617 } 618 619 #define CHECKPOINT_CLOSED(item, bset, mark) \ 620 { \ 621 mutex_enter(&idn.idnsb_mutex); \ 622 if (idn.idnsb) { \ 623 ushort_t *sp = &idn.idnsb->id_hwchkpt[0]; \ 624 _CHKPT_MARKIT((item), (mark)); \ 625 sp[item] &= (ushort_t)~(bset); \ 626 } \ 627 mutex_exit(&idn.idnsb_mutex); \ 628 } 629 630 #define CHECKPOINT_CLEAR(item, mark) \ 631 { \ 632 mutex_enter(&idn.idnsb_mutex); \ 633 if (idn.idnsb) { \ 634 ushort_t *sp = &idn.idnsb->id_hwchkpt[0]; \ 635 _CHKPT_MARKIT((item), (mark)); \ 636 sp[item] = 0; \ 637 } \ 638 mutex_exit(&idn.idnsb_mutex); \ 639 } 640 #ifdef DEBUG 641 #define CHECKPOINT_CACHE_CLEAR_DEBUG(mark) \ 642 CHECKPOINT_CLEAR(IDNSB_CHKPT_UNUSED, (mark)) 643 #define CHECKPOINT_CACHE_STEP_DEBUG(bset, mark) \ 644 CHECKPOINT_OPENED(IDNSB_CHKPT_UNUSED, (bset), (mark)) 645 #else 646 #define CHECKPOINT_CACHE_CLEAR_DEBUG(mark) 647 #define CHECKPOINT_CACHE_STEP_DEBUG(bset, mark) 648 #endif /* DEBUG */ 649 650 651 #ifdef DEBUG 652 #define IDN_GSTATE_TRANSITION(ns) \ 653 { \ 654 hrtime_t tstamp; \ 655 /*LINTED*/ \ 656 IDN_HISTORY_LOG(IDNH_GSTATE, (ns), 0, 0); \ 657 tstamp = TIMESTAMP(); \ 658 ASSERT(IDN_GLOCK_IS_EXCL()); \ 659 PR_STATE("GSTATE:%ld: (l=%d) %s(%d) -> %s(%d)\n", \ 660 (uint64_t)tstamp, __LINE__, \ 661 idngs_str[idn.state], idn.state, \ 662 idngs_str[ns], (ns)); \ 663 mutex_enter(&idn.idnsb_mutex); \ 664 if (idn.idnsb) { \ 665 idn.idnsb->id_pgstate = (uchar_t)idn.state; \ 666 idn.idnsb->id_gstate = (uchar_t)(ns); \ 667 } \ 668 mutex_exit(&idn.idnsb_mutex); \ 669 idn.state = (ns); \ 670 } 671 #else 672 #define IDN_GSTATE_TRANSITION(ns) \ 673 { \ 674 IDN_HISTORY_LOG(IDNH_GSTATE, (ns), 0, 0); \ 675 mutex_enter(&idn.idnsb_mutex); \ 676 if (idn.idnsb) { \ 677 idn.idnsb->id_pgstate = (uchar_t)idn.state; \ 678 idn.idnsb->id_gstate = (uchar_t)(ns); \ 679 } \ 680 mutex_exit(&idn.idnsb_mutex); \ 681 idn.state = (ns); \ 682 } 683 #endif /* DEBUG */ 684 685 /* 686 * IDN link/unlink operations occur asynchronously with respect to the 687 * caller. The following definitions are to support the return of 688 * success/failure back to the original requesting thread. It's 689 * unlikely to have multiple outstanding link/unlink requests so we 690 * just provide a very small cache of waiting list entries. If the 691 * cache becomes exhausted then additional ones are kmem_alloc'd. 692 */ 693 #define IDNOP_CACHE_SIZE 3 694 #define IDNOP_IN_CACHE(dwl) \ 695 (((dwl) >= &idn.dopers->_dop_wcache[0]) && \ 696 ((dwl) < &idn.dopers->_dop_wcache[IDNOP_CACHE_SIZE])) 697 698 typedef struct dop_waitlist { 699 struct dop_waitlist *dw_next; 700 domainset_t dw_reqset; 701 domainset_t dw_domset; 702 short dw_op; 703 domainset_t dw_errset; 704 idnsb_error_t *dw_idnerr; 705 short dw_errors[MAX_DOMAINS]; 706 } dop_waitlist_t; 707 708 typedef uint_t idn_xdcargs_t[4]; 709 typedef uint_t idn_chanset_t; 710 711 /* 712 * Types of synchronization zones which a connection 713 * could be in. 714 */ 715 typedef enum { 716 IDNSYNC_NIL, 717 IDNSYNC_CONNECT, 718 IDNSYNC_DISCONNECT 719 } idn_synccmd_t; 720 721 /* 722 * Type of sync-registration that is being requested. 723 */ 724 typedef enum { 725 IDNSYNC_REG_REG, 726 IDNSYNC_REG_NEW, 727 IDNSYNC_REG_QUERY 728 } idn_syncreg_t; 729 730 #define IDN_SYNC_NUMZONE 3 731 #define IDN_SYNC_GETZONE(s) ((((s) != IDNSYNC_CONNECT) && \ 732 ((s) != IDNSYNC_DISCONNECT)) ? \ 733 -1 : (int)(s) - 1) 734 #define IDN_SYNC_GETTRANS(s) (((s) == IDNSYNC_CONNECT) ? \ 735 idn.domset.ds_trans_on : \ 736 ((s) == IDNSYNC_DISCONNECT) ? \ 737 idn.domset.ds_trans_off : 0) 738 739 /* 740 * Generic states when in a state transition region. 741 * These ultimately map to domain states via 742 * a idn_xphase_t definition. General model: 743 * 744 * PEND 745 * /\ 746 * / \ 747 * | | 748 * V V 749 * SENT--->RCVD 750 * \ / 751 * \ / 752 * VV 753 * FINAL 754 * 755 * Start these types with PEND = 0 so that they're 756 * compatible with idnxs_state_table[] and idn_xphase_t 757 * phases that use the value as an index. 758 */ 759 typedef enum { 760 /* 0 */ IDNXS_PEND = 0, 761 /* 1 */ IDNXS_SENT, 762 /* 2 */ IDNXS_RCVD, 763 /* 3 */ IDNXS_FINAL, 764 /* 4 */ IDNXS_NIL 765 } idn_xstate_t; 766 767 /* 768 * Locking protocol: 769 * 770 * Each routine is called with SYNC_LOCK and 771 * the respective domain's DLOCK(EXCL) held. 772 * The routines must return with these locks 773 * still held. 774 */ 775 struct idn_msgtype; 776 777 typedef struct { 778 int t_state; 779 int (*t_check)(int domid, struct idn_msgtype *mtp, 780 idn_xdcargs_t xargs); 781 void (*t_action)(int domid, struct idn_msgtype *mtp, 782 idn_xdcargs_t xargs); 783 void (*t_error)(int domid, struct idn_msgtype *mtp, 784 idn_xdcargs_t xargs); 785 } idn_trans_t; 786 787 /* 788 * The callback routines (xt_final & xt_exit) are called with 789 * DLOCK and SYNC_LOCK held and they are required to return 790 * with these locks still held. 791 */ 792 typedef struct { 793 uint_t xt_msgtype; 794 idn_trans_t xt_trans[4]; 795 void (*xt_final)(int domid); 796 void (*xt_exit)(int domid, uint_t msgtype); 797 } idn_xphase_t; 798 799 /* 800 * Synchronization entry representing the synchronization 801 * state with respect to a given domain for a given zone. 802 */ 803 typedef struct idn_syncop { 804 struct idn_syncop *s_next; 805 int s_domid; 806 idn_synccmd_t s_cmd; 807 int s_msg; 808 809 domainset_t s_set_exp; 810 domainset_t s_set_rdy; 811 int (*s_transfunc)(int domid, void *arg); 812 void *s_transarg; 813 #ifdef DEBUG 814 int s_query[MAX_DOMAINS]; 815 #endif /* DEBUG */ 816 } idn_syncop_t; 817 818 #ifdef DEBUG 819 #define IDN_SYNC_QUERY_INIT(d) \ 820 (bzero((caddr_t)idn_domain[d].dsync.s_query, \ 821 sizeof (idn_domain[d].dsync.s_query))) 822 #define IDN_SYNC_QUERY_UPDATE(md, sd) (idn_domain[md].dsync.s_query[sd]++) 823 #else /* DEBUG */ 824 #define IDN_SYNC_QUERY_INIT(d) 825 #define IDN_SYNC_QUERY_UPDATE(md, sd) 826 #endif /* DEBUG */ 827 828 typedef struct { 829 idn_syncop_t *sc_op; 830 int sc_cnt; 831 } idn_synczone_t; 832 833 #endif /* _KERNEL */ 834 835 /* 836 * Vote Ticket used during negotiations and elections. 837 * 838 * 31 0 839 * ----------------------------------------- 840 * |m...|....|pppp|....|Cbbb|bccc|cccB|BBB1| 841 * ----------------------------------------- 842 * m [31] = master/slave 843 * . [30:24] = unused 844 * p [23:20] = priority 845 * . [19:16] = unused 846 * C [15] = connected (has master) 847 * b [14:11] = nmembrds-1 848 * c [10:5] = ncpus-1 849 * B [4:1] = board_id 850 * 1 [0] = one 851 */ 852 typedef union { 853 struct { 854 uint_t master :1; 855 uint_t unused0 :7; 856 uint_t priority :4; 857 uint_t unused1 :4; 858 uint_t connected :1; 859 uint_t nmembrds :4; 860 uint_t ncpus :6; 861 uint_t board :4; 862 uint_t one :1; 863 } v; 864 uint_t ticket; 865 } idn_vote_t; 866 867 #define IDNVOTE_PRI_MASK 0xf 868 #define IDNVOTE_MAXPRI 0xf 869 #define IDNVOTE_MINPRI 0 870 #define IDNVOTE_DEFPRI 1 /* must be larger than MINPRI */ 871 /* 872 * Initially: 873 * vote.v.priority = IDNVOTE_DEFPRI 874 * vote.v.one = 1 875 */ 876 #define IDNVOTE_INITIAL_TICKET ((IDNVOTE_DEFPRI << 20) | 1) 877 #define IDNVOTE_PRIVALUE(vvv) \ 878 ((int)vvv.v.priority + ((int)vvv.v.master ? IDNVOTE_MAXPRI : 0)) 879 880 /* 881 * During elections we only use the "elect" attributes of the 882 * election ticket, i.e. those physical attributes pertaining 883 * to the individual domain (priority, nboards, ncpus, board). 884 */ 885 #define IDNVOTE_ELECT_MASK 0x00f07fff 886 #define IDNVOTE_ELECT(tkt) ((tkt).ticket & IDNVOTE_ELECT_MASK) 887 #define IDNVOTE_BASICS_MASK 0x00f0ffff 888 #define IDNVOTE_BASICS(tkt) ((tkt).ticket & IDNVOTE_BASICS_MASK) 889 890 /* 891 * Values used in idn_select_master(). 892 */ 893 #define MASTER_IS_NONE 0 /* index into master_select_table */ 894 #define MASTER_IS_OTHER 1 895 #define MASTER_IS_LOCAL 2 896 #define MASTER_IS_REMOTE 3 897 898 typedef enum { 899 MASTER_SELECT_VOTE, 900 MASTER_SELECT_VOTE_RCFG, 901 MASTER_SELECT_CONNECT, 902 MASTER_SELECT_REMOTE, 903 MASTER_SELECT_LOCAL, 904 MASTER_SELECT_WAIT, 905 MASTER_SELECT_ERROR 906 } idn_master_select_t; 907 908 /* 909 * Used to synchronize completion of link/unlink with respect to 910 * the original requester (user). Necessary since link establishment 911 * occurs asynchronously. 912 */ 913 typedef enum { 914 /* 0 */ IDNOP_DISCONNECTED, /* successfully disconnected */ 915 /* 1 */ IDNOP_CONNECTED, /* successfully established */ 916 /* 2 */ IDNOP_ERROR /* error trying to link/unlink */ 917 } idn_opflag_t; 918 919 /* 920 * IDN Protocol Messages. 921 * These are IDN version (IDN_VERSION) dependent. 922 * 923 * ----- 7, --- 6,5.................0 924 * | ack | nack | IDN message type | 925 * ---------------------------------- 926 */ 927 #define IDN_VERSION 1 928 929 /* 930 * Must be no more than 6-bits. See DMV private data. 931 */ 932 #define IDNP_ACK 0x20 933 #define IDNP_NACK 0x10 934 #define IDNP_NULL 0x00 935 #define IDNP_NEGO 0x01 936 #define IDNP_CON 0x02 937 #define IDNP_CFG 0x03 938 #define IDNP_FIN 0x04 939 #define IDNP_CMD 0x05 940 #define IDNP_DATA 0x06 941 942 #define IDN_NUM_MSGTYPES 7 943 #define IDNP_ACKNACK_MASK (IDNP_ACK | IDNP_NACK) 944 #define IDNP_MSGTYPE_MASK 0x0f 945 #define VALID_MSGTYPE(m) (((m) >= IDNP_NEGO) && ((m) < IDN_NUM_MSGTYPES)) 946 947 typedef struct idn_msgtype { 948 ushort_t mt_mtype; 949 ushort_t mt_atype; 950 ushort_t mt_cookie; 951 } idn_msgtype_t; 952 953 /* 954 * IDN private data section of DMV layout (48 bits). 955 * 956 * 47......40,39.....34,33.....28,27..24,23......16,15..............0 957 * | version | msgtype | acktype | did | cpuid | cookie | 958 * ------------------------------------------------------------------ 959 * 960 * version Local domain's version of IDN software. 961 * msgtype Type of IDN message, e.g. nego, syn, etc. 962 * acktype If msgtype is a ACK or NACK, then acktype is the 963 * type of ack that we're receiving, e.g. ack/nego|ack. 964 * did Local domain's ID (netid) - system-wide unique. 965 * cpuid Local domain's CPU->cpu_id that sending message. 966 * cookie Cookie assigned by remote domain for authentication. 967 * For NEGO & NEGO+ACK messages, it's the cookie that 968 * the sender expects the receiver to use in subsequent 969 * messages. The upper-eight bits represent a timer 970 * cookie to associate timers with expected messages. 971 */ 972 #endif /* !_ASM */ 973 974 #ifdef _KERNEL 975 976 #define _IDNPD_COOKIE_MASK 0xffff 977 #define _IDNPD_COOKIE_SHIFT 32 978 #define _IDNPD_VER_MASK 0xff 979 #define _IDNPD_VER_SHIFT 24 980 #define _IDNPD_MTYPE_MASK 0x3f 981 #define _IDNPD_MTYPE_SHIFT 18 982 #define _IDNPD_ATYPE_MASK 0x3f 983 #define _IDNPD_ATYPE_SHIFT 12 984 #define _IDNPD_DOMID_MASK 0xf 985 #define _IDNPD_DOMID_SHIFT 8 986 #define _IDNPD_CPUID_MASK 0xff 987 #define _IDNPD_CPUID_SHIFT 0 988 989 #define _IDNPD_COOKIE_LEN 16 990 991 #ifndef _ASM 992 993 #define IDN_PD2COOKIE(pdata) \ 994 (((uint_t)((pdata) >> _IDNPD_COOKIE_SHIFT)) & _IDNPD_COOKIE_MASK) 995 #define IDN_PD2VER(pdata) \ 996 (((uint_t)((pdata) >> _IDNPD_VER_SHIFT)) & _IDNPD_VER_MASK) 997 #define IDN_PD2MTYPE(pdata) \ 998 (((uint_t)((pdata) >> _IDNPD_MTYPE_SHIFT)) & _IDNPD_MTYPE_MASK) 999 #define IDN_PD2ATYPE(pdata) \ 1000 (((uint_t)((pdata) >> _IDNPD_ATYPE_SHIFT)) & _IDNPD_ATYPE_MASK) 1001 #define IDN_PD2DOMID(pdata) \ 1002 (((uint_t)((pdata) >> _IDNPD_DOMID_SHIFT)) & _IDNPD_DOMID_MASK) 1003 #define IDN_PD2CPUID(pdata) \ 1004 (((uint_t)((pdata) >> _IDNPD_CPUID_SHIFT)) & _IDNPD_CPUID_MASK) 1005 1006 #define IDN_MAKE_PDATA(mtype, atype, cookie) \ 1007 ((((uint64_t)(cookie) & UINT64_C(_IDNPD_COOKIE_MASK)) << \ 1008 _IDNPD_COOKIE_SHIFT) | \ 1009 (((uint64_t)idn.version & UINT64_C(_IDNPD_VER_MASK)) << \ 1010 _IDNPD_VER_SHIFT) | \ 1011 (((uint64_t)(mtype) & UINT64_C(_IDNPD_MTYPE_MASK)) << \ 1012 _IDNPD_MTYPE_SHIFT) | \ 1013 (((uint64_t)(atype) & UINT64_C(_IDNPD_ATYPE_MASK)) << \ 1014 _IDNPD_ATYPE_SHIFT) | \ 1015 (((uint64_t)idn.localid & UINT64_C(_IDNPD_DOMID_MASK)) << \ 1016 _IDNPD_DOMID_SHIFT) | \ 1017 (((uint64_t)CPU->cpu_id & UINT64_C(_IDNPD_CPUID_MASK)) << \ 1018 _IDNPD_CPUID_SHIFT)) 1019 1020 #define IDN_TCOOKIE(ck) (((ck) >> 8) & 0xff) 1021 #define IDN_DCOOKIE(ck) ((ck) & 0xff) 1022 #define IDN_MAKE_COOKIE(d, t) ((((t) & 0xff) << 8) | ((d) & 0xff)) 1023 1024 /* 1025 * IDNP_NEGO 1026 * 1027 * 127........96,95........64,63........32,31.........0 1028 * | vote | domainset | 1029 * ---------------------------------------------------- 1030 * vote Local/Remote domain's vote ticket. 1031 * domainset Mask of cpuids of domains to which 1032 * sender is connected. Position in domainset 1033 * designates respective domainid. 1034 * E.g. domainset[6] = 20 -> domainid 6 is 1035 * accessible via cpuid 20. 1036 * The slot for the receiving domain 1037 * contains the masterid of the sending 1038 * domain. If the sending domain does 1039 * not have a master then the entry will 1040 * contain IDNNEG_NO_MASTER. 1041 * 1042 * These macros insert a domainid-cpuid pair into the 1043 * domainset to be subsequently passed in a NEGO message, 1044 * also retrieve the cpuid from the domainset for a 1045 * given domainid. 1046 * 1047 * Usage: 1048 * Sending: 1049 * mask = IDNNEG_DSET_MYMASK(); 1050 * IDNNEG_DSET_INIT(dset, mask) 1051 * for (all domains except self) 1052 * IDNNEG_DSET_SET(dset, domain, cpuid, mask); 1053 * 1054 * Receiving: 1055 * IDNNEG_DSET_GET_MASK(dset, recv_domid, recv_mask); 1056 * for (all domains except recv_domid) 1057 * IDNNEG_DSET_GET(dset, domid, cpuid, recv_mask); 1058 */ 1059 typedef uint_t idnneg_dset_t[3]; 1060 1061 #define IDNNEG_NO_MASTER 0x3f 1062 #define __IDNNEG_DSET_CLEAR(dset) (bzero((caddr_t)(dset), \ 1063 sizeof (idnneg_dset_t))) 1064 #define IDNNEG_DSET_MYMASK() (idn_domain[idn.localid].dcpu) 1065 1066 #define IDNNEG_DSET_INIT(dset, mask) \ 1067 { \ 1068 __IDNNEG_DSET_CLEAR(dset); \ 1069 IDNNEG_DSET_SET((dset), idn.localid, (mask), idn.localid); \ 1070 } 1071 1072 #define IDNNEG_DSET_SET(dset, domid, cpuid, mask) \ 1073 { \ 1074 uint_t _s = ((domid) & 0xf) * 6; \ 1075 int _i = _s >> 5; \ 1076 uint_t _s0 = _s & 0x1f; \ 1077 uint_t _t = ((cpuid) ^ (mask)) & 0x3f; \ 1078 /*LINTED*/ \ 1079 ASSERT(((domid) == idn.localid) ? \ 1080 ((mask) == idn.localid) : ((cpuid) != (mask))); \ 1081 (dset)[_i] |= _t << _s0; \ 1082 if ((_s0 + 6) > 32) \ 1083 (dset)[_i + 1] |= _t >> (32 - _s0); \ 1084 } 1085 1086 #define __IDNNEG_DSET_GET(dset, domid, cpuid, mask, uncond) \ 1087 { \ 1088 uint_t _s = ((domid) & 0xf) * 6; \ 1089 int _i = _s >> 5; \ 1090 uint_t _s0 = _s & 0x1f; \ 1091 uint_t _s1 = (_s + 6) & 0x1f; \ 1092 (cpuid) = ((dset)[_i] >> _s0) & 0x3f; \ 1093 if ((_s0 + 6) > 32) \ 1094 (cpuid) |= ((dset)[_i + 1] << (6 - _s1)) & 0x3f; \ 1095 if ((cpuid) || (uncond)) \ 1096 (cpuid) ^= (mask) & 0x3f; \ 1097 else \ 1098 (cpuid) = -1; \ 1099 } 1100 1101 #define IDNNEG_DSET_GET_MASK(dset, domid, mask) \ 1102 __IDNNEG_DSET_GET((dset), (domid), (mask), (domid), 1) 1103 1104 #define IDNNEG_DSET_GET_MASTER(dset, master) \ 1105 __IDNNEG_DSET_GET((dset), idn.localid, (master), \ 1106 idn.localid+MAX_DOMAINS, 0) 1107 1108 #define IDNNEG_DSET_SET_MASTER(dset, domid, master) \ 1109 IDNNEG_DSET_SET((dset), (domid), (master), \ 1110 (domid)+MAX_DOMAINS) 1111 1112 #define IDNNEG_DSET_GET(dset, domid, cpuid, mask) \ 1113 __IDNNEG_DSET_GET((dset), (domid), (cpuid), (mask), 0) 1114 1115 /* 1116 * IDNP_CFG sub-types. 1117 * 1118 * Format of first 32 bit word in XDC: 1119 * stX = sub-type. 1120 * staX = sub-type arg. 1121 * X = position in idn_cfgsubtype_t.param.p[] array. 1122 * num = number of parameters in this XDC (0-3) 1123 * 1124 * 31...28,27...24,23...20,19...16,15...12,11....8,7.....3,2....0 1125 * | st0 . sta0 | st1 . sta1 | st2 . sta2 | phase | num | 1126 * -------------------------------------------------------------- 1127 * 1128 * Note that since the first 32-bit word in a (IDNP_CFG) XDC is used 1129 * for a sub-type, subsequent three 32-bits words are used for data that 1130 * pertains to respective sub-type, i.e. first sub-type corresponds 1131 * to first of the 3x32-bit words (pos=0), second sub-type corresponds 1132 * to second of the 3x32-bit words (pos=1), etc. Obviously, a max of 1133 * only three sub-types can be sent per xdc. 1134 */ 1135 #define IDNCFG_BARLAR 0x1 /* SMR base/limit pfn */ 1136 #define IDNCFGARG_BARLAR_BAR 0 /* BAR */ 1137 #define IDNCFGARG_BARLAR_LAR 1 /* LAR */ 1138 #define IDNCFG_MCADR 0x2 /* MC ADR, arg = board number */ 1139 #define IDNCFG_NMCADR 0x3 /* Number of MC ADRs to expect */ 1140 #define IDNCFG_CPUSET 0x4 /* dcpuset of remote domain */ 1141 #define IDNCFGARG_CPUSET_UPPER 0 /* 1st word */ 1142 #define IDNCFGARG_CPUSET_LOWER 1 /* 2nd word */ 1143 #define IDNCFG_NETID 0x5 /* dnetid, arg = 0 */ 1144 #define IDNCFG_BOARDSET 0x6 /* board set, arg = 0 */ 1145 #define IDNCFG_SIZE 0x7 /* SMR size parameters */ 1146 #define IDNCFGARG_SIZE_MTU 0 /* IDN_MTU */ 1147 #define IDNCFGARG_SIZE_BUF 1 /* IDN_SMR_BUFSIZE */ 1148 #define IDNCFGARG_SIZE_SLAB 2 /* IDN_SLAB_BUFCOUNT */ 1149 #define IDNCFGARG_SIZE_NWR 3 /* IDN_NWR_SIZE */ 1150 #define IDNCFG_DATAMBOX 0x8 /* SMR data mailbox info */ 1151 #define IDNCFGARG_DATAMBOX_TABLE 0 /* recvmbox table */ 1152 #define IDNCFGARG_DATAMBOX_DOMAIN 1 /* domain's recvmbox */ 1153 #define IDNCFGARG_DATAMBOX_INDEX 2 /* domain's index into table */ 1154 #define IDNCFG_DATASVR 0x9 /* Data server info */ 1155 #define IDNCFGARG_DATASVR_MAXNETS 0 /* max # of nets/channels */ 1156 #define IDNCFGARG_DATASVR_MBXPERNET 1 /* # mbox per net/channel */ 1157 #define IDNCFG_OPTIONS 0xa /* various options */ 1158 #define IDNCFGARG_CHECKSUM 0 /* IDN_CHECKSUM */ 1159 1160 #define IDN_CFGPARAM(st, sta) ((uchar_t)((((st) & 0xf) << 4) | ((sta) & 0xf))) 1161 #define IDN_CFGPARAM_TYPE(p) (((p) >> 4) & 0xf) 1162 #define IDN_CFGPARAM_ARG(p) ((p) & 0xf) 1163 1164 typedef union { 1165 struct { 1166 uchar_t p[3]; 1167 uchar_t _num_phase; /* info.num, info.phase used instead */ 1168 } param; 1169 struct { 1170 uint_t _p : 24; /* param.p[] used instead */ 1171 uint_t num : 2; 1172 uint_t phase : 6; 1173 } info; 1174 uint_t val; 1175 } idn_cfgsubtype_t; 1176 1177 /* 1178 * IDN_MASTER_NCFGITEMS 1179 * Minimum number of config items expected from master. 1180 * 1181 * IDN_SLAVE_NCFGITEMS 1182 * Number of config items expected from slave. 1183 */ 1184 #define IDN_MASTER_NCFGITEMS 17 /* max = +14 (mcadrs) */ 1185 #define IDN_SLAVE_NCFGITEMS 12 1186 1187 /* 1188 * IDNP_CMD sub-types. 1189 */ 1190 typedef enum { 1191 /* 1 */ IDNCMD_SLABALLOC = 1, /* Request to allocate a slab */ 1192 /* 2 */ IDNCMD_SLABFREE, /* Request to free a slab */ 1193 /* 3 */ IDNCMD_SLABREAP, /* Reap any free slabs */ 1194 /* 4 */ IDNCMD_NODENAME /* Query nodename of domain */ 1195 } idn_cmd_t; 1196 1197 #define VALID_IDNCMD(c) (((int)(c) >= (int)IDNCMD_SLABALLOC) && \ 1198 ((int)(c) <= (int)IDNCMD_NODENAME)) 1199 /* 1200 * IDNP_NACK 1201 */ 1202 typedef enum { 1203 /* 1 */ IDNNACK_NOCONN = 1, 1204 /* 2 */ IDNNACK_BADCHAN, 1205 /* 3 */ IDNNACK_BADCFG, 1206 /* 4 */ IDNNACK_BADCMD, 1207 /* 5 */ IDNNACK_RETRY, 1208 /* 6 */ IDNNACK_DUP, 1209 /* 7 */ IDNNACK_EXIT, 1210 /* 8 */ IDNNACK_RESERVED1, 1211 /* 9 */ IDNNACK_RESERVED2, 1212 /* 10 */ IDNNACK_RESERVED3 1213 } idn_nack_t; 1214 1215 /* 1216 * IDNP_CON sub-types. 1217 */ 1218 typedef enum { 1219 /* 0 */ IDNCON_OFF = 0, 1220 /* 1 */ IDNCON_NORMAL, /* regular connect sequence */ 1221 /* 2 */ IDNCON_QUERY /* query for connect info */ 1222 } idn_con_t; 1223 1224 /* 1225 * IDNP_FIN sub-types. 1226 */ 1227 typedef enum { 1228 /* 0 */ IDNFIN_OFF = 0, /* active, no fin */ 1229 /* 1 */ IDNFIN_NORMAL, /* normal disconnect req */ 1230 /* 2 */ IDNFIN_FORCE_SOFT, /* normal dis, force if goes AWOL */ 1231 /* 3 */ IDNFIN_FORCE_HARD, /* force disconnect of AWOL domain */ 1232 /* 4 */ IDNFIN_QUERY /* query for fin info */ 1233 } idn_fin_t; 1234 1235 #define VALID_FIN(f) (((int)(f) > 0) && \ 1236 ((int)(f) < (int)IDNFIN_QUERY)) 1237 #define FIN_IS_FORCE(f) (((f) == IDNFIN_FORCE_SOFT) || \ 1238 ((f) == IDNFIN_FORCE_HARD)) 1239 1240 /* 1241 * FIN ARG types - reasons a FIN was sent. 1242 */ 1243 typedef enum { 1244 /* 0 */ IDNFIN_ARG_NONE = 0, /* no argument */ 1245 /* 1 */ IDNFIN_ARG_SMRBAD, /* SMR is corrupted */ 1246 /* 2 */ IDNFIN_ARG_CPUCFG, /* missing cpu per board */ 1247 /* 3 */ IDNFIN_ARG_HWERR, /* error programming hardware */ 1248 /* 4 */ IDNFIN_ARG_CFGERR_FATAL, /* Fatal error during CONFIG */ 1249 /* 5 */ IDNFIN_ARG_CFGERR_MTU, /* MTU sizes conflict */ 1250 /* 6 */ IDNFIN_ARG_CFGERR_BUF, /* SMR_BUF_SIZE conflicts */ 1251 /* 7 */ IDNFIN_ARG_CFGERR_SLAB, /* SLAB sizes conflict */ 1252 /* 8 */ IDNFIN_ARG_CFGERR_NWR, /* NWR sizes conflict */ 1253 /* 9 */ IDNFIN_ARG_CFGERR_NETS, /* MAX_NETS conflict */ 1254 /* 10 */ IDNFIN_ARG_CFGERR_MBOX, /* MBOX_PER_NET conflict */ 1255 /* 11 */ IDNFIN_ARG_CFGERR_NMCADR, /* NMCADR mismatches actual */ 1256 /* 12 */ IDNFIN_ARG_CFGERR_MCADR, /* missing some MCADRs */ 1257 /* 13 */ IDNFIN_ARG_CFGERR_CKSUM, /* checksum settings conflict */ 1258 /* 14 */ IDNFIN_ARG_CFGERR_SMR /* SMR sizes conflict */ 1259 } idn_finarg_t; 1260 1261 #define IDNFIN_ARG_IS_FATAL(fa) ((fa) > IDNFIN_ARG_NONE) 1262 1263 #define SET_FIN_TYPE(x, t) \ 1264 ((x) &= 0xffff, (x) |= (((uint_t)(t) & 0xffff) << 16)) 1265 #define SET_FIN_ARG(x, a) \ 1266 ((x) &= ~0xffff, (x) |= ((uint_t)(a) & 0xffff)) 1267 #define GET_FIN_TYPE(x) ((idn_fin_t)(((x) >> 16) & 0xffff)) 1268 #define GET_FIN_ARG(x) ((idn_finarg_t)((x) & 0xffff)) 1269 1270 #define FINARG2IDNKERR(fa) \ 1271 (((fa) == IDNFIN_ARG_SMRBAD) ? IDNKERR_SMR_CORRUPTED : \ 1272 ((fa) == IDNFIN_ARG_CPUCFG) ? IDNKERR_CPU_CONFIG : \ 1273 ((fa) == IDNFIN_ARG_HWERR) ? IDNKERR_HW_ERROR : \ 1274 ((fa) == IDNFIN_ARG_CFGERR_FATAL) ? IDNKERR_HW_ERROR : \ 1275 ((fa) == IDNFIN_ARG_CFGERR_MTU) ? IDNKERR_CONFIG_MTU : \ 1276 ((fa) == IDNFIN_ARG_CFGERR_BUF) ? IDNKERR_CONFIG_BUF : \ 1277 ((fa) == IDNFIN_ARG_CFGERR_SLAB) ? IDNKERR_CONFIG_SLAB : \ 1278 ((fa) == IDNFIN_ARG_CFGERR_NWR) ? IDNKERR_CONFIG_NWR : \ 1279 ((fa) == IDNFIN_ARG_CFGERR_NETS) ? IDNKERR_CONFIG_NETS : \ 1280 ((fa) == IDNFIN_ARG_CFGERR_MBOX) ? IDNKERR_CONFIG_MBOX : \ 1281 ((fa) == IDNFIN_ARG_CFGERR_NMCADR) ? IDNKERR_CONFIG_NMCADR : \ 1282 ((fa) == IDNFIN_ARG_CFGERR_MCADR) ? IDNKERR_CONFIG_MCADR : \ 1283 ((fa) == IDNFIN_ARG_CFGERR_CKSUM) ? IDNKERR_CONFIG_CKSUM : \ 1284 ((fa) == IDNFIN_ARG_CFGERR_SMR) ? IDNKERR_CONFIG_SMR : 0) 1285 1286 /* 1287 * FIN SYNC types. 1288 */ 1289 #define IDNFIN_SYNC_OFF 0 /* not set */ 1290 #define IDNFIN_SYNC_NO 1 /* no-sync necessary */ 1291 #define IDNFIN_SYNC_YES 2 /* do fin synchronously */ 1292 1293 typedef short idn_finsync_t; 1294 1295 /* 1296 * IDNP_FIN options. 1297 */ 1298 typedef enum { 1299 /* 0 */ IDNFIN_OPT_NONE = 0, /* none (used w/query) */ 1300 /* 1 */ IDNFIN_OPT_UNLINK, /* normal unlink request */ 1301 /* 2 */ IDNFIN_OPT_RELINK /* disconnect and retry link */ 1302 } idn_finopt_t; 1303 1304 #define VALID_FINOPT(f) (((f) == IDNFIN_OPT_UNLINK) || \ 1305 ((f) == IDNFIN_OPT_RELINK)) 1306 1307 #define FIN_MASTER_DOMID(x) (((((x) >> 16) & 0xffff) == 0xffff) ? \ 1308 IDN_NIL_DOMID : (((x) >> 16) & 0xffff)) 1309 #define FIN_MASTER_CPUID(x) ((((x) & 0xffff) == 0xffff) ? \ 1310 IDN_NIL_DCPU : ((x) & 0xfff)) 1311 #define MAKE_FIN_MASTER(d, c) ((((uint_t)(d) & 0xffff) << 16) | \ 1312 ((uint_t)(c) & 0xffff)) 1313 #define NIL_FIN_MASTER MAKE_FIN_MASTER(IDN_NIL_DOMID, IDN_NIL_DCPU) 1314 1315 #ifdef DEBUG 1316 #define IDN_FSTATE_TRANSITION(dp, ns) \ 1317 { \ 1318 int _id; \ 1319 _id = (dp)->domid; \ 1320 if ((dp)->dfin != (ns)) { \ 1321 hrtime_t tstamp; \ 1322 tstamp = TIMESTAMP(); \ 1323 IDN_HISTORY_LOG(IDNH_FIN, _id, (ns), 0); \ 1324 PR_STATE("FSTATE:%ld:%d: (l=%d, b/p=%d/%d) " \ 1325 "%s(%d) -> %s(%d)\n", \ 1326 (uint64_t)tstamp, _id, \ 1327 __LINE__, \ 1328 ((dp)->dcpu == IDN_NIL_DCPU) ? -1 : \ 1329 CPUID_TO_BOARDID((dp)->dcpu), \ 1330 (dp)->dcpu, \ 1331 idnfin_str[(dp)->dfin], (dp)->dfin, \ 1332 idnfin_str[ns], (ns)); \ 1333 (dp)->dfin = (ns); \ 1334 } \ 1335 } 1336 #else 1337 #define IDN_FSTATE_TRANSITION(dp, ns) \ 1338 { \ 1339 IDN_HISTORY_LOG(IDNH_FIN, (dp)->domid, (ns), 0); \ 1340 (dp)->dfin = (ns); \ 1341 } 1342 #endif /* DEBUG */ 1343 1344 #endif /* !_ASM */ 1345 #endif /* _KERNEL */ 1346 1347 #ifndef _ASM 1348 /* 1349 * IDN Per-Domain States. 1350 */ 1351 typedef enum { 1352 /* 0 */ IDNDS_CLOSED, /* idle */ 1353 /* 1 */ IDNDS_NEGO_PEND, /* link initiating */ 1354 /* 2 */ IDNDS_NEGO_SENT, /* link initiated, nego sent */ 1355 /* 3 */ IDNDS_NEGO_RCVD, /* link wanted, nego+ack sent */ 1356 /* 4 */ IDNDS_CONFIG, /* passing config info, prgm hw */ 1357 /* 5 */ IDNDS_CON_PEND, /* connection pending */ 1358 /* 6 */ IDNDS_CON_SENT, /* con sent */ 1359 /* 7 */ IDNDS_CON_RCVD, /* con sent & received */ 1360 /* 8 */ IDNDS_CON_READY, /* ready to establish link */ 1361 /* 9 */ IDNDS_CONNECTED, /* established - linked */ 1362 /* 10 */ IDNDS_FIN_PEND, /* unlink initiating */ 1363 /* 11 */ IDNDS_FIN_SENT, /* unlink initiated, fin sent */ 1364 /* 12 */ IDNDS_FIN_RCVD, /* unlink wanted by remote */ 1365 /* 13 */ IDNDS_DMAP /* deprogramming hw */ 1366 } idn_dstate_t; 1367 1368 #define IDNDS_IS_CLOSED(dp) (((dp)->dstate == IDNDS_CLOSED) || \ 1369 ((dp)->dstate == IDNDS_DMAP)) 1370 #define IDNDS_IS_CONNECTING(dp) (((dp)->dstate > IDNDS_CLOSED) && \ 1371 ((dp)->dstate < IDNDS_CONNECTED)) 1372 #define IDNDS_IS_DISCONNECTING(dp) ((dp)->dstate > IDNDS_CONNECTED) 1373 #define IDNDS_CONFIG_DONE(dp) (((dp)->dstate == IDNDS_CLOSED) || \ 1374 ((dp)->dstate > IDNDS_CONFIG)) 1375 #define IDNDS_SYNC_TYPE(dp) (((dp)->dfin_sync != IDNFIN_SYNC_OFF) ? \ 1376 (dp)->dfin_sync : \ 1377 ((dp)->dstate < IDNDS_CON_READY) ? \ 1378 IDNFIN_SYNC_NO : IDNFIN_SYNC_YES) 1379 1380 #endif /* !_ASM */ 1381 1382 #ifdef _KERNEL 1383 #ifndef _ASM 1384 /* 1385 * --------------------------------------------------------------------- 1386 */ 1387 typedef struct idn_timer { 1388 struct idn_timer *t_forw, 1389 *t_back; 1390 struct idn_timerq *t_q; 1391 1392 timeout_id_t t_id; 1393 short t_domid; 1394 short t_onq; 1395 ushort_t t_type; 1396 ushort_t t_subtype; 1397 uint_t t_cookie; 1398 #ifdef DEBUG 1399 hrtime_t t_posttime; 1400 hrtime_t t_exectime; 1401 #endif /* DEBUG */ 1402 } idn_timer_t; 1403 1404 #define IDN_TIMER_PUBLIC_COOKIE 0xf 1405 1406 #define IDN_TIMERQ_IS_LOCKED(tq) (MUTEX_HELD(&(tq)->tq_mutex)) 1407 #define IDN_TIMERQ_LOCK(tq) (mutex_enter(&(tq)->tq_mutex)) 1408 #define IDN_TIMERQ_UNLOCK(tq) (mutex_exit(&(tq)->tq_mutex)) 1409 1410 #define IDN_TIMERQ_INIT(tq) (idn_timerq_init(tq)) 1411 #define IDN_TIMERQ_DEINIT(tq) (idn_timerq_deinit(tq)) 1412 #define IDN_TIMER_ALLOC() (idn_timer_alloc()) 1413 #define IDN_TIMER_FREE(tp) (idn_timer_free(tp)) 1414 1415 #define IDN_TIMER_START(tq, tp, tim) \ 1416 (idn_timer_start((tq), (tp), (tim))) 1417 #define IDN_TIMER_STOP(tq, typ, ck) \ 1418 ((void) idn_timer_stop((tq), (typ), (ck))) 1419 #define IDN_TIMER_STOPALL(tp) \ 1420 ((void) idn_timer_stopall(tp)) 1421 #define IDN_TIMER_GET(tq, typ, tp, ck) \ 1422 { \ 1423 mutex_enter(&((tq)->tq_mutex)); \ 1424 (tp) = idn_timer_get((tq), (typ), (ck)); \ 1425 mutex_exit(&((tq)->tq_mutex)); \ 1426 } 1427 #define IDN_TIMER_DEQUEUE(tq, tp) \ 1428 (idn_timer_dequeue((tq), (tp))) 1429 #ifdef DEBUG 1430 #define IDN_TIMER_POST(tp) \ 1431 ((tp)->t_posttime = gethrtime(), (tp)->t_exectime = 0) 1432 #define IDN_TIMER_EXEC(tp) ((tp)->t_exectime = gethrtime()) 1433 #else /* DEBUG */ 1434 #define IDN_TIMER_POST(tp) 1435 #define IDN_TIMER_EXEC(tp) 1436 #endif /* DEBUG */ 1437 1438 #define IDN_MSGTIMER_START(domid, typ, subtyp, tim, ckp) \ 1439 { \ 1440 idn_timer_t *_tp; \ 1441 char _str[15]; \ 1442 ushort_t *_ckp = (ckp); \ 1443 inum2str((typ), _str); \ 1444 PR_TIMER("msgtimer:%d: START: type = %s (0x%x)\n", \ 1445 (domid), _str, (typ)); \ 1446 _tp = IDN_TIMER_ALLOC(); \ 1447 _tp->t_type = (ushort_t)(typ); \ 1448 _tp->t_subtype = (ushort_t)(subtyp); \ 1449 _tp->t_domid = (short)(domid); \ 1450 _tp->t_cookie = (_ckp) ? *(_ckp) : 0; \ 1451 IDN_TIMER_POST(_tp); \ 1452 if (_ckp) { \ 1453 *(_ckp) = IDN_TIMER_START(&idn_domain[domid].dtimerq, \ 1454 _tp, (tim)); \ 1455 } else { \ 1456 (void) IDN_TIMER_START(&idn_domain[domid].dtimerq, \ 1457 _tp, (tim)); \ 1458 } \ 1459 } 1460 #define IDN_MSGTIMER_STOP(domid, typ, ck) \ 1461 { \ 1462 char _str[15]; \ 1463 inum2str((typ), _str); \ 1464 PR_TIMER("msgtimer:%d: STOP: type = %s (0x%x), " \ 1465 "cookie = 0x%x\n", \ 1466 (domid), _str, (typ), (ck)); \ 1467 IDN_TIMER_STOP(&idn_domain[domid].dtimerq, (typ), (ck)); \ 1468 } 1469 #define IDN_MSGTIMER_GET(dp, typ, tp, ck) \ 1470 IDN_TIMER_GET(&(dp)->dtimerq, (typ), (tp), (ck)) 1471 1472 /* 1473 * IDN_SLABALLOC_WAITTIME 1474 * Max wait time in ticks that local domains waits for 1475 * master to respond to a slab allocation request. Has 1476 * to be at least as long as wait time for a response to 1477 * the command. 1478 */ 1479 #define IDN_SLABALLOC_WAITTIME ((3 * idn_msg_waittime[IDNP_CMD]) / 2) 1480 1481 /* 1482 * Domain state transition macros. 1483 */ 1484 #ifdef DEBUG 1485 #define IDN_DSTATE_TRANSITION(dp, ns) \ 1486 { \ 1487 int id; \ 1488 hrtime_t tstamp; \ 1489 tstamp = TIMESTAMP(); \ 1490 ASSERT(RW_WRITE_HELD(&(dp)->drwlock)); \ 1491 id = (dp)->domid; \ 1492 IDN_HISTORY_LOG(IDNH_DSTATE, id, (ns), \ 1493 (uint_t)(dp)->dcpu); \ 1494 PR_STATE("DSTATE:%ld:%d: (l=%d, b/p=%d/%d) " \ 1495 "%s(%d) -> %s(%d)\n", \ 1496 (uint64_t)tstamp, id, \ 1497 __LINE__, \ 1498 ((dp)->dcpu == IDN_NIL_DCPU) ? \ 1499 -1 : CPUID_TO_BOARDID((dp)->dcpu), \ 1500 (dp)->dcpu, \ 1501 idnds_str[(dp)->dstate], (dp)->dstate, \ 1502 idnds_str[ns], (ns)); \ 1503 (dp)->dstate = (ns); \ 1504 IDNSB_DOMAIN_UPDATE(dp); \ 1505 } 1506 #else 1507 #define IDN_DSTATE_TRANSITION(dp, ns) \ 1508 { \ 1509 IDN_HISTORY_LOG(IDNH_DSTATE, (dp)->domid, \ 1510 (ns), (uint_t)(dp)->dcpu); \ 1511 (dp)->dstate = (ns); \ 1512 IDNSB_DOMAIN_UPDATE(dp); \ 1513 } 1514 #endif /* DEBUG */ 1515 1516 #define IDN_XSTATE_TRANSITION(dp, xs) \ 1517 { \ 1518 int _xs = (xs); \ 1519 (dp)->dxstate = _xs; \ 1520 if (_xs != IDNXS_NIL) { \ 1521 ASSERT((dp)->dxp); \ 1522 IDN_DSTATE_TRANSITION((dp), \ 1523 (dp)->dxp->xt_trans[_xs].t_state); \ 1524 } \ 1525 } 1526 1527 /* 1528 * --------------------------------------------------------------------- 1529 * IDN Per-Domain Data 1530 * 1531 * The comment to the right of the respective field represents 1532 * what lock protects that field. If there is no comment then 1533 * no lock is required to access the field. 1534 * --------------------------------------------------------------------- 1535 */ 1536 1537 #define MAXDNAME 32 1538 1539 typedef struct idn_domain { 1540 krwlock_t drwlock; 1541 /* 1542 * Assigned domid for domain. Never 1543 * changes once idn_domain[] is 1544 * initialized. We are guaranteed that 1545 * all domains in IDN will have a 1546 * uniqueue domid in the range (0-15). 1547 */ 1548 int domid; 1549 idn_dstate_t dstate; /* drwlock */ 1550 idn_xstate_t dxstate; /* drwlock */ 1551 /* 1552 * Gotten from uname -n for local 1553 * domain. Remote domains pass 1554 * theirs during Config phase. 1555 */ 1556 char dname[MAXDNAME]; /* drwlock */ 1557 /* 1558 * IDN-wide unique identifier for the 1559 * given domain. This value will be 1560 * the same as the domid. 1561 */ 1562 ushort_t dnetid; /* drwlock */ 1563 idn_vote_t dvote; /* drwlock */ 1564 /* 1565 * Used during FIN sequenece to 1566 * determine what type of shutdown 1567 * (unlink) we're executing with 1568 * respect to the given domain. 1569 */ 1570 idn_fin_t dfin; /* drwlock */ 1571 /* 1572 * A non-zero value for dfin_sync 1573 * indicates that unlink of respective 1574 * domain does not need to be performed 1575 * synchronously among all the IDN 1576 * member domains. 1577 */ 1578 short dfin_sync; /* grwlock */ 1579 /* 1580 * Cookie used to determine the 1581 * proper context in which we're 1582 * receiving messages from the given 1583 * domain. Assigned cookies are exchanged 1584 * during initial NEGO messages. 1585 */ 1586 ushort_t dcookie_send; /* drwlock */ 1587 ushort_t dcookie_recv; /* drwlock */ 1588 short dcookie_err; /* drwlock */ 1589 int dcookie_errcnt; /* drwlock */ 1590 /* 1591 * Primary target cpu for sending 1592 * messages. Can change to help 1593 * distribute interrupts on receiving 1594 * side. 1595 */ 1596 int dcpu; /* drwlock */ 1597 /* 1598 * Used to store dcpu from a previous 1599 * life. Only used when requesting 1600 * a RELINK with a domain we were just 1601 * previously linked with. Thus, it 1602 * does represent a valid cpu in the 1603 * remote domain. 1604 */ 1605 int dcpu_save; /* drwlock */ 1606 /* 1607 * Used to store from which cpu the 1608 * last message was received. 1609 */ 1610 int dcpu_last; 1611 /* 1612 * Transition phase area. This field 1613 * points to the proper phase structure 1614 * depending on what stage the given 1615 * domain is in. 1616 */ 1617 idn_xphase_t *dxp; /* drwlock */ 1618 /* 1619 * Actual synchronization object for 1620 * the given domain. 1621 */ 1622 idn_syncop_t dsync; /* drwlock & idn.sync.sz_mutex */ 1623 /* 1624 * Slab information for given domain. 1625 * If the local domain is a master, 1626 * then this field in each domain is used 1627 * to store which slabs have been assigned 1628 * to given domain. If the local domain 1629 * is a slave, then this information is 1630 * NULL for all remote idn_domain[] 1631 * entries, but for local domain holds 1632 * those slabs assigned to local domain. 1633 */ 1634 smr_slab_t *dslab; /* dslab_rwlock */ 1635 short dnslabs; /* dslab_rwlock */ 1636 short dslab_state; /* dslab_rwlock */ 1637 krwlock_t dslab_rwlock; 1638 /* 1639 * Set of cpus belonging to domain. 1640 */ 1641 cpuset_t dcpuset; /* drwlock */ 1642 1643 int dncpus; /* drwlock */ 1644 /* 1645 * Index into dcpumap to determine 1646 * which cpu to target next for 1647 * interrupt. Intended to allow fair 1648 * distribution of interrupts on 1649 * remote domain. 1650 */ 1651 uint_t dcpuindex; /* drwlock */ 1652 /* 1653 * Quick look-up map of cpus belonging 1654 * to domain. Used to select next target. 1655 */ 1656 uchar_t *dcpumap; /* drwlock */ 1657 /* 1658 * Non-zero indicates outstanding 1659 * I/O's to given domain. 1660 */ 1661 int dio; /* drwlock */ 1662 int dioerr; /* drwlock */ 1663 /* 1664 * Set when we fail to allocate a buffer 1665 * for a domain. Dictates whether to 1666 * reclaim max buffers or not. 1667 */ 1668 lock_t diowanted; 1669 /* 1670 * Set when remote domain does not 1671 * seem to be picking up messages sent 1672 * to it. Non-zero indicates we have 1673 * an outstanding "ping" to domain. 1674 */ 1675 lock_t diocheck; /* drwlock */ 1676 short dslabsize; /* drwlock */ 1677 uint_t dmtu; /* drwlock */ 1678 1679 uint_t dbufsize; /* drwlock */ 1680 short dnwrsize; /* drwlock */ 1681 lock_t dreclaim_inprogress; /* drwlock */ 1682 uchar_t dreclaim_index; /* drwlock */ 1683 /* 1684 * The following field is primarily 1685 * used during CFG exchange to keep 1686 * track of certain per-domain information. 1687 */ 1688 union { /* all - drwlock */ 1689 struct { 1690 uint_t _dcfgphase : 6; 1691 uint_t _dcfgsnddone : 1; 1692 uint_t _dcfgrcvdone : 1; 1693 uint_t _dcksum : 2; 1694 uint_t _dmaxnets : 6; 1695 uint_t _dmboxpernet : 9; 1696 uint_t _dncfgitems : 6; 1697 uint_t _drecfg : 1; 1698 } _s; 1699 int _dtmp; 1700 } _u; 1701 /* 1702 * Each domain entry maintains a 1703 * timer queue holding timers for 1704 * messages outstanding to that domain. 1705 */ 1706 struct idn_timerq { 1707 int tq_cookie; /* tq_mutex */ 1708 kmutex_t tq_mutex; 1709 int tq_count; /* tq_mutex */ 1710 idn_timer_t *tq_queue; /* tq_mutex */ 1711 } dtimerq; 1712 /* 1713 * dawol is used to keep 1714 * track of AWOL details for 1715 * given domain when it is 1716 * non-responsive. 1717 */ 1718 struct { 1719 int a_count; /* drwlock */ 1720 clock_t a_time; /* drwlock */ 1721 clock_t a_last; /* drwlock */ 1722 clock_t a_msg; /* drwlock */ 1723 } dawol; 1724 1725 struct hwconfig { 1726 short dh_nboards; /* drwlock */ 1727 short dh_nmcadr; /* drwlock */ 1728 boardset_t dh_boardset; /* drwlock */ 1729 uint_t dh_mcadr[MAX_BOARDS]; /* drwlock */ 1730 } dhw; 1731 /* 1732 * Mailbox information used to 1733 * send/recv messages to given domain. 1734 */ 1735 struct { 1736 kmutex_t m_mutex; 1737 struct idn_mboxtbl *m_tbl; /* m_mutex */ 1738 struct idn_mainmbox *m_send; /* m_mutex */ 1739 struct idn_mainmbox *m_recv; /* m_mutex */ 1740 } dmbox; 1741 } idn_domain_t; 1742 1743 typedef struct idn_timerq idn_timerq_t; 1744 1745 #define dcfgphase _u._s._dcfgphase 1746 #define dcfgsnddone _u._s._dcfgsnddone 1747 #define dcfgrcvdone _u._s._dcfgrcvdone 1748 #define dcksum _u._s._dcksum 1749 #define dmaxnets _u._s._dmaxnets 1750 #define dmboxpernet _u._s._dmboxpernet 1751 #define dncfgitems _u._s._dncfgitems 1752 #define drecfg _u._s._drecfg 1753 #define dbindport _u._dbindport 1754 #define dconnected _u._dconnected 1755 #define dtmp _u._dtmp 1756 1757 #define IDN_DLOCK_EXCL(dd) (rw_enter(&idn_domain[dd].drwlock, RW_WRITER)) 1758 #define IDN_DLOCK_SHARED(dd) (rw_enter(&idn_domain[dd].drwlock, RW_READER)) 1759 #define IDN_DLOCK_TRY_SHARED(dd) \ 1760 (rw_tryenter(&idn_domain[dd].drwlock, \ 1761 RW_READER)) 1762 #define IDN_DLOCK_DOWNGRADE(dd) (rw_downgrade(&idn_domain[dd].drwlock)) 1763 #define IDN_DUNLOCK(dd) (rw_exit(&idn_domain[dd].drwlock)) 1764 #define IDN_DLOCK_IS_EXCL(dd) (RW_WRITE_HELD(&idn_domain[dd].drwlock)) 1765 #define IDN_DLOCK_IS_SHARED(dd) (RW_READ_HELD(&idn_domain[dd].drwlock)) 1766 #define IDN_DLOCK_IS_HELD(dd) (RW_LOCK_HELD(&idn_domain[dd].drwlock)) 1767 1768 #define IDN_MBOX_LOCK(dd) (mutex_enter(&idn_domain[dd].dmbox.m_mutex)) 1769 #define IDN_MBOX_UNLOCK(dd) (mutex_exit(&idn_domain[dd].dmbox.m_mutex)) 1770 1771 #define IDN_RESET_COOKIES(dd) \ 1772 (idn_domain[dd].dcookie_send = idn_domain[dd].dcookie_recv = 0) 1773 1774 #define DSLAB_STATE_UNKNOWN 0 1775 #define DSLAB_STATE_LOCAL 1 1776 #define DSLAB_STATE_REMOTE 2 1777 1778 #define DSLAB_READ_HELD(d) RW_READ_HELD(&idn_domain[d].dslab_rwlock) 1779 #define DSLAB_WRITE_HELD(d) RW_WRITE_HELD(&idn_domain[d].dslab_rwlock) 1780 1781 #define DSLAB_LOCK_EXCL(d) \ 1782 rw_enter(&idn_domain[d].dslab_rwlock, RW_WRITER) 1783 #define DSLAB_LOCK_SHARED(d) \ 1784 rw_enter(&idn_domain[d].dslab_rwlock, RW_READER) 1785 #define DSLAB_LOCK_TRYUPGRADE(d) \ 1786 rw_tryupgrade(&idn_domain[d].dslab_rwlock) 1787 #define DSLAB_UNLOCK(d) rw_exit(&idn_domain[d].dslab_rwlock) 1788 1789 /* 1790 * --------------------------------------------------------------------- 1791 * Macro to pick another target for the given domain. This hopefully 1792 * improves performance by better distributing the SSI responsibilities 1793 * at the target domain. 1794 * --------------------------------------------------------------------- 1795 */ 1796 #define BUMP_INDEX(set, index) \ 1797 { \ 1798 register int p; \ 1799 for (p = (index)+1; p < NCPU; p++) \ 1800 if (CPU_IN_SET((set), p)) \ 1801 break; \ 1802 if (p >= NCPU) \ 1803 for (p = 0; p <= (index); p++) \ 1804 if (CPU_IN_SET((set), p)) \ 1805 break; \ 1806 if (!CPU_IN_SET((set), p)) { \ 1807 uint_t _u32, _l32; \ 1808 _u32 = UPPER32_CPUMASK(set); \ 1809 _l32 = LOWER32_CPUMASK(set); \ 1810 cmn_err(CE_PANIC, \ 1811 "IDN: cpu %d not in cpuset 0x%x.%0x\n", \ 1812 p, _u32, _l32); \ 1813 } \ 1814 (index) = p; \ 1815 } 1816 1817 #define IDN_ASSIGN_DCPU(dp, cookie) \ 1818 ((dp)->dcpu = (int)((dp)->dcpumap[(cookie) & (NCPU-1)])) 1819 1820 /* 1821 * --------------------------------------------------------------------- 1822 * Atomic increment/decrement, swap, compare-swap functions. 1823 * --------------------------------------------------------------------- 1824 */ 1825 #define ATOMIC_INC(v) atomic_inc_32((uint_t *)&(v)) 1826 #define ATOMIC_DEC(v) atomic_dec_32((uint_t *)&(v)) 1827 #define ATOMIC_SUB(v, n) atomic_add_32((uint_t *)&(v), -(n)) 1828 #define ATOMIC_CAS(a, c, n) atomic_cas_32((uint32_t *)(a), (uint32_t)(c), \ 1829 (uint32_t)(n)) 1830 #define ATOMIC_SWAPL(a, v) atomic_swap_32((uint32_t *)(a), (uint32_t)(v)) 1831 1832 /* 1833 * DMV vector interrupt support. 1834 * 1835 * A fixed-size circular buffer is maintained as a queue of 1836 * incoming interrupts. The low-level idn_dmv_handler() waits 1837 * for an entry to become FREE and will atomically mark it INUSE. 1838 * Once he has filled in the appropriate fields it will be marked 1839 * as READY. The high-level idn_handler() will be invoked and will 1840 * process all messages in the queue that are READY. Each message 1841 * is marked PROCESS, a protojob job created and filled in, and 1842 * then the interrupt message is marked FREE for use in the next 1843 * interrupt. The iv_state field is used to hold the relevant 1844 * state and is updated atomically. 1845 */ 1846 #define IDN_PIL PIL_8 1847 #define IDN_DMV_PENDING_MAX 128 /* per cpu */ 1848 1849 #endif /* !_ASM */ 1850 1851 #ifndef _ASM 1852 1853 /* 1854 * The size of this structure must be a power of 2 1855 * so that we can do a simple shift to calculate 1856 * our offset into based on cpuid. 1857 */ 1858 typedef struct idn_dmv_cpu { 1859 uint32_t idn_dmv_current; 1860 int32_t idn_dmv_lostintr; 1861 lock_t idn_dmv_active; 1862 char _padding[(2 * sizeof (uint64_t)) - \ 1863 sizeof (uint32_t) - \ 1864 sizeof (lock_t) - \ 1865 sizeof (int32_t)]; 1866 } idn_dmv_cpu_t; 1867 1868 typedef struct idn_dmv_data { 1869 uint64_t idn_soft_inum; 1870 uint64_t idn_dmv_qbase; 1871 idn_dmv_cpu_t idn_dmv_cpu[NCPU]; 1872 } idn_dmv_data_t; 1873 1874 /* 1875 * Requirements of the following data structure: 1876 * - MUST be double-word (8 bytes) aligned. 1877 * - _iv_head field MUST start on double-word boundary. 1878 * - iv_xargs0 MUST start on double-word boundary 1879 * with iv_xargs1 immediately following. 1880 * - iv_xargs2 MUST start on double-word boundary 1881 * with iv_xargs3 immediately following. 1882 */ 1883 typedef struct idn_dmv_msg { 1884 uint32_t iv_next; /* offset */ 1885 uchar_t iv_inuse; 1886 uchar_t iv_ready; 1887 ushort_t _padding; 1888 uint32_t iv_head : 16; 1889 uint32_t iv_cookie : 16; 1890 uint32_t iv_ver : 8; 1891 uint32_t iv_mtype : 6; 1892 uint32_t iv_atype : 6; 1893 uint32_t iv_domid : 4; 1894 uint32_t iv_cpuid : 8; 1895 uint32_t iv_xargs0; 1896 uint32_t iv_xargs1; 1897 uint32_t iv_xargs2; 1898 uint32_t iv_xargs3; 1899 } idn_dmv_msg_t; 1900 1901 extern uint_t idn_dmv_inum; 1902 extern uint_t idn_soft_inum; 1903 1904 /* 1905 * An IDN-network address has the following format: 1906 * 1907 * 31......16,15........0 1908 * | channel | dnetid | 1909 * ---------------------- 1910 * channel - network interface. 1911 * netid - idn_domain[].dnetid 1912 */ 1913 #define IDN_MAXMAX_NETS 32 1914 #define IDN_BROADCAST_ALLCHAN ((ushort_t)-1) 1915 #define IDN_BROADCAST_ALLNETID ((ushort_t)-1) 1916 1917 typedef union { 1918 struct { 1919 ushort_t chan; 1920 ushort_t netid; 1921 } net; 1922 uint_t netaddr; 1923 } idn_netaddr_t; 1924 1925 #define CHANSET_ALL (~((idn_chanset_t)0)) 1926 #define CHANSET(c) \ 1927 ((idn_chanset_t)1 << ((c) & 31)) 1928 #define CHAN_IN_SET(m, c) \ 1929 (((m) & ((idn_chanset_t)1 << ((c) & 31))) != 0) 1930 #define CHANSET_ADD(m, c) \ 1931 ((m) |= ((idn_chanset_t)1 << ((c) & 31))) 1932 #define CHANSET_DEL(m, c) \ 1933 ((m) &= ~((idn_chanset_t)1 << ((c) & 31))) 1934 #define CHANSET_ZERO(m) ((m) = 0) 1935 1936 typedef enum { 1937 /* 0 */ IDNCHAN_OPEN, 1938 /* 1 */ IDNCHAN_SOFT_CLOSE, 1939 /* 2 */ IDNCHAN_HARD_CLOSE, 1940 /* 3 */ IDNCHAN_OFFLINE, 1941 /* 4 */ IDNCHAN_ONLINE 1942 } idn_chanop_t; 1943 1944 /* 1945 * Retry support. 1946 */ 1947 #define IDN_RETRY_TOKEN(d, x) ((((d) & 0xf) << 16) | \ 1948 (0xffff & (uint_t)(x))) 1949 #define IDN_RETRY_TOKEN2DOMID(t) ((int)(((t) >> 16) & 0xf)) 1950 #define IDN_RETRY_TOKEN2TYPE(t) ((idn_retry_t)((t) & 0xffff)) 1951 #define IDN_RETRY_TYPEALL ((idn_retry_t)0xffff) 1952 #define IDN_RETRY_INTERVAL hz /* 1 sec */ 1953 #define IDN_RETRY_RECFG_MULTIPLE 10 1954 1955 #define IDN_RETRYINTERVAL_NEGO (2 * hz) 1956 #define IDN_RETRYINTERVAL_CON (2 * hz) 1957 #define IDN_RETRYINTERVAL_FIN (2 * hz) 1958 1959 typedef struct idn_retry_job { 1960 struct idn_retry_job *rj_prev; 1961 struct idn_retry_job *rj_next; 1962 void (*rj_func)(uint_t token, void *arg); 1963 void *rj_arg; 1964 uint_t rj_token; 1965 short rj_onq; 1966 timeout_id_t rj_id; 1967 } idn_retry_job_t; 1968 1969 #define IDNRETRY_ALLOCJOB() \ 1970 ((idn_retry_job_t *)kmem_cache_alloc(idn.retryqueue.rq_cache, KM_SLEEP)) 1971 #define IDNRETRY_FREEJOB(j) \ 1972 (kmem_cache_free(idn.retryqueue.rq_cache, (void *)(j))) 1973 1974 typedef enum { 1975 /* 0 */ IDNRETRY_NIL = 0, 1976 /* 1 */ IDNRETRY_NEGO, 1977 /* 2 */ IDNRETRY_CON, 1978 /* 3 */ IDNRETRY_CONQ, /* for CON queries */ 1979 /* 4 */ IDNRETRY_FIN, 1980 /* 5 */ IDNRETRY_FINQ, /* for FIN queries */ 1981 /* 6 */ IDN_NUM_RETRYTYPES 1982 } idn_retry_t; 1983 1984 /* 1985 * --------------------------------------------------------------------- 1986 */ 1987 typedef struct { 1988 int m_domid; 1989 int m_cpuid; 1990 ushort_t m_msgtype; 1991 ushort_t m_acktype; 1992 ushort_t m_cookie; 1993 idn_xdcargs_t m_xargs; 1994 } idn_protomsg_t; 1995 1996 typedef struct idn_protojob { 1997 struct idn_protojob *j_next; 1998 int j_cache; 1999 idn_protomsg_t j_msg; 2000 } idn_protojob_t; 2001 2002 typedef struct idn_protoqueue { 2003 struct idn_protoqueue *q_next; 2004 idn_protojob_t *q_joblist; 2005 idn_protojob_t *q_joblist_tail; 2006 int q_die; 2007 int q_id; 2008 ksema_t *q_morgue; 2009 kthread_id_t q_threadp; 2010 kcondvar_t q_cv; 2011 kmutex_t q_mutex; 2012 } idn_protoqueue_t; 2013 2014 #define IDN_PROTOCOL_NSERVERS 4 2015 #define IDN_PROTOCOL_SERVER_HASH(d) ((d) % idn.nservers) 2016 #define IDN_PROTOJOB_CHUNKS (idn.nservers) 2017 2018 /* 2019 * --------------------------------------------------------------------- 2020 * Data Server definitions. 2021 * 2022 * idn_datasvr_t - Describes data server thread. 2023 * . ds_id - Per-domain identifier for data server. 2024 * . ds_domid - Domain which data server is handling. 2025 * . ds_state - Flag to enable/disable/terminate 2026 * data server. 2027 * . ds_mboxp - Pointer to data server's (local) 2028 * mailbox to be serviced. 2029 * . ds_waittime - cv_timedwait sleep time before 2030 * checking respective mailbox. 2031 * . ds_threadp - Pointer to data server thread. 2032 * . ds_cv - Condvar for sleeping. 2033 * . ds_morguep - Semaphore for terminating thread. 2034 * 2035 * idn_mboxhdr_t - Resides in SMR space (MUST be cache_linesize). 2036 * . mh_svr_active - Non-zero indicates data server is 2037 * actively reading mailbox for messages. 2038 * . mh_svr_ready - Non-zero indicates data server has 2039 * allocated and is ready to accept data. 2040 * . mh_cookie - Identifier primarily for debug purposes. 2041 * 2042 * idn_mboxmsg_t - Entry in the SMR space circular queue use to 2043 * represent a data packet. 2044 * . mm_owner - Non-zero indicates entry is available 2045 * to be processed by receiver's data server. 2046 * . mm_flag - Indicates whether entry needs to be 2047 * reclaimed by the sender. Also holds error 2048 * indications (e.g. bad offset). 2049 * . mm_offset - SMR offset of respective data packet. 2050 * 2051 * idn_mboxtbl_t - Encapsulation of a per-domain mailbox (SMR space). 2052 * . mt_header - Header information for synchronization. 2053 * . mt_queue - Circular queue of idn_mboxmsg_t entries. 2054 * 2055 * idn_mainmbox_t - Encapsulation of main SMR recv/send mailboxes. 2056 * . mm_mutex - Protects mm_* entries, enqueuing, and 2057 * dequeuing of messages. Also protects 2058 * updates to the route table pointed to 2059 * by mm_routetbl. 2060 * . mm_count - send: Current number of messages 2061 * enqueued. 2062 * - recv: Cumulative number of messages 2063 * processed. 2064 * . mm_max_count - send: Maximum number of messages 2065 * enqueued per iteration. 2066 * recv: Maximum number of messages 2067 * dequeued per iteration. 2068 * . mm_smr_mboxp - Pointer to SMR (vaddr) space where 2069 * respective mailbox resides. 2070 * --------------------------------------------------------------------- 2071 */ 2072 #define IDN_MBOXHDR_COOKIE_TOP ((uint_t)0xc0c0) 2073 #define IDN_MAKE_MBOXHDR_COOKIE(pd, sd, ch) \ 2074 ((IDN_MBOXHDR_COOKIE_TOP << 16) \ 2075 | (((uint_t)(pd) & 0xf) << 12) \ 2076 | (((uint_t)(sd) & 0xf) << 8) \ 2077 | ((uint_t)(ch) & 0xf)) 2078 #define IDN_GET_MBOXHDR_COOKIE(mhp) \ 2079 ((mhp)->mh_cookie & ~0xff00) 2080 #define VALID_MBOXHDR(mhp, ch, cksum) \ 2081 ((IDN_GET_MBOXHDR_COOKIE(mhp) == \ 2082 IDN_MAKE_MBOXHDR_COOKIE(0, 0, (ch))) && \ 2083 ((cksum) == (*(mhp)).mh_cksum)) 2084 /* 2085 * The number of entries in a mailbox queue must be chosen so 2086 * that (IDN_MMBOX_NUMENTRIES * sizeof (idn_mboxmsg_t)) is a multiple 2087 * of a cacheline size (64). 2088 */ 2089 #define IDN_MMBOX_NUMENTRIES IDN_MBOX_PER_NET 2090 /* 2091 * We step through the mailboxes in effectively cacheline size 2092 * incremenents so that the source and receiving cpus are not competing 2093 * for the same cacheline when transmitting/receiving messages into/from 2094 * the mailboxes. The hard requirement is that the step value be even 2095 * since the mailbox size will be chosen odd. This allows us to wraparound 2096 * the mailbox uniquely touching each entry until we've exhausted them 2097 * all at which point we'll end up where we initially started and repeat 2098 * again. 2099 */ 2100 #define IDN_MMBOXINDEX_STEP (((64 / sizeof (idn_mboxmsg_t)) + 1) & 0xfffe) 2101 #define IDN_MMBOXINDEX_INC(i) \ 2102 { \ 2103 if (((i) += IDN_MMBOXINDEX_STEP) >= IDN_MMBOX_NUMENTRIES) \ 2104 (i) -= IDN_MMBOX_NUMENTRIES; \ 2105 } 2106 2107 #define IDN_MMBOXINDEX_DIFF(i, j) \ 2108 (((i) >= (j)) ? (((i) - (j)) / IDN_MMBOXINDEX_STEP) \ 2109 : ((((i) + IDN_MMBOX_NUMENTRIES) - (j)) / IDN_MMBOXINDEX_STEP)) 2110 2111 /* 2112 * Require IDN_MBOXAREA_SIZE <= IDN_SLAB_SIZE so we don't waste 2113 * slab space. 2114 * 2115 * Each domain maintains a MAX_DOMAIN(16) entry mbox_table. Each 2116 * entry represents a receive mailbox for a possible domain to which 2117 * the given domain may have a connection. The send mailbox for each 2118 * respective domain is given to the local domain at the time of 2119 * connection establishment. 2120 */ 2121 2122 /* 2123 * --------------------------------------------------------------------- 2124 */ 2125 #define IDN_MBOXTBL_SIZE \ 2126 (IDNROUNDUP(((IDN_MBOX_PER_NET * sizeof (idn_mboxmsg_t)) \ 2127 + sizeof (idn_mboxhdr_t)), IDN_ALIGNSIZE)) 2128 2129 /* 2130 * --------------------------------------------------------------------- 2131 * Each domain has idn_max_nets worth of possible mailbox tables 2132 * for each domain to which it might possibly be connected. 2133 * --------------------------------------------------------------------- 2134 */ 2135 #define IDN_MBOXAREA_SIZE \ 2136 (IDN_MBOXTBL_SIZE * IDN_MAX_NETS * MAX_DOMAINS * MAX_DOMAINS) 2137 #define IDN_MBOXAREA_OFFSET(d) \ 2138 ((d) * IDN_MBOXTBL_SIZE * IDN_MAX_NETS * MAX_DOMAINS) 2139 2140 /* 2141 * --------------------------------------------------------------------- 2142 * Return the base of the mailbox area (set of tables) assigned 2143 * to the given domain id. 2144 * --------------------------------------------------------------------- 2145 */ 2146 #define IDN_MBOXAREA_BASE(m, d) \ 2147 ((idn_mboxtbl_t *)(((ulong_t)(m)) + IDN_MBOXAREA_OFFSET(d))) 2148 2149 /* 2150 * --------------------------------------------------------------------- 2151 * Return the pointer to the respective receive mailbox (table set) 2152 * for the given domain id relative to the given base mailbox table. 2153 * --------------------------------------------------------------------- 2154 */ 2155 #define IDN_MBOXTBL_PTR(t, d) \ 2156 ((idn_mboxtbl_t *)(((ulong_t)(t)) + ((d) * IDN_MBOXTBL_SIZE \ 2157 * IDN_MAX_NETS))) 2158 /* 2159 * --------------------------------------------------------------------- 2160 * Return the pointer to the actual target mailbox based on the 2161 * given channel in the given mailbox table. 2162 * --------------------------------------------------------------------- 2163 */ 2164 #define IDN_MBOXTBL_PTR_CHAN(t, c) \ 2165 ((idn_mboxtbl_t *)(((ulong_t)(t)) + ((c) * IDN_MBOXTBL_SIZE))) 2166 2167 #define IDN_MBOXTBL_PTR_INC(t) \ 2168 ((t) = (idn_mboxtbl_t *)(((ulong_t)(t)) + IDN_MBOXTBL_SIZE)) 2169 2170 #define IDN_MBOXCHAN_INC(i) \ 2171 { \ 2172 if (++(i) == IDN_MAX_NETS) \ 2173 (i) = 0; \ 2174 } 2175 2176 /* 2177 * --------------------------------------------------------------------- 2178 * Return the absolute location within the entire mailbox area 2179 * of the mboxtbl for the given primary and secondary domain and 2180 * channel. Only relevant when done by the master. 2181 * --------------------------------------------------------------------- 2182 */ 2183 #define IDN_MBOXTBL_ABS_PTR(mt, pd, sd, ch) \ 2184 (IDN_MBOXTBL_PTR_CHAN( \ 2185 IDN_MBOXTBL_PTR( \ 2186 IDN_MBOXAREA_BASE((mt), (pd)), \ 2187 (sd)), \ 2188 (ch))) 2189 2190 #define IDN_BFRAME_SHIFT idn.bframe_shift 2191 #define IDN_BFRAME2OFFSET(bf) ((bf) << IDN_BFRAME_SHIFT) 2192 #define IDN_BFRAME2ADDR(bf) IDN_OFFSET2ADDR(IDN_BFRAME2OFFSET(bf)) 2193 #define IDN_OFFSET2BFRAME(off) (((off) >> IDN_BFRAME_SHIFT) & 0xffffff) 2194 #define IDN_ADDR2BFRAME(addr) IDN_OFFSET2BFRAME(IDN_ADDR2OFFSET(addr)) 2195 2196 typedef struct idn_mboxmsg { 2197 uint_t ms_owner : 1, 2198 ms_flag : 7, 2199 ms_bframe : 24; 2200 } idn_mboxmsg_t; 2201 2202 typedef idn_mboxmsg_t idn_mboxq_t[1]; 2203 2204 #define IDN_CKSUM_MBOX_COUNT \ 2205 (((int)&((idn_mboxhdr_t *)(0))->mh_svr_ready) / 2) 2206 #define IDN_CKSUM_MBOX(h) \ 2207 (IDN_CHECKSUM ? \ 2208 idn_cksum((ushort_t *)(h), IDN_CKSUM_MBOX_COUNT) : 0) 2209 2210 typedef struct idn_mboxhdr { 2211 uint_t mh_cookie; 2212 uint_t mh_svr_ready_ptr; 2213 uint_t mh_svr_active_ptr; 2214 ushort_t mh_svr_ready; 2215 ushort_t mh_svr_active; 2216 2217 uint_t _padding[(64 - 2218 (4*sizeof (uint_t)) - 2219 (2*sizeof (ushort_t))) / sizeof (uint_t)]; 2220 2221 uint_t mh_cksum; 2222 } idn_mboxhdr_t; 2223 2224 typedef struct idn_mboxtbl { 2225 idn_mboxhdr_t mt_header; 2226 idn_mboxq_t mt_queue; 2227 } idn_mboxtbl_t; 2228 2229 #define IDN_CHAN_DOMAIN_REGISTER(csp, dom) \ 2230 (DOMAINSET_ADD((csp)->ch_reg_domset, (dom))) 2231 2232 #define IDN_CHAN_DOMAIN_UNREGISTER(csp, dom) \ 2233 (DOMAINSET_DEL((csp)->ch_reg_domset, (dom))) 2234 2235 #define IDN_CHAN_DOMAIN_IS_REGISTERED(csp, dom) \ 2236 (DOMAIN_IN_SET((csp)->ch_reg_domset, (dom))) 2237 2238 #define IDN_CHANSVR_SCANSET_ADD_PENDING(csp, dom) \ 2239 { \ 2240 register int _d; \ 2241 register uint64_t _domset; \ 2242 (dom) &= MAX_DOMAINS - 1; /* Assumes power of 2 */ \ 2243 _domset = 0ull; \ 2244 for (_d = 0; _d < (csp)->ch_recv_domcount; _d++) { \ 2245 if ((int)(((csp)->ch_recv_scanset_pending >> \ 2246 (_d * 4)) & 0xf) == (dom)) \ 2247 break; \ 2248 else \ 2249 _domset = (_domset << 4) | 0xfull; \ 2250 } \ 2251 if (_d == (csp)->ch_recv_domcount) { \ 2252 _domset &= (csp)->ch_recv_scanset_pending; \ 2253 _domset |= (uint64_t)(dom) << \ 2254 ((csp)->ch_recv_domcount * 4); \ 2255 (csp)->ch_recv_domcount++; \ 2256 (csp)->ch_recv_scanset_pending = 0ull; \ 2257 for (_d = 0; _d < 16; \ 2258 _d += (csp)->ch_recv_domcount) { \ 2259 (csp)->ch_recv_scanset_pending |= _domset; \ 2260 _domset <<= (csp)->ch_recv_domcount * 4; \ 2261 } \ 2262 } \ 2263 } 2264 #define IDN_CHANSVR_SCANSET_DEL_PENDING(csp, dom) \ 2265 { \ 2266 register int _d; \ 2267 register uint64_t _domset; \ 2268 (dom) &= MAX_DOMAINS - 1; /* Assumes power of 2 */ \ 2269 _domset = 0ull; \ 2270 for (_d = 0; _d < (csp)->ch_recv_domcount; _d++) { \ 2271 if ((int)(((csp)->ch_recv_scanset_pending >> \ 2272 (_d * 4)) & 0xf) == (dom)) \ 2273 break; \ 2274 else \ 2275 _domset = (_domset << 4) | 0xfull; \ 2276 } \ 2277 if (_d < (csp)->ch_recv_domcount) { \ 2278 _domset &= (csp)->ch_recv_scanset_pending; \ 2279 (csp)->ch_recv_scanset_pending >>= 4; \ 2280 (csp)->ch_recv_domcount--; \ 2281 for (; _d < (csp)->ch_recv_domcount; _d++) \ 2282 _domset |= (csp)->ch_recv_scanset_pending &\ 2283 (0xfull << (_d * 4)); \ 2284 (csp)->ch_recv_scanset_pending = 0ull; \ 2285 if ((csp)->ch_recv_domcount) { \ 2286 for (_d = 0; _d < 16; \ 2287 _d += (csp)->ch_recv_domcount) { \ 2288 (csp)->ch_recv_scanset_pending |= \ 2289 _domset; \ 2290 _domset <<= \ 2291 (csp)->ch_recv_domcount * 4; \ 2292 } \ 2293 } \ 2294 } \ 2295 } 2296 2297 #define IDN_CHAN_TRYLOCK_GLOBAL(csp) \ 2298 mutex_tryenter(&(csp)->ch_mutex) 2299 #define IDN_CHAN_LOCK_GLOBAL(csp) \ 2300 mutex_enter(&(csp)->ch_mutex) 2301 #define IDN_CHAN_UNLOCK_GLOBAL(csp) \ 2302 mutex_exit(&(csp)->ch_mutex) 2303 #define IDN_CHAN_GLOBAL_IS_LOCKED(csp) \ 2304 (MUTEX_HELD(&(csp)->ch_mutex)) 2305 2306 #define IDN_CHAN_LOCAL_IS_LOCKED(csp) \ 2307 (MUTEX_HELD(&(csp)->ch_send.c_mutex) && \ 2308 MUTEX_HELD(&(csp)->ch_recv.c_mutex)) 2309 #define IDN_CHAN_LOCK_LOCAL(csp) \ 2310 (mutex_enter(&(csp)->ch_recv.c_mutex, \ 2311 mutex_enter(&(csp)->ch_send.c_mutex)) 2312 #define IDN_CHAN_UNLOCK_LOCAL(csp) \ 2313 (mutex_exit(&(csp)->ch_send.c_mutex), \ 2314 mutex_exit(&(csp)->ch_recv.c_mutex)) 2315 2316 #define IDN_CHAN_RECV_IS_LOCKED(csp) \ 2317 (MUTEX_HELD(&(csp)->ch_recv.c_mutex)) 2318 #define IDN_CHAN_TRYLOCK_RECV(csp) \ 2319 (mutex_tryenter(&(csp)->ch_recv.c_mutex)) 2320 #define IDN_CHAN_LOCK_RECV(csp) \ 2321 (mutex_enter(&(csp)->ch_recv.c_mutex)) 2322 #define IDN_CHAN_UNLOCK_RECV(csp) \ 2323 (mutex_exit(&(csp)->ch_recv.c_mutex)) 2324 2325 #define IDN_CHAN_SEND_IS_LOCKED(csp) \ 2326 (MUTEX_HELD(&(csp)->ch_send.c_mutex)) 2327 #define IDN_CHAN_TRYLOCK_SEND(csp) \ 2328 (mutex_tryenter(&(csp)->ch_send.c_mutex)) 2329 #define IDN_CHAN_LOCK_SEND(csp) \ 2330 (mutex_enter(&(csp)->ch_send.c_mutex)) 2331 #define IDN_CHAN_UNLOCK_SEND(csp) \ 2332 (mutex_exit(&(csp)->ch_send.c_mutex)) 2333 2334 /* 2335 * A channel table is an array of pointers to mailboxes 2336 * for the respective domains for the given channel. 2337 * Used a cache for the frequently used items. Respective 2338 * fields in mainmbox are updated just prior to sleeping. 2339 */ 2340 2341 /* 2342 * Reading c_state requires either c_mutex or ch_mutex. 2343 * Writing c_state requires both c_mutex and ch_mutex in the order: 2344 * ch_mutex 2345 * c_mutex 2346 */ 2347 typedef struct idn_chaninfo { 2348 kmutex_t c_mutex; 2349 uchar_t c_state; /* protected by c_mutex */ 2350 uchar_t c_checkin; /* asynchronous flag */ 2351 kcondvar_t c_cv; 2352 ushort_t c_waiters; /* protected by c_mutex */ 2353 ushort_t c_inprogress; /* protected by c_mutex */ 2354 } idn_chaninfo_t; 2355 2356 /* 2357 * Reading/Writing ch_state requires ch_mutex. 2358 * When updating both recv and send c_state's for the locks 2359 * must be grabbed in the following order: 2360 * ch_mutex 2361 * ch_recv.c_mutex 2362 * ch_send.c_mutex 2363 * This order is necessary to prevent deadlocks. 2364 * In general ch_state is intended to represent c_state of 2365 * individual send/recv sides. During state transitions the 2366 * ch_state and c_state values may be slightly different, 2367 * but eventually should end up identical. 2368 */ 2369 typedef struct idn_chansvr { 2370 uchar_t ch_id; 2371 uchar_t ch_state; /* protected by ch_mutex */ 2372 lock_t ch_initlck; 2373 lock_t ch_actvlck; 2374 domainset_t ch_reg_domset; 2375 kmutex_t ch_mutex; 2376 2377 idn_chaninfo_t ch_send; 2378 int _padding2[(64 - 2379 (2*sizeof (uchar_t)) - (2*sizeof (lock_t)) - 2380 sizeof (uint_t) - sizeof (kmutex_t) - 2381 sizeof (idn_chaninfo_t)) / sizeof (int)]; 2382 2383 idn_chaninfo_t ch_recv; 2384 2385 uint64_t ch_recv_scanset; 2386 uint64_t ch_recv_scanset_pending; 2387 2388 domainset_t ch_recv_domset; 2389 domainset_t ch_recv_domset_pending; 2390 short ch_recv_domcount; 2391 kcondvar_t ch_recv_cv; 2392 int ch_recv_waittime; 2393 int ch_recv_changed; 2394 2395 kthread_id_t ch_recv_threadp; 2396 ksema_t *ch_recv_morguep; 2397 int ch_bound_cpuid; 2398 int ch_bound_cpuid_pending; 2399 } idn_chansvr_t; 2400 2401 typedef struct idn_mainmbox { 2402 kmutex_t mm_mutex; 2403 short mm_channel; 2404 short mm_domid; 2405 ushort_t mm_flags; 2406 short mm_type; 2407 2408 idn_chansvr_t *mm_csp; /* non-NULL indicates reg'd */ 2409 int mm_count; 2410 int mm_dropped; 2411 idn_mboxtbl_t *mm_smr_mboxp; /* SMR vaddr */ 2412 2413 ushort_t *mm_smr_activep; /* SMR pointer */ 2414 ushort_t *mm_smr_readyp; /* SMR pointer */ 2415 int mm_qiget; /* next msg to get */ 2416 int mm_qiput; /* next slot to put msg */ 2417 } idn_mainmbox_t; 2418 2419 /* 2420 * mm_flags 2421 */ 2422 #define IDNMMBOX_FLAG_CORRUPTED 0x01 2423 /* 2424 * mm_type 2425 */ 2426 #define IDNMMBOX_TYPE_RECV 0x1 2427 #define IDNMMBOX_TYPE_SEND 0x2 2428 2429 #define IDNMBOX_IS_RECV(m) ((m) == IDNMMBOX_TYPE_RECV) 2430 #define IDNMBOX_IS_SEND(m) ((m) == IDNMMBOX_TYPE_SEND) 2431 2432 /* 2433 * Period between sending wakeup xdc's to remote domain. 2434 */ 2435 #define IDN_CHANNEL_WAKEUP_PERIOD (hz >> 1) 2436 /* 2437 * ms_flag bit values. 2438 */ 2439 #define IDN_MBOXMSG_FLAG_RECLAIM 0x1 /* needs to be reclaimed */ 2440 #define IDN_MBOXMSG_FLAG_INPROCESS 0x2 2441 #define IDN_MBOXMSG_FLAG_ERR_BADOFFSET 0x4 2442 #define IDN_MBOXMSG_FLAG_ERR_NOMBOX 0x8 2443 #define IDN_MBOXMSG_FLAG_ERRMASK 0xc 2444 /* 2445 * ch_state/c_state bit values. 2446 */ 2447 #define IDN_CHANSVC_STATE_ATTACHED 0x01 2448 #define IDN_CHANSVC_STATE_ENABLED 0x02 2449 #define IDN_CHANSVC_STATE_ACTIVE 0x04 2450 #define IDN_CHANSVC_STATE_FLUSH 0x10 2451 #define IDN_CHANSVC_STATE_CORRUPTED 0x20 2452 #define IDN_CHANSVC_STATE_MASK 0x07 /* ATTACHED/ENABLED/ACTIVE */ 2453 2454 #define IDN_CHANSVC_PENDING_BITS (IDN_CHANSVC_STATE_ATTACHED | \ 2455 IDN_CHANSVC_STATE_ENABLED) 2456 2457 /* 2458 * GLOBAL 2459 */ 2460 #define IDN_CHANNEL_IS_ATTACHED(csp) \ 2461 ((csp)->ch_state & IDN_CHANSVC_STATE_ATTACHED) 2462 #define IDN_CHANNEL_IS_DETACHED(csp) \ 2463 (!IDN_CHANNEL_IS_ATTACHED(csp)) 2464 #define IDN_CHANNEL_IS_PENDING(csp) \ 2465 (((csp)->ch_state & IDN_CHANSVC_STATE_MASK) == \ 2466 IDN_CHANSVC_PENDING_BITS) 2467 #define IDN_CHANNEL_IS_ACTIVE(csp) \ 2468 ((csp)->ch_state & IDN_CHANSVC_STATE_ACTIVE) 2469 #define IDN_CHANNEL_IS_ENABLED(csp) \ 2470 ((csp)->ch_state & IDN_CHANSVC_STATE_ENABLED) 2471 /* 2472 * SEND 2473 */ 2474 #define IDN_CHANNEL_IS_SEND_ACTIVE(csp) \ 2475 ((csp)->ch_send.c_state & IDN_CHANSVC_STATE_ACTIVE) 2476 /* 2477 * RECV 2478 */ 2479 #define IDN_CHANNEL_IS_RECV_ACTIVE(csp) \ 2480 ((csp)->ch_recv.c_state & IDN_CHANSVC_STATE_ACTIVE) 2481 #define IDN_CHANNEL_IS_RECV_CORRUPTED(csp) \ 2482 ((csp)->ch_recv.c_state & IDN_CHANSVC_STATE_CORRUPTED) 2483 2484 2485 #define IDN_CHAN_SEND_INPROGRESS(csp) ((csp)->ch_send.c_inprogress++) 2486 #define IDN_CHAN_SEND_DONE(csp) \ 2487 { \ 2488 ASSERT((csp)->ch_send.c_inprogress > 0); \ 2489 if ((--((csp)->ch_send.c_inprogress) == 0) && \ 2490 ((csp)->ch_send.c_waiters != 0)) \ 2491 cv_broadcast(&(csp)->ch_send.c_cv); \ 2492 } 2493 #define IDN_CHAN_RECV_INPROGRESS(csp) ((csp)->ch_recv.c_inprogress++) 2494 #define IDN_CHAN_RECV_DONE(csp) \ 2495 { \ 2496 ASSERT((csp)->ch_recv.c_inprogress > 0); \ 2497 if ((--((csp)->ch_recv.c_inprogress) == 0) && \ 2498 ((csp)->ch_recv.c_waiters != 0)) \ 2499 cv_broadcast(&(csp)->ch_recv.c_cv); \ 2500 } 2501 2502 #define IDN_CHANSVC_MARK_ATTACHED(csp) \ 2503 ((csp)->ch_state = IDN_CHANSVC_STATE_ATTACHED) 2504 #define IDN_CHANSVC_MARK_DETACHED(csp) \ 2505 ((csp)->ch_state = 0) 2506 #define IDN_CHANSVC_MARK_PENDING(csp) \ 2507 ((csp)->ch_state |= IDN_CHANSVC_STATE_ENABLED) 2508 #define IDN_CHANSVC_MARK_DISABLED(csp) \ 2509 ((csp)->ch_state &= ~IDN_CHANSVC_STATE_ENABLED) 2510 #define IDN_CHANSVC_MARK_ACTIVE(csp) \ 2511 ((csp)->ch_state |= IDN_CHANSVC_STATE_ACTIVE) 2512 #define IDN_CHANSVC_MARK_IDLE(csp) \ 2513 ((csp)->ch_state &= ~IDN_CHANSVC_STATE_ACTIVE) 2514 2515 #define IDN_CHANSVC_MARK_RECV_ACTIVE(csp) \ 2516 ((csp)->ch_recv.c_state |= IDN_CHANSVC_STATE_ACTIVE) 2517 #define IDN_CHANSVC_MARK_RECV_CORRUPTED(csp) \ 2518 ((csp)->ch_recv.c_state |= IDN_CHANSVC_STATE_CORRUPTED) 2519 #define IDN_CHANSVC_MARK_SEND_ACTIVE(csp) \ 2520 ((csp)->ch_send.c_state |= IDN_CHANSVC_STATE_ACTIVE) 2521 2522 typedef enum { 2523 IDNCHAN_ACTION_DETACH, /* DETACH (ATTACHED = 0) */ 2524 IDNCHAN_ACTION_STOP, /* DISABLE (ENABLED = 0) */ 2525 IDNCHAN_ACTION_SUSPEND, /* IDLE (ACTIVE = 0) */ 2526 IDNCHAN_ACTION_RESUME, 2527 IDNCHAN_ACTION_RESTART, 2528 IDNCHAN_ACTION_ATTACH 2529 } idn_chanaction_t; 2530 2531 #define IDN_CHANNEL_SUSPEND(c, w) \ 2532 (idn_chan_action((c), IDNCHAN_ACTION_SUSPEND, (w))) 2533 #define IDN_CHANNEL_RESUME(c) \ 2534 (idn_chan_action((c), IDNCHAN_ACTION_RESUME, 0)) 2535 #define IDN_CHANNEL_STOP(c, w) \ 2536 (idn_chan_action((c), IDNCHAN_ACTION_STOP, (w))) 2537 #define IDN_CHANNEL_RESTART(c) \ 2538 (idn_chan_action((c), IDNCHAN_ACTION_RESTART, 0)) 2539 #define IDN_CHANNEL_DETACH(c, w) \ 2540 (idn_chan_action((c), IDNCHAN_ACTION_DETACH, (w))) 2541 #define IDN_CHANNEL_ATTACH(c) \ 2542 (idn_chan_action((c), IDNCHAN_ACTION_ATTACH, 0)) 2543 2544 /* 2545 * ds_waittime range values. 2546 * When a packet arrives the waittime starts at MIN and gradually 2547 * shifts up to MAX until another packet arrives. If still no 2548 * packet arrives then we go to a hard sleep 2549 */ 2550 #define IDN_NETSVR_SPIN_COUNT idn_netsvr_spin_count 2551 #define IDN_NETSVR_WAIT_MIN idn_netsvr_wait_min 2552 #define IDN_NETSVR_WAIT_MAX idn_netsvr_wait_max 2553 #define IDN_NETSVR_WAIT_SHIFT idn_netsvr_wait_shift 2554 2555 /* 2556 * --------------------------------------------------------------------- 2557 * IDN Global Data 2558 * 2559 * The comment to the right of the respective field represents 2560 * what lock protects that field. If there is no comment then 2561 * no lock is required to access the field. 2562 * --------------------------------------------------------------------- 2563 */ 2564 typedef struct idn_global { /* protected by... */ 2565 krwlock_t grwlock; 2566 /* 2567 * Global state of IDN w.r.t. 2568 * the local domain. 2569 */ 2570 idn_gstate_t state; /* grwlock */ 2571 /* 2572 * Version of the IDN driver. 2573 * Is passed in DMV header so that 2574 * other domains can validate they 2575 * support protocol used by local 2576 * domain. 2577 */ 2578 int version; 2579 /* 2580 * Set to 1 if SMR region properly 2581 * allocated and available. 2582 */ 2583 int enabled; 2584 /* 2585 * Local domains "domain id". 2586 */ 2587 int localid; 2588 /* 2589 * Domain id of the Master domain. 2590 * Set to IDN_NIL_DOMID if none 2591 * currently exists. 2592 */ 2593 int masterid; /* grwlock */ 2594 /* 2595 * Primarily used during Reconfiguration 2596 * to track the expected new Master. 2597 * Once the current IDN is dismantled 2598 * the local domain will attempt to 2599 * connect to this new domain. 2600 */ 2601 int new_masterid; /* grwlock */ 2602 /* 2603 * Number of protocol servers configured. 2604 */ 2605 int nservers; 2606 2607 dev_info_t *dip; 2608 2609 struct { 2610 /* 2611 * dmv_inum 2612 * Interrupt number assigned by 2613 * DMV subsystem to IDN's DMV 2614 * handler. 2615 * soft_inum 2616 * Soft interrupt number assigned 2617 * by OS (add_softintr) for Soft 2618 * interrupt dispatched by DMV 2619 * handler. 2620 */ 2621 uint_t dmv_inum; 2622 uint64_t soft_inum; 2623 caddr_t dmv_data; 2624 size_t dmv_data_len; 2625 } intr; 2626 /* 2627 * first_swlink 2628 * Used as synchronization to 2629 * know whether channels need 2630 * to be activated or not. 2631 * first_hwlink 2632 * Used as mechanism to determine 2633 * whether local domain needs 2634 * to publicize its SMR, assuming 2635 * it is the Master. 2636 * first_hwmaster 2637 * Domainid of the domain that 2638 * was the master at the time 2639 * the hardware was programmed. 2640 * We need to keep this so that 2641 * we deprogram with respect to 2642 * the correct domain that the 2643 * hardware was originally 2644 * programmed to. 2645 */ 2646 lock_t first_swlink; 2647 lock_t first_hwlink; 2648 short first_hwmasterid; 2649 /* 2650 * The xmit* fields are used to set-up a background 2651 * thread to monitor when a channel is ready to be 2652 * enabled again. This is necessary since IDN 2653 * can't rely on hardware to interrupt it when 2654 * things are ready to go. We need this ability 2655 * to wakeup our STREAMS queues. 2656 * Criteria for reenabling queues. 2657 * gstate == IDNGS_ONLINE 2658 * channel = !check-in 2659 * buffers are available 2660 * 2661 * xmit_chanset_wanted 2662 * Indicates which channels wish to have 2663 * their queues reenabled when ready. 2664 * xmit_tid 2665 * Timeout-id of monitor. 2666 */ 2667 kmutex_t xmit_lock; 2668 idn_chanset_t xmit_chanset_wanted; /* xmit_lock */ 2669 timeout_id_t xmit_tid; /* xmit_lock */ 2670 2671 struct { 2672 /* 2673 * ready 2674 * Indicates SMR region allocated 2675 * and available from OBP. 2676 * vaddr 2677 * Virtual address assigned to SMR. 2678 * locpfn 2679 * Page Frame Number associated 2680 * with local domain's SMR. 2681 * rempfn 2682 * Page Frame Number associated 2683 * with remote (Master) domain's SMR. 2684 * rempfnlim 2685 * PFN past end of remote domain's 2686 * SMR. 2687 * prom_paddr/prom_size 2688 * Physical address and size of 2689 * SMR that were assigned by OBP. 2690 */ 2691 int ready; 2692 caddr_t vaddr; 2693 pfn_t locpfn; 2694 pfn_t rempfn; /* grwlock */ 2695 2696 pfn_t rempfnlim; /* grwlock */ 2697 uint64_t prom_paddr; 2698 2699 uint64_t prom_size; 2700 } smr; 2701 2702 /* 2703 * idnsb_mutex 2704 * Protects access to IDN's 2705 * sigblock area. 2706 * idnsb_eventp 2707 * IDN's private area in sigblock 2708 * used for signaling events 2709 * regarding IDN state to SSP. 2710 * idnsb 2711 * Area within IDN's private 2712 * sigblock area used for tracking 2713 * certain IDN state which might 2714 * be useful during arbstop 2715 * conditions (if caused by IDN!). 2716 */ 2717 kmutex_t idnsb_mutex; 2718 idnsb_event_t *idnsb_eventp; 2719 idnsb_t *idnsb; 2720 2721 struct sigbintr { 2722 /* 2723 * sb_mutex 2724 * Protects sigbintr elements 2725 * to synchronize execution of 2726 * sigblock (IDN) mailbox handling. 2727 * sb_cpuid 2728 * Cpu whose sigblock mailbox 2729 * originally received IDN request 2730 * from SSP. Necessary to know 2731 * where to put response. 2732 * sb_busy 2733 * Flag indicating state of 2734 * sigblock handler thread. 2735 * Synchronize activity between 2736 * SSP and current IDN requests that 2737 * are in progress. 2738 * sb_cv 2739 * Condition variable for sigblock 2740 * handler thread to wait on. 2741 * sb_inum 2742 * Soft interrupt number assigned 2743 * by OS to handle soft interrupt 2744 * request make by low-level (IDN) 2745 * sigblock handler to dispatch actual 2746 * processing of sigblock (mailbox) 2747 * request. 2748 */ 2749 kmutex_t sb_mutex; 2750 uchar_t sb_cpuid; /* sigbintr.sb_mutex */ 2751 uchar_t sb_busy; /* sigbintr.sb_mutex */ 2752 kcondvar_t sb_cv; /* sigbintr.sb_mutex */ 2753 uint64_t sb_inum; /* sigbintr.sb_mutex */ 2754 } sigbintr; 2755 2756 /* 2757 * struprwlock, strup, sip, siplock 2758 * Standard network streams 2759 * handling structures to manage 2760 * instances of IDN driver. 2761 */ 2762 krwlock_t struprwlock; 2763 struct idnstr *strup; /* struprwlock */ 2764 2765 struct idn *sip; /* siplock */ 2766 kmutex_t sipwenlock; 2767 kmutex_t siplock; 2768 2769 /* 2770 * Area where IDN maintains its kstats. 2771 */ 2772 kstat_t *ksp; 2773 /* 2774 * Number of domains that local domain 2775 * has "open". 2776 */ 2777 int ndomains; /* grwlock */ 2778 /* 2779 * Number of domains that local domain 2780 * has registered as non-responsive. 2781 */ 2782 int nawols; /* grwlock */ 2783 /* 2784 * Number of network channels (interfaces) 2785 * which are currently active. 2786 */ 2787 int nchannels; /* grwlock */ 2788 /* 2789 * Bitmask representing channels 2790 * that are currently active. 2791 */ 2792 idn_chanset_t chanset; /* grwlock */ 2793 /* 2794 * Array of channel (network/data) servers 2795 * that have been created. Not necessarily 2796 * all active. 2797 */ 2798 idn_chansvr_t *chan_servers; /* elmts = ch_mutex */ 2799 /* 2800 * Pointer to sigblock handler thread 2801 * which ultimately processes SSP 2802 * IDN requests. 2803 */ 2804 kthread_id_t sigb_threadp; 2805 /* 2806 * Pointer to area used by Master 2807 * to hold mailbox structures. 2808 * Actual memory is in SMR. 2809 */ 2810 idn_mboxtbl_t *mboxarea; /* grwlock */ 2811 2812 struct { 2813 /* 2814 * IDN_SYNC_LOCK - Provides serialization 2815 * mechanism when performing synchronous 2816 * operations across domains. 2817 */ 2818 kmutex_t sz_mutex; 2819 /* 2820 * Actual synchronization zones for 2821 * CONNECT/DISCONNECT phases. 2822 */ 2823 idn_synczone_t sz_zone[IDN_SYNC_NUMZONE]; 2824 } sync; /* sz_mutex */ 2825 2826 struct { 2827 /* 2828 * ds_trans_on 2829 * Set of domains which are trying 2830 * to establish a link w/local. 2831 * ds_ready_on 2832 * Set of domains which local knows 2833 * are ready for linking, but has 2834 * not yet confirmed w/peers. 2835 * ds_connected 2836 * Set of domains that local has 2837 * confirmed as being ready. 2838 * ds_trans_off 2839 * Set of domains which are trying 2840 * to unlink from local. 2841 * ds_ready_off 2842 * Set of domains which local knows 2843 * are ready for unlink, but has 2844 * not yet confirmed w/peers. 2845 * ds_relink 2846 * Set of domains we're expecting 2847 * to relink with subsequent to 2848 * a RECONFIG (new master selection). 2849 * ds_hwlinked 2850 * Set of domains for which local 2851 * has programmed its hardware. 2852 * ds_flush 2853 * Set of domains requiring that 2854 * local flush its ecache prior 2855 * to unlinking. 2856 * ds_awol 2857 * Set of domains believed to be 2858 * AWOL - haven't responded to 2859 * any queries. 2860 * ds_hitlist 2861 * Set of domains which local domain 2862 * is unlinking from and wishes to ignore 2863 * any extraneous indirect link requests 2864 * from other domains, e.g. during a 2865 * Reconfig. 2866 */ 2867 domainset_t ds_trans_on; /* sz_mutex */ 2868 domainset_t ds_ready_on; /* sz_mutex */ 2869 2870 domainset_t ds_connected; /* sz_mutex */ 2871 domainset_t ds_trans_off; /* sz_mutex */ 2872 2873 domainset_t ds_ready_off; /* sz_mutex */ 2874 domainset_t ds_relink; /* sz_mutex */ 2875 2876 domainset_t ds_hwlinked; /* sz_mutex */ 2877 domainset_t ds_flush; /* sz_mutex */ 2878 2879 domainset_t ds_awol; /* sz_mutex */ 2880 domainset_t ds_hitlist; /* sz_mutex */ 2881 } domset; 2882 /* 2883 * Bitmask identifying all cpus in 2884 * the local IDN. 2885 */ 2886 cpuset_t dc_cpuset; 2887 /* 2888 * Bitmask identifying all boards in 2889 * the local IDN. 2890 */ 2891 boardset_t dc_boardset; 2892 2893 struct dopers { 2894 /* 2895 * Waiting area for IDN requests, 2896 * i.e. link & unlinks. IDN requests 2897 * are performed asynchronously so 2898 * we need a place to wait until the 2899 * operation has completed. 2900 * 2901 * dop_domset 2902 * Identifies which domains the 2903 * current waiter is interested in. 2904 * dop_waitcount 2905 * Number of waiters in the room. 2906 * dop_waitlist 2907 * Actual waiting area. 2908 * dop_freelist 2909 * Freelist (small cache) of 2910 * structs for waiting area. 2911 */ 2912 kmutex_t dop_mutex; 2913 kcondvar_t dop_cv; /* dop_mutex */ 2914 domainset_t dop_domset; /* dop_mutex */ 2915 int dop_waitcount; /* dop_mutex */ 2916 dop_waitlist_t *dop_waitlist; /* dop_mutex */ 2917 dop_waitlist_t *dop_freelist; /* dop_mutex */ 2918 /* dop_mutex */ 2919 dop_waitlist_t _dop_wcache[IDNOP_CACHE_SIZE]; 2920 } *dopers; 2921 2922 struct { 2923 /* 2924 * Protocol Server: 2925 * 2926 * p_server 2927 * Linked list of queues 2928 * describing protocol 2929 * servers in use. 2930 * p_jobpool 2931 * Kmem cache of structs 2932 * used to enqueue protocol 2933 * jobs for protocol servers. 2934 * p_morgue 2935 * Synchronization (check-in) 2936 * area used when terminating 2937 * protocol servers (threads). 2938 */ 2939 struct idn_protoqueue *p_serverq; 2940 kmem_cache_t *p_jobpool; 2941 ksema_t p_morgue; 2942 } protocol; 2943 2944 struct idn_retry_queue { 2945 /* 2946 * rq_jobs 2947 * Queue of Retry jobs 2948 * that are outstanding. 2949 * rq_count 2950 * Number of jobs on retry 2951 * queue. 2952 * rq_cache 2953 * Kmem cache for structs 2954 * used to describe retry 2955 * jobs. 2956 */ 2957 idn_retry_job_t *rq_jobs; /* rq_mutex */ 2958 int rq_count; /* rq_mutex */ 2959 kmutex_t rq_mutex; /* rq_mutex */ 2960 2961 kcondvar_t rq_cv; /* rq_mutex */ 2962 kmem_cache_t *rq_cache; 2963 } retryqueue; 2964 2965 struct slabpool { 2966 /* 2967 * Slabpool: 2968 * 2969 * ntotslabs 2970 * Total number of slabs 2971 * in SMR (free & in-use). 2972 * npools 2973 * Number of pools available 2974 * in list. One smr_slabtbl 2975 * exists for each pool. 2976 */ 2977 int ntotslabs; 2978 int npools; 2979 struct smr_slabtbl { 2980 /* 2981 * sarray 2982 * Array of slab structs 2983 * representing slabs in SMR. 2984 * nfree 2985 * Number of slabs actually 2986 * available in sarray. 2987 * nslabs 2988 * Number of slabs represented 2989 * in sarray (free & in-use). 2990 */ 2991 smr_slab_t *sarray; 2992 int nfree; 2993 int nslabs; 2994 } *pool; 2995 /* 2996 * Holds array of smr_slab_t structs kmem_alloc'd 2997 * for slabpool. 2998 */ 2999 smr_slab_t *savep; 3000 } *slabpool; 3001 3002 struct slabwaiter { 3003 /* 3004 * Waiting area for threads 3005 * requesting slab allocations. 3006 * Used by Slaves for all requests, 3007 * but used by Master only for 3008 * redundant requests, i.e. multiple 3009 * requests on behalf of the same 3010 * domain. One slabwaiter area 3011 * exist for each possible domain. 3012 * 3013 * w_nwaiters 3014 * Number of threads waiting 3015 * in waiting area. 3016 * w_done 3017 * Flag to indicate that 3018 * allocation request has 3019 * completed. 3020 * w_serrno 3021 * Non-zero indicates an 3022 * errno value to represent 3023 * error that occurred during 3024 * attempt to allocate slab. 3025 * w_closed 3026 * Indicates that waiting area is 3027 * closed and won't allow any new 3028 * waiters. This occurs during 3029 * the small window where we're 3030 * trying to suspend a channel. 3031 * w_cv 3032 * Condvar for waiting on. 3033 * w_sp 3034 * Holds slab structure of 3035 * successfully allocated slab. 3036 */ 3037 kmutex_t w_mutex; 3038 short w_nwaiters; /* w_mutex */ 3039 short w_done; /* w_mutex */ 3040 short w_serrno; /* w_mutex */ 3041 short w_closed; /* w_mutex */ 3042 kcondvar_t w_cv; /* w_mutex */ 3043 smr_slab_t *w_sp; /* w_mutex */ 3044 } *slabwaiter; 3045 /* 3046 * Kmem cache used for allocating 3047 * timer structures for outstanding 3048 * IDN requests. 3049 */ 3050 kmem_cache_t *timer_cache; 3051 /* 3052 * Effectively constant used in 3053 * translating buffer frames in 3054 * mailbox message frames to 3055 * offsets within SMR. 3056 */ 3057 int bframe_shift; 3058 } idn_global_t; 3059 3060 typedef struct idn_retry_queue idn_retry_queue_t; 3061 3062 #define IDN_GET_MASTERID() (idn.masterid) 3063 #define IDN_SET_MASTERID(mid) \ 3064 { \ 3065 int _mid = (mid); \ 3066 mutex_enter(&idn.idnsb_mutex); \ 3067 if (idn.idnsb) { \ 3068 idn.idnsb->id_pmaster_board = \ 3069 idn.idnsb->id_master_board; \ 3070 if (_mid == IDN_NIL_DOMID) \ 3071 idn.idnsb->id_master_board = (uchar_t)0xff; \ 3072 else \ 3073 idn.idnsb->id_master_board = \ 3074 (uchar_t)idn_domain[_mid].dvote.v.board; \ 3075 } \ 3076 mutex_exit(&idn.idnsb_mutex); \ 3077 IDN_HISTORY_LOG(IDNH_MASTERID, _mid, idn.masterid, 0); \ 3078 PR_STATE("%d: MASTERID %d -> %d\n", __LINE__, \ 3079 idn.masterid, _mid); \ 3080 idn.masterid = _mid; \ 3081 } 3082 #define IDN_GET_NEW_MASTERID() (idn.new_masterid) 3083 #define IDN_SET_NEW_MASTERID(mid) \ 3084 { \ 3085 PR_STATE("%d: NEW MASTERID %d -> %d\n", __LINE__, \ 3086 idn.new_masterid, (mid)); \ 3087 idn.new_masterid = (mid); \ 3088 } 3089 3090 #define IDN_GLOCK_EXCL() (rw_enter(&idn.grwlock, RW_WRITER)) 3091 #define IDN_GLOCK_SHARED() (rw_enter(&idn.grwlock, RW_READER)) 3092 #define IDN_GLOCK_TRY_SHARED() (rw_tryenter(&idn.grwlock, RW_READER)) 3093 #define IDN_GLOCK_DOWNGRADE() (rw_downgrade(&idn.grwlock)) 3094 #define IDN_GUNLOCK() (rw_exit(&idn.grwlock)) 3095 #define IDN_GLOCK_IS_EXCL() (RW_WRITE_HELD(&idn.grwlock)) 3096 #define IDN_GLOCK_IS_SHARED() (RW_READ_HELD(&idn.grwlock)) 3097 #define IDN_GLOCK_IS_HELD() (RW_LOCK_HELD(&idn.grwlock)) 3098 3099 #define IDN_SYNC_LOCK() (mutex_enter(&idn.sync.sz_mutex)) 3100 #define IDN_SYNC_TRYLOCK() (mutex_tryenter(&idn.sync.sz_mutex)) 3101 #define IDN_SYNC_UNLOCK() (mutex_exit(&idn.sync.sz_mutex)) 3102 #define IDN_SYNC_IS_LOCKED() (MUTEX_HELD(&idn.sync.sz_mutex)) 3103 3104 /* 3105 * Macro to reset some globals necessary in preparing 3106 * for initialization of HW for IDN. 3107 */ 3108 #define IDN_PREP_HWINIT() \ 3109 { \ 3110 ASSERT(IDN_GLOCK_IS_EXCL()); \ 3111 lock_clear(&idn.first_swlink); \ 3112 lock_clear(&idn.first_hwlink); \ 3113 idn.first_hwmasterid = (short)IDN_NIL_DOMID; \ 3114 } 3115 3116 /* 3117 * Return values of idn_send_data. 3118 */ 3119 #define IDNXMIT_OKAY 0 /* xmit successful */ 3120 #define IDNXMIT_LOOP 1 /* loopback */ 3121 #define IDNXMIT_DROP 2 /* drop packet */ 3122 #define IDNXMIT_RETRY 3 /* retry packet (requeue and qenable) */ 3123 #define IDNXMIT_REQUEUE 4 /* requeue packet, but don't qenable */ 3124 3125 /* 3126 * --------------------------------------------------------------------- 3127 * ss_rwlock must be acquired _before_ any idn_domain locks are 3128 * acquired if both structs need to be accessed. 3129 * idn.struprwlock is acquired when traversing IDN's strup list 3130 * and when adding or deleting entries. 3131 * 3132 * ss_nextp Linked list of streams. 3133 * ss_rq Respective read queue. 3134 * ss_sip Attached device. 3135 * ss_state Current DL state. 3136 * ss_sap Bound SAP. 3137 * ss_flags Misc. flags. 3138 * ss_mccount # enabled multicast addrs. 3139 * ss_mctab Table of multicast addrs. 3140 * ss_minor Minor device number. 3141 * ss_rwlock Protects ss_linkup fields and DLPI state machine. 3142 * ss_linkup Boolean flag indicating whether particular (domain) link 3143 * is up. 3144 * --------------------------------------------------------------------- 3145 */ 3146 struct idnstr { /* gets shoved into q_ptr */ 3147 struct idnstr *ss_nextp; 3148 queue_t *ss_rq; 3149 struct idn *ss_sip; 3150 t_uscalar_t ss_state; 3151 t_uscalar_t ss_sap; 3152 uint_t ss_flags; 3153 uint_t ss_mccount; 3154 struct ether_addr *ss_mctab; 3155 minor_t ss_minor; 3156 krwlock_t ss_rwlock; 3157 }; 3158 3159 /* 3160 * idnstr.ss_flags - Per-stream flags 3161 */ 3162 #define IDNSFAST 0x01 /* "M_DATA fastpath" mode */ 3163 #define IDNSRAW 0x02 /* M_DATA plain raw mode */ 3164 #define IDNSALLPHYS 0x04 /* "promiscuous mode" */ 3165 #define IDNSALLMULTI 0x08 /* enable all multicast addresses */ 3166 #define IDNSALLSAP 0x10 /* enable all ether type values */ 3167 3168 /* 3169 * Maximum number of multicast address per stream. 3170 */ 3171 #define IDNMAXMC 64 3172 #define IDNMCALLOC (IDNMAXMC * sizeof (struct ether_addr)) 3173 3174 /* 3175 * Full DLSAP address length (in struct dladdr format). 3176 */ 3177 #define IDNADDRL (ETHERADDRL + sizeof (ushort_t)) 3178 3179 struct idndladdr { 3180 struct ether_addr dl_phys; 3181 ushort_t dl_sap; 3182 }; 3183 3184 #define IDNHEADROOM 64 3185 #define IDNROUNDUP(a, n) (((a) + ((n) - 1)) & ~((n) - 1)) 3186 3187 /* 3188 * Respective interpretation of bytes in 6 byte ethernet address. 3189 */ 3190 #define IDNETHER_ZERO 0 3191 #define IDNETHER_COOKIE1 1 3192 #define IDNETHER_COOKIE1_VAL 0xe5 3193 #define IDNETHER_COOKIE2 2 3194 #define IDNETHER_COOKIE2_VAL 0x82 3195 #define IDNETHER_NETID 3 3196 #define IDNETHER_CHANNEL 4 3197 #define IDNETHER_RESERVED 5 3198 #define IDNETHER_RESERVED_VAL 0x64 3199 3200 /* 3201 * IDN driver supports multliple instances, however they 3202 * still all refer to the same "physical" device. Multiple 3203 * instances are supported primarily to allow increased 3204 * STREAMs bandwidth since each instance has it's own IP queue. 3205 * This structure is primarily defined to be consistent with 3206 * other network drivers and also to hold the kernel stats. 3207 */ 3208 struct idn_kstat { 3209 ulong_t si_ipackets; /* # packets received */ 3210 ulong_t si_ierrors; /* # total input errors */ 3211 ulong_t si_opackets; /* # packets sent */ 3212 ulong_t si_oerrors; /* # total output errors */ 3213 3214 ulong_t si_txcoll; /* # xmit collisions */ 3215 ulong_t si_rxcoll; /* # recv collisions */ 3216 ulong_t si_crc; /* # recv crc errors */ 3217 ulong_t si_buff; /* # recv pkt sz > buf sz */ 3218 3219 ulong_t si_nolink; /* # loss of connection */ 3220 ulong_t si_linkdown; /* # link is down */ 3221 ulong_t si_inits; /* # driver inits */ 3222 ulong_t si_nocanput; /* # canput() failures */ 3223 3224 ulong_t si_allocbfail; /* # allocb() failures */ 3225 ulong_t si_notbufs; /* # out of xmit buffers */ 3226 ulong_t si_reclaim; /* # reclaim failures */ 3227 ulong_t si_smraddr; /* # bad SMR addrs */ 3228 3229 ulong_t si_txmax; /* # xmit over limit */ 3230 ulong_t si_txfull; /* # xmit mbox full */ 3231 ulong_t si_xdcall; /* # xdcalls sent */ 3232 ulong_t si_sigsvr; /* # data server wakeups */ 3233 3234 ulong_t si_mboxcrc; /* # send mbox crc errors */ 3235 /* 3236 * MIB II kstat variables 3237 */ 3238 ulong_t si_rcvbytes; /* # bytes received */ 3239 ulong_t si_xmtbytes; /* # bytes transmitted */ 3240 ulong_t si_multircv; /* # multicast packets received */ 3241 3242 ulong_t si_multixmt; /* # multicast packets for xmit */ 3243 ulong_t si_brdcstrcv; /* # broadcast packets received */ 3244 ulong_t si_brdcstxmt; /* # broadcast packets for xmit */ 3245 ulong_t si_norcvbuf; /* # rcv packets discarded */ 3246 3247 ulong_t si_noxmtbuf; /* # xmit packets discarded */ 3248 /* 3249 * PSARC 1997/198 : 64 bit kstats 3250 */ 3251 uint64_t si_ipackets64; /* # packets received */ 3252 uint64_t si_opackets64; /* # packets transmitted */ 3253 uint64_t si_rbytes64; /* # bytes received */ 3254 uint64_t si_obytes64; /* # bytes transmitted */ 3255 /* 3256 * PSARC 1997/247 : RFC 1643 dot3Stats... 3257 */ 3258 ulong_t si_fcs_errors; /* FCSErrors */ 3259 ulong_t si_macxmt_errors; /* InternalMacTransmitErrors */ 3260 ulong_t si_toolong_errors; /* FrameTooLongs */ 3261 ulong_t si_macrcv_errors; /* InternalMacReceiveErrors */ 3262 }; 3263 3264 /* 3265 * Per logical interface private data structure. 3266 */ 3267 struct idn { 3268 struct idn *si_nextp; /* linked instances */ 3269 dev_info_t *si_dip; /* assoc. dev_info */ 3270 struct ether_addr si_ouraddr; /* enet address */ 3271 3272 uint_t si_flags; /* misc. flags */ 3273 uint_t si_wantw; /* xmit: out of res. */ 3274 queue_t *si_ip4q; /* ip (v4) read queue */ 3275 queue_t *si_ip6q; /* ip (v6) read queue */ 3276 3277 kstat_t *si_ksp; /* kstat pointer */ 3278 struct idn_kstat si_kstat; /* per-inst kstat */ 3279 }; 3280 3281 struct idn_gkstat { 3282 ulong_t gk_reconfigs; /* # reconfigs */ 3283 ulong_t gk_reconfig_last; /* timestamep */ 3284 ulong_t gk_reaps; /* # of reap request */ 3285 ulong_t gk_reap_last; /* timestamep */ 3286 3287 ulong_t gk_links; /* # of IDN links */ 3288 ulong_t gk_link_last; /* timestamep */ 3289 ulong_t gk_unlinks; /* # of IDN unlinks */ 3290 ulong_t gk_unlink_last; /* timestamep */ 3291 3292 ulong_t gk_buffail; /* # bad bufalloc */ 3293 ulong_t gk_buffail_last; /* timestamp */ 3294 ulong_t gk_slabfail; /* # bad slaballoc */ 3295 ulong_t gk_slabfail_last; /* timestamp */ 3296 3297 ulong_t gk_reap_count; /* # of slabs reaped */ 3298 ulong_t gk_dropped_intrs; /* dropped intrs */ 3299 }; 3300 3301 extern struct idn_gkstat sg_kstat; 3302 3303 #ifdef IDN_NO_KSTAT 3304 3305 #define IDN_KSTAT_INC(s, i) 3306 #define IDN_KSTAT_ADD(s, i, n) 3307 #define IDN_GKSTAT_INC(i) 3308 #define IDN_GKSTAT_ADD(vvv, iii) 3309 #define IDN_GKSTAT_GLOBAL_EVENT(vvv, nnn) 3310 3311 #else /* IDN_NO_KSTAT */ 3312 3313 #define IDN_KSTAT_INC(sss, vvv) \ 3314 ((((struct idn *)(sss))->si_kstat.vvv)++) 3315 #define IDN_KSTAT_ADD(sss, vvv, nnn) \ 3316 ((((struct idn *)(sss))->si_kstat.vvv) += (nnn)) 3317 #define IDN_GKSTAT_INC(vvv) ((sg_kstat.vvv)++) 3318 #define IDN_GKSTAT_ADD(vvv, iii) ((sg_kstat.vvv) += (iii)) 3319 #define IDN_GKSTAT_GLOBAL_EVENT(vvv, ttt) \ 3320 ((sg_kstat.vvv)++, ((sg_kstat.ttt) = lbolt)) 3321 3322 #endif /* IDN_NO_KSTAT */ 3323 3324 /* 3325 * idn.si_flags 3326 */ 3327 #define IDNRUNNING 0x01 /* IDNnet is UP */ 3328 #define IDNPROMISC 0x02 /* promiscuous mode enabled */ 3329 #define IDNSUSPENDED 0x04 /* suspended (DR) */ 3330 3331 typedef struct kstat_named kstate_named_t; 3332 3333 struct idn_kstat_named { 3334 kstat_named_t sk_ipackets; /* # packets received */ 3335 kstat_named_t sk_ierrors; /* # total input errors */ 3336 kstat_named_t sk_opackets; /* # packets sent */ 3337 kstat_named_t sk_oerrors; /* # total output errors */ 3338 3339 kstat_named_t sk_txcoll; /* # xmit collisions */ 3340 kstat_named_t sk_rxcoll; /* # recv collisions */ 3341 kstat_named_t sk_crc; /* # recv crc errors */ 3342 kstat_named_t sk_buff; /* # recv pkt sz > buf sz */ 3343 3344 kstat_named_t sk_nolink; /* # loss of connection */ 3345 kstat_named_t sk_linkdown; /* # link is down */ 3346 kstat_named_t sk_inits; /* # driver inits */ 3347 kstat_named_t sk_nocanput; /* # canput() failures */ 3348 3349 kstat_named_t sk_allocbfail; /* # allocb() failures */ 3350 kstat_named_t sk_notbufs; /* # out of xmit buffers */ 3351 kstat_named_t sk_reclaim; /* # reclaim failures */ 3352 kstat_named_t sk_smraddr; /* # bad SMR addrs */ 3353 3354 kstat_named_t sk_txmax; /* # xmit over limit */ 3355 kstat_named_t sk_txfull; /* # xmit mbox full */ 3356 kstat_named_t sk_xdcall; /* # xdcalls sent */ 3357 kstat_named_t sk_sigsvr; /* # data server wakeups */ 3358 3359 kstat_named_t sk_mboxcrc; /* # send mbox crc errors */ 3360 /* 3361 * MIB II kstat variables 3362 */ 3363 kstat_named_t sk_rcvbytes; /* # bytes received */ 3364 kstat_named_t sk_xmtbytes; /* # bytes transmitted */ 3365 kstat_named_t sk_multircv; /* # multicast packets received */ 3366 3367 kstat_named_t sk_multixmt; /* # multicast packets for xmit */ 3368 kstat_named_t sk_brdcstrcv; /* # broadcast packets received */ 3369 kstat_named_t sk_brdcstxmt; /* # broadcast packets for xmit */ 3370 kstat_named_t sk_norcvbuf; /* # rcv packets discarded */ 3371 3372 kstat_named_t sk_noxmtbuf; /* # xmit packets discarded */ 3373 /* 3374 * PSARC 1997/198 : 64bit kstats 3375 */ 3376 kstat_named_t sk_ipackets64; /* # packets received */ 3377 kstat_named_t sk_opackets64; /* # packets transmitted */ 3378 kstat_named_t sk_rbytes64; /* # bytes received */ 3379 kstat_named_t sk_obytes64; /* # bytes transmitted */ 3380 /* 3381 * PSARC 1997/247 : RFC 1643 dot3Stats... 3382 */ 3383 kstat_named_t sk_fcs_errors; /* FCSErr */ 3384 kstat_named_t sk_macxmt_errors; /* InternalMacXmtErr */ 3385 kstat_named_t sk_toolong_errors; /* FrameTooLongs */ 3386 kstat_named_t sk_macrcv_errors; /* InternalMacRcvErr */ 3387 }; 3388 3389 /* 3390 * Stats for global events of interest (non-counters). 3391 */ 3392 struct idn_gkstat_named { 3393 kstat_named_t sk_curtime; /* current time */ 3394 kstat_named_t sk_reconfigs; /* # master recfgs */ 3395 kstat_named_t sk_reconfig_last; /* timestamp */ 3396 kstat_named_t sk_reaps; /* # of reap req */ 3397 kstat_named_t sk_reap_last; /* timestamp */ 3398 kstat_named_t sk_links; /* # of links */ 3399 kstat_named_t sk_link_last; /* timestamp */ 3400 kstat_named_t sk_unlinks; /* # of unlinks */ 3401 kstat_named_t sk_unlink_last; /* timestamp */ 3402 kstat_named_t sk_buffail; /* # bad buf alloc */ 3403 kstat_named_t sk_buffail_last; /* timestamp */ 3404 kstat_named_t sk_slabfail; /* # bad buf alloc */ 3405 kstat_named_t sk_slabfail_last; /* timestamp */ 3406 kstat_named_t sk_reap_count; /* # slabs reaped */ 3407 kstat_named_t sk_dropped_intrs; /* intrs dropped */ 3408 }; 3409 3410 /* 3411 * --------------------------------------------------------------------- 3412 */ 3413 #ifdef DEBUG 3414 #define IDNXDC(d, mt, a1, a2, a3, a4) \ 3415 (debug_idnxdc("idnxdc", (int)(d), (mt), \ 3416 (uint_t)(a1), (uint_t)(a2), (uint_t)(a3), (uint_t)(a4))) 3417 #else /* DEBUG */ 3418 #define IDNXDC(d, mt, a1, a2, a3, a4) \ 3419 (idnxdc((int)(d), (mt), \ 3420 (uint_t)(a1), (uint_t)(a2), (uint_t)(a3), (uint_t)(a4))) 3421 #endif /* DEBUG */ 3422 #define IDNXDC_BROADCAST(ds, mt, a1, a2, a3, a4) \ 3423 (idnxdc_broadcast((domainset_t)(ds), (mt), \ 3424 (uint_t)(a1), (uint_t)(a2), (uint_t)(a3), (uint_t)(a4))) 3425 3426 /* 3427 * --------------------------------------------------------------------- 3428 */ 3429 #define SET_XARGS(x, a0, a1, a2, a3) \ 3430 ((x)[0] = (uint_t)(a0), (x)[1] = (uint_t)(a1), \ 3431 (x)[2] = (uint_t)(a2), (x)[3] = (uint_t)(a3)) 3432 3433 #define GET_XARGS(x, a0, a1, a2, a3) \ 3434 (((a0) ? *(uint_t *)(a0) = (x)[0] : 1), \ 3435 ((a1) ? *(uint_t *)(a1) = (x)[1] : 1), \ 3436 ((a2) ? *(uint_t *)(a2) = (x)[2] : 1), \ 3437 ((a3) ? *(uint_t *)(a3) = (x)[3] : 1)) 3438 3439 #define CLR_XARGS(x) \ 3440 ((x)[0] = (x)[1] = (x)[2] = (x)[3] = 0) 3441 3442 #define GET_XARGS_NEGO_TICKET(x) ((uint_t)(x)[0]) 3443 #define GET_XARGS_NEGO_DSET(x, d) \ 3444 ((d)[0] = (x)[1], (d)[1] = (x)[2], (d)[2] = (x)[3]) 3445 #define SET_XARGS_NEGO_TICKET(x, t) ((x)[0] = (uint_t)(t)) 3446 #define SET_XARGS_NEGO_DSET(x, d) \ 3447 ((x)[1] = (uint_t)(d)[0], \ 3448 (x)[2] = (uint_t)(d)[1], \ 3449 (x)[3] = (uint_t)(d)[2]) 3450 3451 #define GET_XARGS_CON_TYPE(x) ((idn_con_t)(x)[0]) 3452 #define GET_XARGS_CON_DOMSET(x) ((domainset_t)(x)[1]) 3453 #define SET_XARGS_CON_TYPE(x, t) ((x)[0] = (uint_t)(t)) 3454 #define SET_XARGS_CON_DOMSET(x, s) ((x)[1] = (uint_t)(s)) 3455 3456 #define GET_XARGS_FIN_TYPE(x) GET_FIN_TYPE((x)[0]) 3457 #define GET_XARGS_FIN_ARG(x) GET_FIN_ARG((x)[0]) 3458 #define GET_XARGS_FIN_DOMSET(x) ((domainset_t)(x)[1]) 3459 #define GET_XARGS_FIN_OPT(x) ((idn_finopt_t)(x)[2]) 3460 #define GET_XARGS_FIN_MASTER(x) ((uint_t)(x)[3]) 3461 #define SET_XARGS_FIN_TYPE(x, t) SET_FIN_TYPE((x)[0], (t)) 3462 #define SET_XARGS_FIN_ARG(x, a) SET_FIN_ARG((x)[0], (a)) 3463 #define SET_XARGS_FIN_DOMSET(x, s) ((x)[1] = (uint_t)(s)) 3464 #define SET_XARGS_FIN_OPT(x, o) ((x)[2] = (uint_t)(o)) 3465 #define SET_XARGS_FIN_MASTER(x, m) ((x)[3] = (uint_t)(m)) 3466 3467 #define GET_XARGS_NACK_TYPE(x) ((idn_nack_t)(x)[0]) 3468 #define GET_XARGS_NACK_ARG1(x) ((x)[1]) 3469 #define GET_XARGS_NACK_ARG2(x) ((x)[2]) 3470 #define SET_XARGS_NACK_TYPE(x, t) ((x)[0] = (uint_t)(t)) 3471 #define SET_XARGS_NACK_ARG1(x, a1) ((x)[1] = (uint_t)(a1)) 3472 #define SET_XARGS_NACK_ARG2(x, a2) ((x)[2] = (uint_t)(a2)) 3473 3474 #define GET_XARGS_CFG_PHASE(x) ((int)(x)[0]) 3475 #define SET_XARGS_CFG_PHASE(x, p) ((x)[0] = (uint_t)(p)) 3476 3477 /* 3478 * --------------------------------------------------------------------- 3479 */ 3480 /* 3481 * Device instance to SIP (IDN instance pointer). 3482 */ 3483 #ifdef DEBUG 3484 #define IDN_INST2SIP(i) \ 3485 (ASSERT(((i) >= 0) && ((i) < (IDN_MAXMAX_NETS << 1))), \ 3486 idn_i2s_table[i]) 3487 #else /* DEBUG */ 3488 #define IDN_INST2SIP(i) (idn_i2s_table[i]) 3489 #endif /* DEBUG */ 3490 3491 #define IDN_SET_INST2SIP(i, s) \ 3492 { \ 3493 ASSERT(((i) >= 0) && ((i) < (IDN_MAXMAX_NETS << 1))); \ 3494 idn_i2s_table[i] = (s); \ 3495 } 3496 3497 #define IDN_NETID2DOMID(n) (VALID_UDOMAINID(n) ? \ 3498 ((int)(n)) : IDN_NIL_DOMID) 3499 #define IDN_DOMID2NETID(d) ((ushort_t)(d)) 3500 3501 #ifdef DEBUG 3502 #define IDNDL_ETHER2DOMAIN(eap) \ 3503 (_idndl_ether2domain(eap)) 3504 #define IDNDL_ETHER2SIP(eap) \ 3505 (_idndl_ether2sip(eap)) 3506 #else 3507 /* 3508 * The following values can be returned from IDNDL_ETHER2DOMAIN: 3509 * IDN_NIL_DOMID 3510 * Ether address is broadcast (0xff) or domain doesn't exist. 3511 * domid Domain id with drwlock(reader) held. 3512 */ 3513 #define IDNDL_ETHER2DOMAIN(eap) \ 3514 (IDN_NETID2DOMID((eap)->ether_addr_octet[IDNETHER_NETID])) 3515 #define IDNDL_ETHER2SIP(eap) \ 3516 (((eap)->ether_addr_octet[IDNETHER_CHANNEL] == 0xff) ? NULL : \ 3517 IDN_INST2SIP((int)(eap)->ether_addr_octet[IDNETHER_CHANNEL])) 3518 #endif /* DEBUG */ 3519 3520 #define UPPER32_CPUMASK(s) _upper32cpumask(s) 3521 #define LOWER32_CPUMASK(s) _lower32cpumask(s) 3522 #define MAKE64_CPUMASK(s, u, l) _make64cpumask(&(s), (u), (l)) 3523 3524 #ifdef DEBUG 3525 extern caddr_t _idn_getstruct(char *structname, int size); 3526 extern void _idn_freestruct(caddr_t ptr, char *structname, int size); 3527 3528 #define GETSTRUCT(structure, num) \ 3529 ((structure *)_idn_getstruct("structure", sizeof (structure)*(num))) 3530 #define FREESTRUCT(ptr, structure, num) \ 3531 (_idn_freestruct((caddr_t)ptr, "structure", sizeof (structure)*(num))) 3532 #else /* DEBUG */ 3533 #define GETSTRUCT(structure, num) \ 3534 ((structure *)kmem_zalloc((uint_t)(sizeof (structure) * (num)), \ 3535 KM_SLEEP)) 3536 #define FREESTRUCT(ptr, structure, num) \ 3537 (kmem_free((caddr_t)(ptr), sizeof (structure) * (num))) 3538 #endif /* DEBUG */ 3539 3540 extern int idn_debug; 3541 extern idn_global_t idn; 3542 extern idn_domain_t idn_domain[]; 3543 extern struct idn *idn_i2s_table[]; 3544 extern int idn_history; 3545 extern struct idn_history idnhlog; 3546 3547 extern int idn_smr_size; 3548 extern int idn_nwr_size; 3549 extern int idn_protocol_nservers; 3550 extern int idn_awolmsg_interval; 3551 extern int idn_smr_bufsize; 3552 extern int idn_slab_bufcount; 3553 extern int idn_slab_prealloc; 3554 extern int idn_slab_mintotal; 3555 extern int idn_window_max; 3556 extern int idn_window_incr; 3557 extern int idn_reclaim_min; 3558 extern int idn_reclaim_max; 3559 extern int idn_mbox_per_net; 3560 extern int idn_max_nets; 3561 3562 extern int idn_netsvr_spin_count; 3563 extern int idn_netsvr_wait_min; 3564 extern int idn_netsvr_wait_max; 3565 extern int idn_netsvr_wait_shift; 3566 3567 extern int idn_checksum; 3568 3569 extern int idn_msgwait_nego; 3570 extern int idn_msgwait_cfg; 3571 extern int idn_msgwait_con; 3572 extern int idn_msgwait_fin; 3573 extern int idn_msgwait_cmd; 3574 extern int idn_msgwait_data; 3575 3576 extern int idn_retryfreq_nego; 3577 extern int idn_retryfreq_con; 3578 extern int idn_retryfreq_fin; 3579 3580 extern int idn_window_emax; /* calculated */ 3581 extern int idn_slab_maxperdomain; /* calculated */ 3582 3583 /* 3584 * --------------------------------------------------------------------- 3585 * io/idn.c 3586 * --------------------------------------------------------------------- 3587 */ 3588 extern int board_to_ready_cpu(int board, cpuset_t cpuset); 3589 extern int idn_open_domain(int domid, int cpuid, uint_t ticket); 3590 extern void idn_close_domain(int domid); 3591 extern void inum2str(uint_t inum, char str[]); 3592 extern idn_timer_t *idn_timer_alloc(); 3593 extern void idn_timer_free(idn_timer_t *tp); 3594 extern void idn_timerq_init(idn_timerq_t *tq); 3595 extern void idn_timerq_deinit(idn_timerq_t *tq); 3596 extern void idn_timerq_free(idn_timerq_t *tq); 3597 extern ushort_t idn_timer_start(idn_timerq_t *tq, idn_timer_t *tp, 3598 clock_t tval); 3599 extern int idn_timer_stopall(idn_timer_t *tp); 3600 extern void idn_timer_dequeue(idn_timerq_t *tq, idn_timer_t *tp); 3601 extern void idn_timer_stop(idn_timerq_t *tq, int subtype, ushort_t tcookie); 3602 extern idn_timer_t *idn_timer_get(idn_timerq_t *tq, int subtype, 3603 ushort_t tcookie); 3604 extern void idn_domain_resetentry(idn_domain_t *dp); 3605 extern void idn_strlinks_enable(uint_t netaddr, int domid); 3606 extern void idn_strlinks_disable(uint_t domset, uint_t netaddr, 3607 int disconnect); 3608 extern void idn_dopcache_init(); 3609 extern void idn_dopcache_deinit(); 3610 extern void *idn_init_op(idn_opflag_t opflag, boardset_t boardset, 3611 idnsb_error_t *sep); 3612 extern void idn_add_op(idn_opflag_t opflag, domainset_t domset); 3613 extern void idn_update_op(idn_opflag_t opflag, domainset_t domset, 3614 idnsb_error_t *sep); 3615 extern void idn_deinit_op(void *cookie); 3616 extern int idn_wait_op(void *cookie, boardset_t *domsetp, 3617 int wait_timeout); 3618 extern int idn_wakeup_op(boardset_t boardset, uint_t domset, 3619 idn_opflag_t opflag, int error); 3620 extern void idn_error_op(uint_t domset, boardset_t boardset, int error); 3621 extern void cpuset2str(cpuset_t cset, char buffer[]); 3622 extern void domainset2str(domainset_t dset, char buffer[]); 3623 extern void boardset2str(boardset_t bset, char buffer[]); 3624 extern void mask2str(uint_t mask, char buffer[], int maxnum); 3625 extern int idnxdc(int domid, idn_msgtype_t *mtp, 3626 uint_t arg1, uint_t arg2, 3627 uint_t arg3, uint_t arg4); 3628 extern void idnxdc_broadcast(domainset_t domset, idn_msgtype_t *mtp, 3629 uint_t arg1, uint_t arg2, 3630 uint_t arg3, uint_t arg4); 3631 extern void idn_awol_event_set(boardset_t boardset); 3632 extern void idn_awol_event_clear(boardset_t boardset); 3633 #ifdef DEBUG 3634 extern int debug_idnxdc(char *f, int domid, idn_msgtype_t *mtp, 3635 uint_t arg1, uint_t arg2, 3636 uint_t arg3, uint_t arg4); 3637 #endif /* DEBUG */ 3638 extern boardset_t cpuset2boardset(cpuset_t portset); 3639 extern uint_t _upper32cpumask(cpuset_t cset); 3640 extern uint_t _lower32cpumask(cpuset_t cset); 3641 extern void _make64cpumask(cpuset_t *csetp, uint_t upper, uint_t lower); 3642 3643 /* 3644 * --------------------------------------------------------------------- 3645 * io/idn_proto.c 3646 * --------------------------------------------------------------------- 3647 */ 3648 extern void idn_assign_cookie(int domid); 3649 extern int idn_rput_data(queue_t *q, mblk_t *mp, int isput); 3650 extern int idn_wput_data(queue_t *q, mblk_t *mp, int isput); 3651 extern int idn_send_data(int dst_domid, idn_netaddr_t dst_netaddr, 3652 queue_t *wq, mblk_t *mp); 3653 extern void idn_recv_signal(mblk_t *mp); 3654 extern int idn_link(int domid, int cpuid, int pri, int waittime, 3655 idnsb_error_t *sep); 3656 extern int idn_unlink(int domid, boardset_t idnset, idn_fin_t fintype, 3657 idn_finopt_t finopt, int waittime, 3658 idnsb_error_t *sep); 3659 extern int idnh_recv_dataack(int domid, int src_proc, 3660 uint_t acknack, idn_xdcargs_t xargs); 3661 extern int idnh_recv_other(int sourceid, int src_proc, int dst_proc, 3662 uint_t inum, uint_t acknack, 3663 idn_xdcargs_t xargs); 3664 extern void idn_send_cmd(int domid, idn_cmd_t cmdtype, 3665 uint_t arg1, uint_t arg2, uint_t arg3); 3666 extern void idn_send_cmdresp(int domid, idn_msgtype_t *mtp, 3667 idn_cmd_t cmdtype, uint_t arg1, 3668 uint_t arg2, uint_t cerrno); 3669 extern void idn_broadcast_cmd(idn_cmd_t cmdtype, 3670 uint_t arg1, uint_t arg2, uint_t arg3); 3671 extern int idn_reclaim_mboxdata(int domid, int channel, int nbufs); 3672 extern void idn_clear_awol(int domid); 3673 extern int idn_protocol_init(int nservers); 3674 extern void idn_protocol_deinit(); 3675 extern void idn_timer_expired(void *arg); 3676 extern int idn_open_channel(int channel); 3677 extern void idn_close_channel(int channel, idn_chanop_t chanop); 3678 extern idn_mainmbox_t *idn_mainmbox_init(int domid, int mbx); 3679 extern void idn_mainmbox_deinit(int domid, idn_mainmbox_t *mmp); 3680 extern void idn_signal_data_server(int domid, ushort_t channel); 3681 extern int idn_chanservers_init(); 3682 extern void idn_chanservers_deinit(); 3683 extern void idn_chanserver_bind(int net, int cpuid); 3684 extern int idn_retry_terminate(uint_t token); 3685 extern idn_protojob_t *idn_protojob_alloc(int kmflag); 3686 extern void idn_protojob_submit(int cookie, idn_protojob_t *jp); 3687 extern int idn_domain_is_registered(int domid, int channel, 3688 idn_chanset_t *chansetp); 3689 extern void idn_xmit_monitor_kickoff(int chan_wanted); 3690 extern void idn_sync_exit(int domid, idn_synccmd_t cmd); 3691 /* 3692 * --------------------------------------------------------------------- 3693 * io/idn_xf.c 3694 * --------------------------------------------------------------------- 3695 */ 3696 extern void idnxf_flushall_ecache(); 3697 extern int idnxf_shmem_add(int is_master, boardset_t boardset, 3698 pfn_t pfnbase, pfn_t pfnlimit, 3699 uint_t *mcadr); 3700 extern int idnxf_shmem_sub(int is_master, boardset_t boardset); 3701 extern int idn_cpu_per_board(void *p2o, cpuset_t cset, 3702 struct hwconfig *hwp); 3703 /* 3704 * --------------------------------------------------------------------- 3705 * io/idn_dlpi.c 3706 * --------------------------------------------------------------------- 3707 */ 3708 extern int idndl_init(struct idn *sip); 3709 extern void idndl_uninit(struct idn *sip); 3710 extern void idndl_statinit(struct idn *sip); 3711 extern void idndl_dodetach(struct idnstr *); 3712 extern int idnioc_dlpi(queue_t *wq, mblk_t *mp, int *argsize); 3713 extern void idndl_localetheraddr(struct idn *sip, struct ether_addr *eap); 3714 extern int idndl_domain_etheraddr(int domid, int instance, 3715 struct ether_addr *eap); 3716 extern void idndl_dlpi_init(); 3717 extern int idndl_start(queue_t *wq, mblk_t *mp, struct idn *sip); 3718 extern void idndl_read(struct idn *sip, mblk_t *mp); 3719 extern void idndl_proto(queue_t *wq, mblk_t *mp); 3720 extern void idndl_sendup(struct idn *, mblk_t *, struct idnstr *(*)()); 3721 extern struct idnstr *idndl_accept(struct idnstr *, struct idn *, int, 3722 struct ether_addr *); 3723 extern struct idnstr *idndl_paccept(struct idnstr *, struct idn *, int, 3724 struct ether_addr *); 3725 extern void idndl_wenable(struct idn *); 3726 /* 3727 * --------------------------------------------------------------------- 3728 * io/idn_smr.c 3729 * --------------------------------------------------------------------- 3730 */ 3731 extern void smr_slabwaiter_open(domainset_t domset); 3732 extern void smr_slabwaiter_close(domainset_t domset); 3733 /* 3734 * --------------------------------------------------------------------- 3735 */ 3736 extern void idn_smrsize_init(); 3737 extern void idn_init_autolink(); 3738 extern void idn_deinit_autolink(); 3739 3740 extern void idn_dmv_handler(void *arg); 3741 extern void idnxf_init_mondo(uint64_t dmv_word0, 3742 uint64_t dmv_word1, uint64_t dmv_word2); 3743 extern int idnxf_send_mondo(int upaid); 3744 3745 extern clock_t idn_msg_waittime[]; 3746 extern clock_t idn_msg_retrytime[]; 3747 3748 #endif /* !_ASM */ 3749 #endif /* _KERNEL */ 3750 3751 #ifndef _ASM 3752 /* 3753 * --------------------------------------------------------------------- 3754 */ 3755 #define IDN_NIL_DOMID -1 3756 #define IDN_NIL_DCPU -1 3757 3758 /* 3759 * --------------------------------------------------------------------- 3760 */ 3761 3762 /* 3763 * IOCTL Interface 3764 * 3765 * Commands must stay in the range (1 - 4096) since only 12 bits 3766 * are allotted. 3767 */ 3768 #define _IDN(n) (('I' << 20) | ('D' << 12) | (n)) 3769 #define IDNIOC_LINK _IDN(1) /* domain_link */ 3770 #define IDNIOC_UNLINK _IDN(2) /* domain_unlink */ 3771 #define IDNIOC_unused0 _IDN(3) 3772 #define IDNIOC_unused1 _IDN(4) 3773 #define IDNIOC_unused2 _IDN(5) 3774 #define IDNIOC_unused3 _IDN(6) 3775 #define IDNIOC_unused4 _IDN(7) 3776 #define IDNIOC_DLPI_ON _IDN(8) /* Turn ON DLPI on str */ 3777 #define IDNIOC_DLPI_OFF _IDN(9) /* Turn OFF DLPI on str */ 3778 #define IDNIOC_PING _IDN(10) /* For latency testing */ 3779 #define IDNIOC_PING_INIT _IDN(11) 3780 #define IDNIOC_PING_DEINIT _IDN(12) 3781 #define IDNIOC_MEM_RW _IDN(13) /* Random R/W of SMR */ 3782 3783 3784 #define VALID_NDOP(op) (((op) == ND_SET) || ((op) == ND_GET)) 3785 3786 #define VALID_DLPIOP(op) (((op) == DLIOCRAW) || \ 3787 ((op) == DL_IOC_HDR_INFO)) 3788 3789 #define VALID_IDNOP(op) (((op) >= _IDN(1)) && ((op) <= _IDN(13))) 3790 3791 #define VALID_IDNIOCTL(op) (VALID_IDNOP(op) || \ 3792 VALID_NDOP(op) || \ 3793 VALID_DLPIOP(op)) 3794 3795 typedef union idnop { 3796 struct { 3797 int domid; /* input */ 3798 int cpuid; /* input */ 3799 int master; /* input */ 3800 int wait; /* input */ 3801 } link; 3802 struct { 3803 int domid; /* input */ 3804 int cpuid; /* input */ 3805 int force; /* input */ 3806 int wait; /* input */ 3807 } unlink; 3808 struct { 3809 int domid; /* input */ 3810 int cpuid; /* input */ 3811 } ping; 3812 struct { 3813 uint_t lo_off; /* input */ 3814 uint_t hi_off; /* input */ 3815 int blksize; /* input */ 3816 int num; /* input */ 3817 int rw; /* input */ 3818 int goawol; /* input */ 3819 } rwmem; 3820 } idnop_t; 3821 3822 #ifdef _KERNEL 3823 /* 3824 * ndd support for IDN tunables. 3825 */ 3826 typedef struct idnparam { 3827 ulong_t sp_min; 3828 ulong_t sp_max; 3829 ulong_t sp_val; 3830 char *sp_name; 3831 } idnparam_t; 3832 3833 extern idnparam_t idn_param_arr[]; 3834 3835 #define idn_modunloadable idn_param_arr[0].sp_val 3836 #ifdef IDN_PERF 3837 #define _LP 0 3838 #define _xxx_tbd idn_param_arr[_LP+1].sp_val 3839 #endif /* IDN_PERF */ 3840 3841 /* 3842 * ===================================================================== 3843 */ 3844 3845 /* 3846 * Some junk to pretty print board lists and cpu lists in 3847 * log/console messages. Length is big enough to display 64 double 3848 * digit cpus separated by a command and single space. (Board list 3849 * is similar, but only 16 entries possible. 3850 */ 3851 #define _DSTRLEN 400 3852 #define ALLOC_DISPSTRING() ((char *)kmem_alloc(_DSTRLEN, KM_NOSLEEP)) 3853 #define FREE_DISPSTRING(b) (kmem_free((void *)(b), _DSTRLEN)) 3854 3855 /* 3856 * These are declared in idn.c. 3857 */ 3858 extern const char *idnds_str[]; 3859 extern const char *idnxs_str[]; 3860 extern const char *idngs_str[]; 3861 extern const char *idncmd_str[]; 3862 extern const char *idncon_str[]; 3863 extern const char *idnfin_str[]; 3864 extern const char *idnfinarg_str[]; 3865 extern const char *idnfinopt_str[]; 3866 extern const char *idnreg_str[]; 3867 extern const char *idnnack_str[]; 3868 extern const char *idnop_str[]; 3869 extern const char *idnsync_str[]; 3870 extern const char *chanop_str[]; 3871 extern const char *chanaction_str[]; 3872 extern const char *inum_str[]; 3873 extern const int inum_bump; 3874 extern const int inum_max; 3875 extern const int acknack_shift; 3876 3877 extern const char *timer_str[]; 3878 extern const char *res_str[]; 3879 3880 #endif /* _KERNEL */ 3881 #endif /* !_ASM */ 3882 3883 #ifdef __cplusplus 3884 } 3885 #endif 3886 3887 #endif /* _SYS_IDN_H */ 3888