1 /* 2 * CDDL HEADER START 3 * 4 * The contents of this file are subject to the terms of the 5 * Common Development and Distribution License (the "License"). 6 * You may not use this file except in compliance with the License. 7 * 8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 9 * or http://www.opensolaris.org/os/licensing. 10 * See the License for the specific language governing permissions 11 * and limitations under the License. 12 * 13 * When distributing Covered Code, include this CDDL HEADER in each 14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 15 * If applicable, add the following below this CDDL HEADER, with the 16 * fields enclosed by brackets "[]" replaced with your own identifying 17 * information: Portions Copyright [yyyy] [name of copyright owner] 18 * 19 * CDDL HEADER END 20 */ 21 /* 22 * Copyright 2007 Sun Microsystems, Inc. All rights reserved. 23 * Use is subject to license terms. 24 */ 25 26 #pragma ident "%Z%%M% %I% %E% SMI" 27 28 /* 29 * PCI nexus HotPlug devctl interface 30 */ 31 #include <sys/types.h> 32 #include <sys/conf.h> 33 #include <sys/kmem.h> 34 #include <sys/async.h> 35 #include <sys/sysmacros.h> 36 #include <sys/sunddi.h> 37 #include <sys/sunndi.h> 38 #include <sys/ddi_impldefs.h> 39 #include <sys/pci/pci_obj.h> 40 #include <sys/pci_tools.h> 41 #include <sys/pci/pci_tools_ext.h> 42 #include <sys/open.h> 43 #include <sys/errno.h> 44 #include <sys/file.h> 45 #include <sys/policy.h> 46 #include <sys/hotplug/pci/pcihp.h> 47 48 /*LINTLIBRARY*/ 49 50 static int pci_open(dev_t *devp, int flags, int otyp, cred_t *credp); 51 static int pci_close(dev_t dev, int flags, int otyp, cred_t *credp); 52 static int pci_devctl_ioctl(dev_info_t *dip, int cmd, intptr_t arg, int mode, 53 cred_t *credp, int *rvalp); 54 static int pci_ioctl(dev_t dev, int cmd, intptr_t arg, int mode, 55 cred_t *credp, int *rvalp); 56 static int pci_prop_op(dev_t dev, dev_info_t *dip, ddi_prop_op_t prop_op, 57 int flags, char *name, caddr_t valuep, int *lengthp); 58 59 struct cb_ops pci_cb_ops = { 60 pci_open, /* open */ 61 pci_close, /* close */ 62 nodev, /* strategy */ 63 nodev, /* print */ 64 nodev, /* dump */ 65 nodev, /* read */ 66 nodev, /* write */ 67 pci_ioctl, /* ioctl */ 68 nodev, /* devmap */ 69 nodev, /* mmap */ 70 nodev, /* segmap */ 71 nochpoll, /* poll */ 72 pci_prop_op, /* cb_prop_op */ 73 NULL, /* streamtab */ 74 D_NEW | D_MP | D_HOTPLUG, /* Driver compatibility flag */ 75 CB_REV, /* rev */ 76 nodev, /* int (*cb_aread)() */ 77 nodev /* int (*cb_awrite)() */ 78 }; 79 80 extern struct cb_ops *pcihp_ops; 81 82 /* ARGSUSED3 */ 83 static int 84 pci_open(dev_t *devp, int flags, int otyp, cred_t *credp) 85 { 86 pci_t *pci_p; 87 int rval; 88 uint_t orig_pci_soft_state; 89 90 /* 91 * Make sure the open is for the right file type. 92 */ 93 if (otyp != OTYP_CHR) 94 return (EINVAL); 95 96 /* 97 * Get the soft state structure for the device. 98 */ 99 pci_p = DEV_TO_SOFTSTATE(*devp); 100 if (pci_p == NULL) 101 return (ENXIO); 102 103 /* 104 * Handle the open by tracking the device state. 105 */ 106 DEBUG2(DBG_OPEN, pci_p->pci_dip, "devp=%x: flags=%x\n", devp, flags); 107 mutex_enter(&pci_p->pci_mutex); 108 orig_pci_soft_state = pci_p->pci_soft_state; 109 if (flags & FEXCL) { 110 if (pci_p->pci_soft_state != PCI_SOFT_STATE_CLOSED) { 111 mutex_exit(&pci_p->pci_mutex); 112 DEBUG0(DBG_OPEN, pci_p->pci_dip, "busy\n"); 113 return (EBUSY); 114 } 115 pci_p->pci_soft_state = PCI_SOFT_STATE_OPEN_EXCL; 116 } else { 117 if (pci_p->pci_soft_state == PCI_SOFT_STATE_OPEN_EXCL) { 118 mutex_exit(&pci_p->pci_mutex); 119 DEBUG0(DBG_OPEN, pci_p->pci_dip, "busy\n"); 120 return (EBUSY); 121 } 122 pci_p->pci_soft_state = PCI_SOFT_STATE_OPEN; 123 } 124 125 if (pci_p->hotplug_capable == B_TRUE) { 126 if (rval = pcihp_ops->cb_open(devp, flags, otyp, credp)) { 127 pci_p->pci_soft_state = orig_pci_soft_state; 128 mutex_exit(&pci_p->pci_mutex); 129 return (rval); 130 } 131 } 132 133 pci_p->pci_open_count++; 134 mutex_exit(&pci_p->pci_mutex); 135 136 return (0); 137 } 138 139 140 /* ARGSUSED */ 141 static int 142 pci_close(dev_t dev, int flags, int otyp, cred_t *credp) 143 { 144 pci_t *pci_p; 145 int rval; 146 147 if (otyp != OTYP_CHR) 148 return (EINVAL); 149 150 pci_p = DEV_TO_SOFTSTATE(dev); 151 if (pci_p == NULL) 152 return (ENXIO); 153 154 DEBUG2(DBG_CLOSE, pci_p->pci_dip, "dev=%x: flags=%x\n", dev, flags); 155 mutex_enter(&pci_p->pci_mutex); 156 157 if (pci_p->hotplug_capable == B_TRUE) 158 if (rval = pcihp_ops->cb_close(dev, flags, otyp, credp)) { 159 mutex_exit(&pci_p->pci_mutex); 160 return (rval); 161 } 162 163 pci_p->pci_soft_state = PCI_SOFT_STATE_CLOSED; 164 pci_p->pci_open_count = 0; 165 mutex_exit(&pci_p->pci_mutex); 166 return (0); 167 } 168 169 /* ARGSUSED */ 170 static int 171 pci_devctl_ioctl(dev_info_t *dip, int cmd, intptr_t arg, int mode, 172 cred_t *credp, int *rvalp) 173 { 174 int rv = 0; 175 struct devctl_iocdata *dcp; 176 uint_t bus_state; 177 178 /* 179 * We can use the generic implementation for these ioctls 180 */ 181 switch (cmd) { 182 case DEVCTL_DEVICE_GETSTATE: 183 case DEVCTL_DEVICE_ONLINE: 184 case DEVCTL_DEVICE_OFFLINE: 185 case DEVCTL_BUS_GETSTATE: 186 return (ndi_devctl_ioctl(dip, cmd, arg, mode, 0)); 187 } 188 189 /* 190 * read devctl ioctl data 191 */ 192 if (ndi_dc_allochdl((void *)arg, &dcp) != NDI_SUCCESS) 193 return (EFAULT); 194 195 switch (cmd) { 196 197 case DEVCTL_DEVICE_RESET: 198 DEBUG0(DBG_IOCTL, dip, "DEVCTL_DEVICE_RESET\n"); 199 rv = ENOTSUP; 200 break; 201 202 203 case DEVCTL_BUS_QUIESCE: 204 DEBUG0(DBG_IOCTL, dip, "DEVCTL_BUS_QUIESCE\n"); 205 if (ndi_get_bus_state(dip, &bus_state) == NDI_SUCCESS) 206 if (bus_state == BUS_QUIESCED) 207 break; 208 (void) ndi_set_bus_state(dip, BUS_QUIESCED); 209 break; 210 211 case DEVCTL_BUS_UNQUIESCE: 212 DEBUG0(DBG_IOCTL, dip, "DEVCTL_BUS_UNQUIESCE\n"); 213 if (ndi_get_bus_state(dip, &bus_state) == NDI_SUCCESS) 214 if (bus_state == BUS_ACTIVE) 215 break; 216 (void) ndi_set_bus_state(dip, BUS_ACTIVE); 217 break; 218 219 case DEVCTL_BUS_RESET: 220 DEBUG0(DBG_IOCTL, dip, "DEVCTL_BUS_RESET\n"); 221 rv = ENOTSUP; 222 break; 223 224 case DEVCTL_BUS_RESETALL: 225 DEBUG0(DBG_IOCTL, dip, "DEVCTL_BUS_RESETALL\n"); 226 rv = ENOTSUP; 227 break; 228 229 default: 230 rv = ENOTTY; 231 } 232 233 ndi_dc_freehdl(dcp); 234 return (rv); 235 } 236 237 238 static int 239 pci_ioctl(dev_t dev, int cmd, intptr_t arg, int mode, cred_t *credp, int *rvalp) 240 { 241 pci_t *pci_p; 242 dev_info_t *dip; 243 minor_t minor = getminor(dev); 244 int rv = ENOTTY; 245 246 pci_p = DEV_TO_SOFTSTATE(dev); 247 if (pci_p == NULL) 248 return (ENXIO); 249 250 dip = pci_p->pci_dip; 251 DEBUG2(DBG_IOCTL, dip, "dev=%x: cmd=%x\n", dev, cmd); 252 253 #ifdef PCI_DMA_TEST 254 if (IS_DMATEST(cmd)) { 255 *rvalp = pci_dma_test(cmd, dip, pci_p, arg); 256 return (0); 257 } 258 #endif 259 260 switch (PCIHP_AP_MINOR_NUM_TO_PCI_DEVNUM(minor)) { 261 case PCI_TOOL_REG_MINOR_NUM: 262 263 switch (cmd) { 264 case PCITOOL_DEVICE_SET_REG: 265 case PCITOOL_DEVICE_GET_REG: 266 267 /* Require full privileges. */ 268 if (secpolicy_kmdb(credp)) 269 rv = EPERM; 270 else 271 rv = pcitool_dev_reg_ops( 272 dev, (void *)arg, cmd, mode); 273 break; 274 275 case PCITOOL_NEXUS_SET_REG: 276 case PCITOOL_NEXUS_GET_REG: 277 278 /* Require full privileges. */ 279 if (secpolicy_kmdb(credp)) 280 rv = EPERM; 281 else 282 rv = pcitool_bus_reg_ops( 283 dev, (void *)arg, cmd, mode); 284 break; 285 } 286 287 break; 288 289 case PCI_TOOL_INTR_MINOR_NUM: 290 291 switch (cmd) { 292 case PCITOOL_DEVICE_SET_INTR: 293 294 /* Require PRIV_SYS_RES_CONFIG, same as psradm */ 295 if (secpolicy_ponline(credp)) { 296 rv = EPERM; 297 break; 298 } 299 300 /*FALLTHRU*/ 301 /* These require no special privileges. */ 302 case PCITOOL_DEVICE_GET_INTR: 303 case PCITOOL_SYSTEM_INTR_INFO: 304 rv = pcitool_intr_admn(dev, (void *)arg, cmd, mode); 305 break; 306 } 307 308 break; 309 310 /* 311 * All non-PCItool ioctls go through here, including: 312 * devctl ioctls with minor number PCIHP_DEVCTL_MINOR and 313 * those for attachment points with where minor number is the 314 * device number. 315 */ 316 default: 317 if (pci_p->hotplug_capable == B_TRUE) 318 rv = pcihp_ops->cb_ioctl( 319 dev, cmd, arg, mode, credp, rvalp); 320 else 321 rv = pci_devctl_ioctl( 322 dip, cmd, arg, mode, credp, rvalp); 323 break; 324 } 325 326 return (rv); 327 } 328 329 static int pci_prop_op(dev_t dev, dev_info_t *dip, ddi_prop_op_t prop_op, 330 int flags, char *name, caddr_t valuep, int *lengthp) 331 { 332 if (ddi_prop_exists(DDI_DEV_T_ANY, dip, DDI_PROP_DONTPASS, 333 "hotplug-capable")) 334 return ((pcihp_get_cb_ops())->cb_prop_op(dev, dip, 335 prop_op, flags, name, valuep, lengthp)); 336 337 return (ddi_prop_op(dev, dip, prop_op, flags, name, valuep, lengthp)); 338 } 339