xref: /titanic_41/usr/src/uts/sun4/io/px/px_msiq.c (revision bf56214c0556fa6864189c826d39dbe156bb22a0)
1 /*
2  * CDDL HEADER START
3  *
4  * The contents of this file are subject to the terms of the
5  * Common Development and Distribution License (the "License").
6  * You may not use this file except in compliance with the License.
7  *
8  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9  * or http://www.opensolaris.org/os/licensing.
10  * See the License for the specific language governing permissions
11  * and limitations under the License.
12  *
13  * When distributing Covered Code, include this CDDL HEADER in each
14  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15  * If applicable, add the following below this CDDL HEADER, with the
16  * fields enclosed by brackets "[]" replaced with your own identifying
17  * information: Portions Copyright [yyyy] [name of copyright owner]
18  *
19  * CDDL HEADER END
20  */
21 /*
22  * Copyright 2007 Sun Microsystems, Inc.  All rights reserved.
23  * Use is subject to license terms.
24  */
25 
26 #pragma ident	"%Z%%M%	%I%	%E% SMI"
27 
28 /*
29  * px_msiq.c
30  */
31 
32 #include <sys/types.h>
33 #include <sys/kmem.h>
34 #include <sys/conf.h>
35 #include <sys/ddi.h>
36 #include <sys/sunddi.h>
37 #include <sys/modctl.h>
38 #include <sys/disp.h>
39 #include <sys/stat.h>
40 #include <sys/ddi_impldefs.h>
41 #include "px_obj.h"
42 
43 static void px_msiq_get_props(px_t *px_p);
44 
45 /*
46  * px_msiq_attach()
47  */
48 int
49 px_msiq_attach(px_t *px_p)
50 {
51 	px_msiq_state_t	*msiq_state_p = &px_p->px_ib_p->ib_msiq_state;
52 	size_t		msiq_size;
53 	int		i, ret = DDI_SUCCESS;
54 
55 	DBG(DBG_MSIQ, px_p->px_dip, "px_msiq_attach\n");
56 
57 	/*
58 	 * Check for all MSIQ related properties and
59 	 * save all information.
60 	 *
61 	 * Avaialble MSIQs and its properties.
62 	 */
63 	px_msiq_get_props(px_p);
64 
65 	/*
66 	 * 10% of available MSIQs are reserved for the PCIe messages.
67 	 * Around 90% of available MSIQs are reserved for the MSI/Xs.
68 	 */
69 	msiq_state_p->msiq_msg_qcnt = howmany(msiq_state_p->msiq_cnt, 10);
70 	msiq_state_p->msiq_msi_qcnt = msiq_state_p->msiq_cnt -
71 	    msiq_state_p->msiq_msg_qcnt;
72 
73 	msiq_state_p->msiq_1st_msi_qid = msiq_state_p->msiq_1st_msiq_id;
74 	msiq_state_p->msiq_next_msi_qid = msiq_state_p->msiq_1st_msi_qid;
75 
76 	msiq_state_p->msiq_1st_msg_qid = msiq_state_p->msiq_1st_msiq_id +
77 	    msiq_state_p->msiq_msi_qcnt;
78 	msiq_state_p->msiq_next_msg_qid = msiq_state_p->msiq_1st_msg_qid;
79 
80 	mutex_init(&msiq_state_p->msiq_mutex, NULL, MUTEX_DRIVER, NULL);
81 	msiq_state_p->msiq_p = kmem_zalloc(msiq_state_p->msiq_cnt *
82 	    sizeof (px_msiq_t), KM_SLEEP);
83 	msiq_size = msiq_state_p->msiq_rec_cnt * sizeof (msiq_rec_t);
84 	msiq_state_p->msiq_buf_p = kmem_zalloc(msiq_state_p->msiq_cnt *
85 	    msiq_size, KM_SLEEP);
86 
87 	for (i = 0; i < msiq_state_p->msiq_cnt; i++) {
88 		msiq_state_p->msiq_p[i].msiq_id =
89 		    msiq_state_p->msiq_1st_msiq_id + i;
90 		msiq_state_p->msiq_p[i].msiq_refcnt = 0;
91 		msiq_state_p->msiq_p[i].msiq_state = MSIQ_STATE_FREE;
92 
93 		msiq_state_p->msiq_p[i].msiq_base_p = (msiqhead_t *)
94 		    ((caddr_t)msiq_state_p->msiq_buf_p + (i * msiq_size));
95 	}
96 
97 	if ((ret = px_lib_msiq_init(px_p->px_dip)) != DDI_SUCCESS)
98 		px_msiq_detach(px_p);
99 
100 	return (ret);
101 }
102 
103 /*
104  * px_msiq_detach()
105  */
106 void
107 px_msiq_detach(px_t *px_p)
108 {
109 	px_msiq_state_t	*msiq_state_p = &px_p->px_ib_p->ib_msiq_state;
110 
111 	DBG(DBG_MSIQ, px_p->px_dip, "px_msiq_detach\n");
112 
113 	(void) px_lib_msiq_fini(px_p->px_dip);
114 	kmem_free(msiq_state_p->msiq_buf_p, msiq_state_p->msiq_cnt *
115 	    msiq_state_p->msiq_rec_cnt * sizeof (msiq_rec_t));
116 
117 	mutex_destroy(&msiq_state_p->msiq_mutex);
118 	kmem_free(msiq_state_p->msiq_p,
119 	    msiq_state_p->msiq_cnt * sizeof (px_msiq_t));
120 
121 	bzero(&px_p->px_ib_p->ib_msiq_state, sizeof (px_msiq_state_t));
122 }
123 
124 /*
125  * px_msiq_detach()
126  */
127 void
128 px_msiq_resume(px_t *px_p)
129 {
130 	px_msiq_state_t	*msiq_state_p = &px_p->px_ib_p->ib_msiq_state;
131 	int		i;
132 
133 	for (i = 0; i < msiq_state_p->msiq_cnt; i++) {
134 		(void) px_lib_msiq_gethead(px_p->px_dip, i,
135 		    &msiq_state_p->msiq_p[i].msiq_curr_head_index);
136 		msiq_state_p->msiq_p[i].msiq_new_head_index = 0;
137 		msiq_state_p->msiq_p[i].msiq_recs2process = 0;
138 	}
139 }
140 
141 /*
142  * px_msiq_alloc()
143  */
144 int
145 px_msiq_alloc(px_t *px_p, msiq_rec_type_t rec_type, msiqid_t *msiq_id_p)
146 {
147 	px_msiq_state_t	*msiq_state_p = &px_p->px_ib_p->ib_msiq_state;
148 	msiqid_t	first_msiq_id, *next_msiq_index;
149 	uint_t		msiq_cnt;
150 	int		i;
151 
152 	DBG(DBG_MSIQ, px_p->px_dip, "px_msiq_alloc\n");
153 
154 	mutex_enter(&msiq_state_p->msiq_mutex);
155 
156 	if (rec_type == MSG_REC) {
157 		msiq_cnt = msiq_state_p->msiq_msg_qcnt;
158 		first_msiq_id = msiq_state_p->msiq_1st_msg_qid;
159 		next_msiq_index = &msiq_state_p->msiq_next_msg_qid;
160 	} else {
161 		msiq_cnt = msiq_state_p->msiq_msi_qcnt;
162 		first_msiq_id = msiq_state_p->msiq_1st_msi_qid;
163 		next_msiq_index = &msiq_state_p->msiq_next_msi_qid;
164 	}
165 
166 	/* Allocate MSIQs */
167 	for (i = first_msiq_id; i < (first_msiq_id + msiq_cnt); i++) {
168 		if (msiq_state_p->msiq_p[i].msiq_state == MSIQ_STATE_FREE) {
169 			msiq_state_p->msiq_p[i].msiq_state = MSIQ_STATE_INUSE;
170 			msiq_state_p->msiq_p[i].msiq_refcnt = 1;
171 			(void) px_lib_msiq_gethead(px_p->px_dip, i,
172 			    &msiq_state_p->msiq_p[i].msiq_curr_head_index);
173 			break;
174 		}
175 	}
176 
177 	/*
178 	 * There are no free MSIQ.
179 	 * Use next available MSIQ.
180 	 */
181 	if (i >= (first_msiq_id + msiq_cnt)) {
182 		i = *next_msiq_index;
183 		msiq_state_p->msiq_p[i].msiq_refcnt++;
184 	}
185 
186 	*msiq_id_p = msiq_state_p->msiq_p[i].msiq_id;
187 	DBG(DBG_MSIQ, px_p->px_dip,
188 	    "px_msiq_alloc: msiq_id 0x%x\n", *msiq_id_p);
189 
190 	(*next_msiq_index)++;
191 
192 	if (*next_msiq_index >= (first_msiq_id + msiq_cnt))
193 		*next_msiq_index = first_msiq_id;
194 
195 	mutex_exit(&msiq_state_p->msiq_mutex);
196 	return (DDI_SUCCESS);
197 }
198 
199 /*
200  * px_msiq_free()
201  */
202 int
203 px_msiq_free(px_t *px_p, msiqid_t msiq_id)
204 {
205 	px_msiq_state_t	*msiq_state_p = &px_p->px_ib_p->ib_msiq_state;
206 
207 	DBG(DBG_MSIQ, px_p->px_dip, "px_msiq_free: msiq_id 0x%x", msiq_id);
208 
209 	mutex_enter(&msiq_state_p->msiq_mutex);
210 
211 	if ((msiq_id < msiq_state_p->msiq_1st_msiq_id) || (msiq_id >=
212 	    (msiq_state_p->msiq_1st_msiq_id + msiq_state_p->msiq_cnt))) {
213 		DBG(DBG_MSIQ, px_p->px_dip,
214 		    "px_msiq_free: Invalid msiq_id 0x%x", msiq_id);
215 		return (DDI_FAILURE);
216 	}
217 
218 	if (--msiq_state_p->msiq_p[msiq_id].msiq_refcnt == 0)
219 		msiq_state_p->msiq_p[msiq_id].msiq_state = MSIQ_STATE_FREE;
220 
221 	mutex_exit(&msiq_state_p->msiq_mutex);
222 	return (DDI_SUCCESS);
223 }
224 
225 /*
226  * px_msiqid_to_devino()
227  */
228 devino_t
229 px_msiqid_to_devino(px_t *px_p, msiqid_t msiq_id)
230 {
231 	px_msiq_state_t	*msiq_state_p = &px_p->px_ib_p->ib_msiq_state;
232 	devino_t	devino;
233 
234 	devino = msiq_state_p->msiq_1st_devino +
235 	    msiq_id - msiq_state_p->msiq_1st_msiq_id;
236 
237 	DBG(DBG_MSIQ, px_p->px_dip, "px_msiqid_to_devino: "
238 	    "msiq_id 0x%x devino 0x%x\n", msiq_id, devino);
239 
240 	return (devino);
241 }
242 
243 /*
244  * px_devino_to_msiqid()
245  */
246 msiqid_t
247 px_devino_to_msiqid(px_t *px_p, devino_t devino)
248 {
249 	px_msiq_state_t	*msiq_state_p = &px_p->px_ib_p->ib_msiq_state;
250 	msiqid_t	msiq_id;
251 
252 	msiq_id = msiq_state_p->msiq_1st_msiq_id +
253 	    devino - msiq_state_p->msiq_1st_devino;
254 
255 	DBG(DBG_MSIQ, px_p->px_dip, "px_devino_to_msiq: "
256 	    "devino 0x%x msiq_id 0x%x\n", devino, msiq_id);
257 
258 	return (msiq_id);
259 }
260 
261 /*
262  * px_msiq_get_props()
263  */
264 static void
265 px_msiq_get_props(px_t *px_p)
266 {
267 	px_msiq_state_t *msiq_state_p = &px_p->px_ib_p->ib_msiq_state;
268 	int	ret = DDI_SUCCESS;
269 	int	length = sizeof (int);
270 	char	*valuep = NULL;
271 
272 	DBG(DBG_MSIQ, px_p->px_dip, "px_msiq_get_props\n");
273 
274 	/* #msi-eqs */
275 	msiq_state_p->msiq_cnt = ddi_getprop(DDI_DEV_T_ANY, px_p->px_dip,
276 	    DDI_PROP_DONTPASS, "#msi-eqs", PX_DEFAULT_MSIQ_CNT);
277 
278 	DBG(DBG_MSIQ, px_p->px_dip, "obp: msiq_cnt=%d\n",
279 	    msiq_state_p->msiq_cnt);
280 
281 	/* msi-eq-size */
282 	msiq_state_p->msiq_rec_cnt = ddi_getprop(DDI_DEV_T_ANY, px_p->px_dip,
283 	    DDI_PROP_DONTPASS, "msi-eq-size", PX_DEFAULT_MSIQ_REC_CNT);
284 
285 	DBG(DBG_MSIQ, px_p->px_dip, "obp: msiq_rec_cnt=%d\n",
286 	    msiq_state_p->msiq_rec_cnt);
287 
288 	/* msi-eq-to-devino: msi-eq#, devino# fields */
289 	ret = ddi_prop_op(DDI_DEV_T_ANY, px_p->px_dip, PROP_LEN_AND_VAL_ALLOC,
290 	    DDI_PROP_DONTPASS, "msi-eq-to-devino", (caddr_t)&valuep,
291 	    &length);
292 
293 	if (ret == DDI_PROP_SUCCESS) {
294 		msiq_state_p->msiq_1st_msiq_id =
295 		    ((px_msi_eq_to_devino_t *)valuep)->msi_eq_no;
296 		msiq_state_p->msiq_1st_devino =
297 		    ((px_msi_eq_to_devino_t *)valuep)->devino_no;
298 		kmem_free(valuep, (size_t)length);
299 	} else {
300 		msiq_state_p->msiq_1st_msiq_id = PX_DEFAULT_MSIQ_1ST_MSIQ_ID;
301 		msiq_state_p->msiq_1st_devino = PX_DEFAULT_MSIQ_1ST_DEVINO;
302 	}
303 
304 	DBG(DBG_MSIQ, px_p->px_dip, "obp: msiq_1st_msiq_id=%d\n",
305 	    msiq_state_p->msiq_1st_msiq_id);
306 
307 	DBG(DBG_MSIQ, px_p->px_dip, "obp: msiq_1st_devino=%d\n",
308 	    msiq_state_p->msiq_1st_devino);
309 }
310