xref: /titanic_41/usr/src/uts/sun4/io/px/px_fm.h (revision 721df37ded2cce623b0249cc35a872c3ce291b9b)
1 /*
2  * CDDL HEADER START
3  *
4  * The contents of this file are subject to the terms of the
5  * Common Development and Distribution License (the "License").
6  * You may not use this file except in compliance with the License.
7  *
8  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9  * or http://www.opensolaris.org/os/licensing.
10  * See the License for the specific language governing permissions
11  * and limitations under the License.
12  *
13  * When distributing Covered Code, include this CDDL HEADER in each
14  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15  * If applicable, add the following below this CDDL HEADER, with the
16  * fields enclosed by brackets "[]" replaced with your own identifying
17  * information: Portions Copyright [yyyy] [name of copyright owner]
18  *
19  * CDDL HEADER END
20  */
21 /*
22  * Copyright (c) 2005, 2010, Oracle and/or its affiliates. All rights reserved.
23  */
24 
25 #ifndef _SYS_PX_FM_H
26 #define	_SYS_PX_FM_H
27 
28 #ifdef	__cplusplus
29 extern "C" {
30 #endif
31 
32 #define	PX_ERR_PIL	14
33 #define	PX_ERR_LOW_PIL  9
34 
35 /*
36  * Error handlers maybe called due to trap or interrupts
37  * occured.
38  */
39 #define	PX_TRAP_CALL	0
40 #define	PX_INTR_CALL	1
41 #define	PX_LIB_CALL	2
42 
43 /*
44  * Definition of Fire internal error severity -
45  * HW Reset     Errors that cause hardware to automatically reset. Software is
46  *              being reset along, sticky status bits need to be cleaned up upon
47  *              system initialization.
48  * Panic        Errors that definitely result in panic'ing the system.
49  * Expected     Expected error, do not panic, plus do not send ereport.
50  * Protected    Errors SW to determine panic or not, forgivable for safe access.
51  *              Set when SW determines this error is forgivable during safe acc.
52  * No-panic     Errors that don't directly result in panic'ing the system.
53  * No-Error     When an interrupt occured and no errors were seen
54  * Fabric Scan	Indicates that fabric scan will determine final severity of a
55  *		panicable error.
56  */
57 #define	PX_FABRIC_SCAN		(0x1 << 6)
58 #define	PX_HW_RESET		(0x1 << 5)
59 #define	PX_PANIC		(0x1 << 4)
60 #define	PX_EXPECTED		(0x1 << 3)
61 #define	PX_PROTECTED		(0x1 << 2)
62 #define	PX_NO_PANIC		(0x1 << 1)
63 #define	PX_NO_ERROR		(0x1 << 0)
64 
65 #define	PX_HB		(0x1 << 2)
66 #define	PX_RP		(0x1 << 1)
67 #define	PX_RC		(0x1 << 0)
68 
69 /*
70  * Generic PCIe Root Port Error Handling
71  * This struct must align with px_pec_err_t in sun4v/io/px/px_err.h
72  */
73 typedef struct px_err_pcie {
74 	uint32_t tx_hdr1;	/* sysino */
75 	uint32_t tx_hdr2;	/* sysino */
76 	uint32_t tx_hdr3;	/* ehdl */
77 	uint32_t tx_hdr4;	/* ehdl */
78 	uint32_t primary_ue;	/* stick */
79 	uint32_t rsvd0;		/* stick */
80 	uint32_t rsvd1;		/* pec_desc */
81 	uint16_t pci_err_status;
82 	uint16_t pcie_err_status;
83 	uint32_t ce_reg;
84 	uint32_t ue_reg;
85 	uint32_t rx_hdr1;	/* hdr[0] */
86 	uint32_t rx_hdr2;	/* hdr[0] */
87 	uint32_t rx_hdr3;	/* hdr[1] */
88 	uint32_t rx_hdr4;	/* hdr[1] */
89 	uint32_t rsvd3;		/* err_src_reg */
90 	uint32_t rsvd4;		/* root err status */
91 } px_err_pcie_t;
92 
93 #define	PX_FM_BLOCK_HOST	(0x1 << 0)
94 #define	PX_FM_BLOCK_PCIE	(0x1 << 1)
95 #define	PX_FM_BLOCK_ALL		(PX_FM_BLOCK_HOST | PX_FM_BLOCK_PCIE)
96 
97 /*
98  * Error handling FMA hook
99  */
100 extern void px_bus_enter(dev_info_t *dip, ddi_acc_handle_t handle);
101 extern void px_bus_exit(dev_info_t *dip, ddi_acc_handle_t handle);
102 extern int px_fm_attach(px_t *px_p);
103 extern void px_fm_detach(px_t *px_p);
104 extern void px_fm_cb_enable(px_t *px_p);
105 extern void px_fm_cb_disable(px_t *px_p);
106 extern int px_fm_init_child(dev_info_t *, dev_info_t *, int,
107     ddi_iblock_cookie_t *);
108 extern void px_fm_acc_setup(ddi_map_req_t *, dev_info_t *, pci_regspec_t *rp);
109 extern int px_fm_callback(dev_info_t *, ddi_fm_error_t *, const void *);
110 extern int px_err_cmn_intr(px_t *, ddi_fm_error_t *, int, int);
111 
112 /*
113  * Fire interrupt handlers
114  */
115 extern uint_t px_err_cb_intr(caddr_t arg);
116 extern uint_t px_err_dmc_pec_intr(caddr_t arg);
117 extern uint_t px_err_fabric_intr(px_t *px_p, msgcode_t msg_code,
118     pcie_req_id_t rid);
119 
120 /*
121  * Common error handling functions
122  */
123 extern int px_scan_fabric(px_t *px_p, dev_info_t *rdip, ddi_fm_error_t *derr);
124 extern void px_err_safeacc_check(px_t *px_p, ddi_fm_error_t *derr);
125 extern int px_err_check_eq(dev_info_t *dip);
126 extern int px_err_check_pcie(dev_info_t *dip, ddi_fm_error_t *derr,
127     px_err_pcie_t *regs, pf_intr_type_t intr_type);
128 extern int px_fm_enter(px_t *px_p);
129 extern void px_fm_exit(px_t *px_p);
130 extern void px_err_panic(int err, int msg, int fab_err, boolean_t isTest);
131 extern pf_data_t *px_rp_en_q(px_t *px_p, pcie_req_id_t fault_bdf,
132     uint32_t fault_addr, uint16_t s_status);
133 extern pf_data_t *px_get_pfd(px_t *px_p);
134 
135 /*
136  * Sparc specific cfg, pio and dma handle lookup/check functions
137  */
138 extern int px_err_cfg_hdl_check(dev_info_t *dip, const void *handle,
139     const void *addr, const void *not_used);
140 extern int px_err_pio_hdl_check(dev_info_t *dip, const void *handle,
141     const void *addr, const void *not_used);
142 extern int px_err_dma_hdl_check(dev_info_t *dip, const void *handle,
143     const void *addr, const void *not_used);
144 
145 #ifdef	__cplusplus
146 }
147 #endif
148 
149 #endif	/* _SYS_PX_FM_H */
150