1 /* 2 * CDDL HEADER START 3 * 4 * The contents of this file are subject to the terms of the 5 * Common Development and Distribution License (the "License"). 6 * You may not use this file except in compliance with the License. 7 * 8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 9 * or http://www.opensolaris.org/os/licensing. 10 * See the License for the specific language governing permissions 11 * and limitations under the License. 12 * 13 * When distributing Covered Code, include this CDDL HEADER in each 14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 15 * If applicable, add the following below this CDDL HEADER, with the 16 * fields enclosed by brackets "[]" replaced with your own identifying 17 * information: Portions Copyright [yyyy] [name of copyright owner] 18 * 19 * CDDL HEADER END 20 */ 21 /* 22 * Copyright 2007 Sun Microsystems, Inc. All rights reserved. 23 * Use is subject to license terms. 24 */ 25 26 #ifndef _SYS_ERI_H 27 #define _SYS_ERI_H 28 29 #pragma ident "%Z%%M% %I% %E% SMI" 30 31 #ifdef __cplusplus 32 extern "C" { 33 #endif 34 35 36 #ifdef _KERNEL 37 38 /* Named Dispatch Parameter Management Structure */ 39 typedef struct param_s { 40 uint32_t param_min; 41 uint32_t param_max; 42 uint32_t param_val; 43 char *param_name; 44 } param_t; 45 46 #define ERI_PARAM_CNT 51 47 48 typedef enum { 49 MIF_POLL_STOP, 50 MIF_POLL_START 51 } soft_mif_enable_t; 52 53 54 /* 55 * kstats 56 */ 57 typedef struct stats { 58 /* 59 * Link Input/Output stats 60 * ifspeed is now in bits/second. 61 */ 62 uint64_t ipackets64; 63 uint64_t iipackets64; 64 uint32_t ierrors; 65 uint64_t opackets64; 66 uint64_t oerrors; 67 uint32_t collisions; 68 uint64_t ifspeed; 69 70 /* 71 * MAC TX Event stats 72 */ 73 uint32_t txmac_urun; 74 uint32_t txmac_maxpkt_err; 75 uint32_t excessive_coll; 76 uint32_t late_coll; 77 uint32_t first_coll; 78 uint32_t defer_timer_exp; 79 uint32_t peak_attempt_cnt; 80 uint32_t tx_hang; 81 82 /* 83 * MAC RX Event stats 84 */ 85 uint32_t rx_corr; 86 uint32_t no_free_rx_desc; /* no free rx desc. */ 87 uint32_t rx_overflow; 88 uint32_t rx_ovrflpkts; 89 uint32_t rx_hang; 90 uint32_t rx_align_err; 91 uint32_t rx_crc_err; 92 uint32_t rx_length_err; 93 uint32_t rx_code_viol_err; 94 95 /* 96 * MAC Control event stats 97 */ 98 uint32_t pause_rxcount; /* PAUSE Receive cnt */ 99 uint32_t pause_oncount; 100 uint32_t pause_offcount; 101 uint32_t pause_time_count; 102 uint32_t pausing; 103 104 /* 105 * Software event stats 106 */ 107 uint32_t inits; 108 uint32_t rx_inits; 109 uint32_t tx_inits; 110 uint32_t tnocar; /* Link down counter */ 111 112 uint32_t jab; 113 uint32_t notmds; 114 uint32_t nocanput; 115 uint32_t allocbfail; 116 uint32_t drop; 117 uint32_t rx_corrupted; 118 uint32_t rx_bad_pkts; 119 uint32_t rx_runt; 120 uint32_t rx_toolong_pkts; 121 122 123 /* 124 * Fatal errors 125 */ 126 uint32_t rxtag_err; 127 128 /* 129 * parity error 130 */ 131 uint32_t parity_error; 132 133 /* 134 * Fatal error stats 135 */ 136 uint32_t pci_error_int; /* PCI error interrupt */ 137 uint32_t unknown_fatal; /* unknown fatal errors */ 138 139 /* 140 * PCI Configuration space staus register 141 */ 142 uint32_t pci_data_parity_err; /* Data parity err */ 143 uint32_t pci_signal_target_abort; 144 uint32_t pci_rcvd_target_abort; 145 uint32_t pci_rcvd_master_abort; 146 uint32_t pci_signal_system_err; 147 uint32_t pci_det_parity_err; 148 149 /* 150 * MIB II variables 151 */ 152 uint64_t rbytes64; /* # bytes received */ 153 uint64_t obytes64; /* # bytes transmitted */ 154 uint32_t multircv; /* # multicast packets received */ 155 uint32_t multixmt; /* # multicast packets for xmit */ 156 uint32_t brdcstrcv; /* # broadcast packets received */ 157 uint32_t brdcstxmt; /* # broadcast packets for xmit */ 158 uint32_t norcvbuf; /* # rcv packets discarded */ 159 uint32_t noxmtbuf; /* # xmit packets discarded */ 160 161 uint32_t pmcap; /* power management */ 162 163 /* 164 * Link Status 165 */ 166 uint32_t link_up; 167 uint32_t link_duplex; 168 } stats_t; 169 170 #define HSTAT(erip, x) erip->stats.x++; 171 #define HSTATN(erip, x, n) erip->stats.x += n; 172 173 174 #define TX_BCOPY_MAX 704 /* bcopy for packets < 704 bytes */ 175 #define RX_BCOPY_MAX 704 /* bcopy for packets < 704 bytes */ 176 #define TX_STREAM_MIN 512 177 178 /* 179 * Per-Stream instance state information. 180 * 181 * Each instance is dynamically allocated at open() and free'd 182 * at close(). Each per-Stream instance points to at most one 183 * per-device structure using the sb_erip field. All instances 184 * are threaded together into one list of active instances 185 * ordered on minor device number. 186 */ 187 188 #define NMCFILTER_BITS 256 /* # of multicast filter bits */ 189 190 191 /* 192 * Maximum number of receive descriptors posted to the chip. 193 */ 194 #define ERI_RPENDING (erip->rpending) 195 196 /* 197 * Maximum number of transmit descriptors for lazy reclaim. 198 */ 199 #define ERI_TPENDING (erip->tpending) 200 201 /* 202 * Return the address of an adjacent descriptor in the given ring. 203 */ 204 #define NEXTRMD(erip, rmdp) (((rmdp) + 1) == (erip)->rmdlimp ? \ 205 (erip)->rmdp : ((rmdp) + 1)) 206 #define NEXTTMD(erip, tmdp) (((tmdp) + 1) == (erip)->eri_tmdlimp ? \ 207 (erip)->eri_tmdp : ((tmdp) + 1)) 208 #define PREVTMD(erip, tmdp) ((tmdp) == (erip)->eri_tmdp ? \ 209 ((erip)->eri_tmdlimp - 1) : ((tmdp) - 1)) 210 211 #define MSECOND(t) t 212 #define SECOND(t) t*1000 213 #define ERI_TICKS MSECOND(100) 214 215 #define ERI_NTRIES_LOW (SECOND(5)/ERI_TICKS) /* 5 Seconds */ 216 #define ERI_NTRIES_HIGH (SECOND(5)/ERI_TICKS) /* 5 Seconds */ 217 #define ERI_NTRIES_LOW_10 (SECOND(2)/ERI_TICKS) /* 2 Seconds */ 218 #define ERI_LINKDOWN_TIME (SECOND(2)/ERI_TICKS) /* 2 Seconds */ 219 220 221 /* 222 * ERI ASIC Revision Numbers 223 */ 224 #define ERI_ERIREV_1_0 0x1 225 226 /* 227 * Link poll interval for detecting change of transceivers 228 */ 229 #define ERI_LINKCHECK_TIMER SECOND(3) 230 231 /* 232 * Parallel detection Fault restart timer 233 */ 234 #define ERI_P_FAULT_TIMER SECOND(3) 235 236 /* 237 * Check rmac hang restart timer 238 */ 239 #define ERI_CHECK_HANG_TIMER MSECOND(400) 240 #define ERI_RMAC_HANG_WORKAROUND 241 242 /* 243 * undefine ERI_PM_WORKAROUND this time. With ERI_PM_WORKAROUND defined, 244 * each non_fatal error causes pci clock to go up for 30 seconds. Therefore, 245 * no TXMAC_UNDERRUN or excessive RXFIFO_OVERFLOW should happen. 246 */ 247 248 249 /* 250 * Link bringup modes 251 */ 252 #define ERI_AUTO_BRINGUP 0 253 #define ERI_FORCED_BRINGUP 1 254 255 /* 256 * Transceivers selected for use by the driver. 257 */ 258 #define NO_XCVR 2 259 #define INTERNAL_XCVR 0 260 #define EXTERNAL_XCVR 1 261 262 /* 263 * states for manually creating the link down condition 264 */ 265 #define ERI_LINKDOWN_OK 0 266 #define ERI_FORCE_LINKDOWN 1 267 #define ERI_LINKDOWN_STARTED 2 268 #define ERI_LINKDOWN_DONE 3 269 270 /* 271 * states for bringing up the link in auto-negotiation mode 272 */ 273 #define ERI_HWAN_TRY 0 /* Try Hardware autonegotiation */ 274 #define ERI_HWAN_INPROGRESS 1 /* Hardware autonegotiation in progress */ 275 #define ERI_HWAN_SUCCESFUL 2 /* Hardware autonegotiation succesful */ 276 #define ERI_HWAN_FAILED 3 /* Hardware autonegotiation failed */ 277 278 /* 279 * states for resetting the transceiver 280 */ 281 #define RESET_TO_BE_ISSUED 0 /* Reset command to be issued to the PHY */ 282 #define RESET_ISSUED 1 /* Reset command has been issued */ 283 #define ISOLATE_ISSUED 2 /* Isolate-remove command has been issued */ 284 285 /* 286 * ERI Supported PHY devices 287 * ERI ASIC supports a built in Gigabit Serial LInk Interface and MII 288 * External SERDES interfaces with shared pins. 289 * On some product implementations, the built-in Serial Link may not be present 290 * either because the Serial Link circuitry does not work or because the product 291 * needs to use only the MII interface. 292 * When both the Serial Link and MII PHY's are present, the driver normally 293 * tries to bring up both the links. If both of them come up, it will select the 294 * link defined by the "eri_default_link" variable by default. 295 * The user may use the configuration variable 296 * eri_select_link to manually select 297 * either the Serial Link or the MII PHY to be used. 298 */ 299 300 /* 301 * Values for the eri_serial_link field 302 */ 303 #define ERI_SERIAL_LINK_NOT_PRESENT 0 304 #define ERI_SERIAL_LINK_PRESENT 1 305 306 /* 307 * Values for the eri_non-serial-link field 308 */ 309 #define ERI_NO_SHARED_PIN_PHY 0 310 #define ERI_MII_PRESENT 1 311 #define ERI_SERDES_PRESENT 2 312 313 /* 314 * Values for the default selection when both the serial link and 315 * the MII links are present. 316 */ 317 #define ERI_DEFAULT_SERIAL_LINK 0 318 #define ERI_DEFAULT_MII_LINK 1 319 320 /* 321 * Values for the eri_select_link field to manually select the PHY 322 */ 323 #define ERI_AUTO_PHY 0 /* Select PHY automatically */ 324 #define ERI_USE_SERIAL_LINK 1 /* Select serial-link */ 325 #define ERI_USE_NON_SERIAL_LINK 2 /* Select non-serial-link */ 326 327 /* 328 * eri_linkup_state" definitions 329 */ 330 #define ERI_START_LINK_BRINGUP 0 331 #define ERI_SERIAL_LINK_BRINGUP 1 332 #define ERI_SERDES_LINK_BRINGUP 2 333 #define ERI_MII_LINK_BRINGUP 3 334 #define ERI_DEFAULT_LINK_BRINGUP 4 335 #define ERI_ALT_LINK_BRINGUP 5 336 337 /* 338 * structure used to detect tx hang condition 339 */ 340 struct erisave { 341 ulong_t starts; /* # of tx packets posted to the hw */ 342 uint64_t reclaim_opackets; /* # of tx packets reclaimed */ 343 }; 344 345 /* 346 * ERI Device Channel instance state information. 347 * 348 * Each instance is dynamically allocated on first attach. 349 */ 350 struct eri { 351 mac_handle_t mh; /* GLDv3 handle */ 352 dev_info_t *dip; /* associated dev_info */ 353 uint_t instance; /* instance */ 354 355 int pci_mode; /* sbus/pci device (future) */ 356 int cpci_mode; /* compact pci dev (future) */ 357 int low_power_mode; /* E* (low power) */ 358 int asic_rev; /* ERI ASIC rev no. */ 359 int board_rev; /* ERI ASIC rev no. */ 360 int burstsizes; /* binary encoded val */ 361 int pagesize; /* btop(9f) */ 362 uint32_t rxfifo_size; /* RX FIFO size */ 363 364 int rpending; /* Max.no. of RX bufs post */ 365 int tpending; /* Max.no. of tX bufs post */ 366 int tx_cur_cnt; /* # of packets for int_me */ 367 368 uint_t multi_refcnt; 369 boolean_t promisc; 370 371 int mifpoll_enable; 372 int frame_enable; 373 int lance_mode_enable; 374 int ngu_enable; 375 int link_pulse_disabled; 376 int xmit_dma_mode; 377 int rcv_dma_mode; 378 uint8_t ouraddr[ETHERADDRL]; /* unicast address */ 379 uint32_t flags; /* misc. flags */ 380 uint32_t alloc_flag; /* Buff alloc. status flags */ 381 boolean_t wantw; /* xmit: out of resources */ 382 383 uint16_t ladrf[NMCFILTER_BITS/16]; /* Multicast filter */ 384 uint16_t ladrf_refcnt[NMCFILTER_BITS]; 385 386 volatile struct global *globregp; /* ERI global regs */ 387 volatile struct etx *etxregp; /* ERI ETX regs */ 388 volatile struct erx *erxregp; /* ERI ERX regs */ 389 390 volatile struct bmac *bmacregp; /* MAC regs */ 391 volatile struct mif *mifregp; /* ERI transceiver */ 392 volatile struct pcslink *pcsregp; /* ERI PCS regs */ 393 394 uint32_t *sw_reset_reg; 395 396 uint32_t rx_kick; /* RX kick register val */ 397 uint32_t rx_completion; /* RX completion reg val */ 398 #ifdef RCV_OVRFLOW_CORRUPTION_BUG 399 uint32_t rx_ovrflpks; /* RX recompute checksum */ 400 #endif 401 uint32_t tx_kick; /* TX kick register val */ 402 uint32_t tx_completion; /* TX completion reg val */ 403 404 struct rmd *rmdp; /* rcv descript ring start */ 405 struct rmd *rmdlimp; /* rcv descript ring end */ 406 struct eri_tmd *eri_tmdp; /* xmit descript ring start */ 407 struct eri_tmd *eri_tmdlimp; /* xmit descript ring end */ 408 volatile struct rmd *rnextp; /* next chip rmd */ 409 volatile struct rmd *rlastp; /* last free rmd */ 410 volatile struct eri_tmd *tnextp; /* next free tmd */ 411 412 volatile struct eri_tmd *tcurp; /* nxt tmd to reclaim(used) */ 413 /* 414 * these are handles for the dvma resources reserved 415 * by dvma_reserve 416 */ 417 ddi_dma_handle_t eri_dvmarh; /* dvma recv handle */ 418 ddi_dma_handle_t eri_dvmaxh; /* dvma xmit handle */ 419 420 /* 421 * these are used if dvma reserve fails, and we have to fall 422 * back on the older ddi_dma_addr_setup routines 423 */ 424 ddi_dma_handle_t ndmarh[ERI_RMDMAX]; 425 ddi_dma_handle_t ndmaxh[ERI_TMDMAX]; 426 427 ddi_dma_handle_t tbuf_handle; 428 caddr_t tbuf_kaddr; 429 uint32_t tbuf_ioaddr; 430 431 int rcv_handle_cnt; 432 int xmit_handle_cnt; 433 434 int rx_reset_issued; 435 int tx_reset_issued; 436 int rxmac_reset_issued; 437 int txmac_reset_issued; 438 439 int global_reset_issued; 440 uint32_t rpending_mask; 441 int rmdmax_mask; 442 int init_macregs; 443 444 int phyad; /* addr of the PHY in use */ 445 int xcvr; /* current PHY in use */ 446 447 int openloop_autoneg; 448 449 uint16_t mif_config; 450 uint16_t mif_mask; 451 452 uint32_t tx_config; 453 454 uint32_t vendor_id; /* Vendor ID */ 455 uint16_t device_id; /* Device Model */ 456 uint16_t device_rev; /* Device Rev. */ 457 uint32_t phy_address; /* PHY Address */ 458 uint32_t xcvr_status; /* xcvr_status */ 459 uint32_t xcvr_state; /* xcvr_state */ 460 uint32_t bringup_mode; /* Bringup Mode */ 461 uint32_t speed; /* Current speed */ 462 uint32_t duplex; /* Xcvr Duplex */ 463 uint32_t capability; /* Xcvr Capability */ 464 465 uint16_t mii_control; 466 uint16_t mii_status; 467 uint16_t mii_anar; 468 uint16_t mii_lpanar; 469 470 int autoneg; 471 int force_linkdown; 472 int mode; 473 474 int linkup_10; 475 int pace_count; /* pacing pkt count */ 476 477 int nlasttries; 478 int ntries; 479 int delay; 480 int linkup_attempts; 481 482 int polling_on; 483 int mifpoll_data; 484 int mifpoll_flag; /* indicates MIF intr */ 485 486 int pauseTX; /* pcs link-pause TX enable */ 487 int pauseRX; /* pcs link-pause RX enable */ 488 int macfdx; /* mac full-duplex mode */ 489 timeout_id_t timerid; /* timer id for links */ 490 int linkup_cnt; 491 492 uint16_t aner; /* MII ANER register */ 493 494 int linkup; /* selected link status */ 495 int linkup_state; /* link bringup state */ 496 int linkup_changed; /* link bringup state */ 497 498 int linkcheck; 499 caddr_t g_nd; /* head of the */ 500 /* named dispatch table */ 501 502 ddi_device_acc_attr_t dev_attr; 503 ddi_iblock_cookie_t cookie; /* interrupt cookie */ 504 ddi_acc_handle_t globregh; /* ERI global regs */ 505 ddi_acc_handle_t etxregh; /* ERI ETX regs */ 506 ddi_acc_handle_t erxregh; /* ERI ERX regs */ 507 ddi_acc_handle_t bmacregh; /* BigMAC registers */ 508 ddi_acc_handle_t mifregh; /* ERI transceiver */ 509 ddi_acc_handle_t pcsregh; /* ERI PCS regs */ 510 511 ddi_acc_handle_t sw_reset_regh; /* ERI Reset Reg */ 512 513 ddi_dma_cookie_t md_c; /* trmd dma cookie */ 514 ddi_acc_handle_t mdm_h; /* trmd memory handle */ 515 ddi_dma_handle_t md_h; /* trmdp dma handle */ 516 517 ddi_acc_handle_t pci_config_handle; /* ERI PCI config */ 518 519 /* 520 * DDI dma handle, kernel virtual base, 521 * and io virtual base of IOPB area. 522 */ 523 ddi_dma_handle_t iopbhandle; 524 uintptr_t iopbkbase; 525 uintptr_t iopbiobase; 526 kstat_t *ksp; /* kstat pointer */ 527 528 kmutex_t xmitlock; /* protect xmit-side fields */ 529 kmutex_t xcvrlock; /* */ 530 kmutex_t intrlock; /* protect intr-side fields */ 531 kmutex_t linklock; /* protect link-side fields */ 532 533 mblk_t *tmblkp[ERI_TMDMAX]; /* mblks assoc with TMD */ 534 mblk_t *rmblkp[ERI_RMDMAX]; /* mblks assoc with RMD */ 535 param_t param_arr[ERI_PARAM_CNT]; 536 537 struct stats stats; /* kstats */ 538 539 /* 540 * Check if transmitter is hung 541 */ 542 uint32_t starts; 543 uint32_t txhung; 544 struct erisave erisave; 545 546 uint64_t ifspeed_old; 547 548 #ifdef ERI_RMAC_HANG_WORKAROUND 549 uint32_t check_rmac_hang; 550 uint32_t check2_rmac_hang; 551 uint32_t rxfifo_wr_ptr; 552 uint32_t rxfifo_rd_ptr; 553 uint32_t rxfifo_wr_ptr_c; 554 uint32_t rxfifo_rd_ptr_c; 555 #endif 556 uint32_t tx_int_me; 557 }; 558 559 /* 560 * LADRF bit array manipulation macros. These are for working within the 561 * array of words defined by erip->ladrf, converting a bit (0-255) into 562 * the index and offset in the ladrf bit array. Note that the array is 563 * provided in "Big Endian" order. 564 */ 565 #define LADRF_MASK(bit) (1 << ((bit) % 16)) 566 #define LADRF_WORD(erip, bit) erip->ladrf[(15 - ((bit) / 16))] 567 #define LADRF_SET(erip, bit) (LADRF_WORD(erip, bit) |= LADRF_MASK(bit)) 568 #define LADRF_CLR(erip, bit) (LADRF_WORD(erip, bit) &= ~LADRF_MASK(bit)) 569 570 /* 571 * ERI IOCTLS. 572 * Change : TODO : MBE 573 */ 574 #define ERIIOC ('G' << 8) 575 #define ERI_SET_LOOP_MODE (ERIIOC|1) /* Set Rio Loopback mode */ 576 #define ERI_GET_LOOP_MODE (ERIIOC|2) /* Get Rio Loopback modes */ 577 #define ERI_GET_LOOP_IFCNT (ERIIOC|4) /* Get Rio IF Count */ 578 579 /* 580 * Loopback modes: For diagnostic testing purposes the ERI card 581 * can be placed in loopback mode. 582 * There are three modes of loopback provided by the driver, 583 * Mac loopback, PCS loopback and Serdes loopback. 584 */ 585 #define ERI_LOOPBACK_OFF 0 586 #define ERI_MAC_LOOPBACK_ON 1 587 #define ERI_PCS_LOOPBACK_ON 2 588 #define ERI_SER_LOOPBACK_ON 4 589 typedef struct { 590 int loopback; 591 } loopback_t; 592 593 594 /* 595 * flags 596 * TODO : MBE 597 */ 598 #define ERI_UNKOWN 0x00 /* unknown state */ 599 #define ERI_RUNNING 0x01 /* chip is initialized */ 600 #define ERI_STARTED 0x02 /* mac layer started */ 601 #define ERI_SUSPENDED 0x08 /* suspended interface */ 602 #define ERI_INITIALIZED 0x10 /* interface initialized */ 603 #define ERI_NOTIMEOUTS 0x20 /* disallow timeout rescheduling */ 604 #define ERI_TXINIT 0x40 /* TX Portion Init'ed */ 605 #define ERI_RXINIT 0x80 /* RX Portion Init'ed */ 606 #define ERI_MACLOOPBACK 0x100 /* device has MAC int lpbk (DIAG) */ 607 #define ERI_SERLOOPBACK 0x200 /* device has SERDES int lpbk (DIAG) */ 608 #define ERI_DLPI_LINKUP 0x400 /* */ 609 610 /* 611 * Mac address flags 612 */ 613 #define ERI_FACTADDR_PRESENT 0x01 /* factory MAC id present */ 614 #define ERI_FACTADDR_USE 0x02 /* use factory MAC id */ 615 616 struct erikstat { 617 /* 618 * Software event stats 619 */ 620 struct kstat_named erik_inits; 621 struct kstat_named erik_rx_inits; 622 struct kstat_named erik_tx_inits; 623 624 struct kstat_named erik_allocbfail; 625 struct kstat_named erik_drop; 626 627 /* 628 * MAC Control event stats 629 */ 630 struct kstat_named erik_pause_rxcount; /* PAUSE Receive count */ 631 struct kstat_named erik_pause_oncount; 632 struct kstat_named erik_pause_offcount; 633 struct kstat_named erik_pause_time_count; 634 635 /* 636 * MAC TX Event stats 637 */ 638 struct kstat_named erik_txmac_maxpkt_err; 639 struct kstat_named erik_defer_timer_exp; 640 struct kstat_named erik_peak_attempt_cnt; 641 struct kstat_named erik_jab; 642 struct kstat_named erik_notmds; 643 struct kstat_named erik_tx_hang; 644 645 /* 646 * MAC RX Event stats 647 */ 648 struct kstat_named erik_no_free_rx_desc; /* no free rx desc. */ 649 struct kstat_named erik_rx_hang; 650 struct kstat_named erik_rx_length_err; 651 struct kstat_named erik_rx_code_viol_err; 652 struct kstat_named erik_rx_bad_pkts; 653 654 /* 655 * Fatal errors 656 */ 657 struct kstat_named erik_rxtag_err; 658 659 /* 660 * Parity error 661 */ 662 struct kstat_named erik_parity_error; 663 664 /* 665 * PCI fatal error stats 666 */ 667 struct kstat_named erik_pci_error_int; /* PCI error interrupt */ 668 struct kstat_named erik_unknown_fatal; /* unknow fatal error */ 669 670 /* 671 * PCI Configuration space staus register 672 */ 673 struct kstat_named erik_pci_data_parity_err; /* dparity err */ 674 struct kstat_named erik_pci_signal_target_abort; 675 struct kstat_named erik_pci_rcvd_target_abort; 676 struct kstat_named erik_pci_rcvd_master_abort; 677 struct kstat_named erik_pci_signal_system_err; 678 struct kstat_named erik_pci_det_parity_err; 679 680 681 struct kstat_named erik_pmcap; /* Power management */ 682 }; 683 684 /* TBD: new value ? */ 685 #define ERI_DRAINTIME (400000) /* # microseconds xmit drain */ 686 687 #define ROUNDUP(a, n) (((a) + ((n) - 1)) & ~((n) - 1)) 688 #define ROUNDUP2(a, n) (uchar_t *)((((uintptr_t)(a)) + ((n) - 1)) & ~((n) - 1)) 689 690 /* 691 * Xmit/receive buffer structure. 692 * This structure is organized to meet the following requirements: 693 * - hb_buf starts on an ERI_BURSTSIZE boundary. 694 * - eribuf is an even multiple of ERI_BURSTSIZE 695 * - hb_buf[] is large enough to contain max frame (1518) plus 696 * (3 x ERI_BURSTSIZE) rounded up to the next ERI_BURSTSIZE 697 */ 698 /* 699 * #define ERI_BURSTSIZE (64) 700 */ 701 #define ERI_BURSTSIZE (128) 702 #define ERI_BURSTMASK (ERIBURSTSIZE - 1) 703 #define ERI_BUFSIZE (1728) /* (ETHERMTU + 228) */ 704 #define ERI_HEADROOM (34) 705 706 /* Offset for the first byte in the receive buffer */ 707 #define ERI_FSTBYTE_OFFSET 2 708 #define ERI_CKSUM_OFFSET 14 709 710 711 #define ERI_PMCAP_NONE 0 712 #define ERI_PMCAP_4MHZ 4 713 714 #endif /* _KERNEL */ 715 716 #ifdef __cplusplus 717 } 718 #endif 719 720 #endif /* _SYS_ERI_H */ 721