1 /* 2 * CDDL HEADER START 3 * 4 * The contents of this file are subject to the terms of the 5 * Common Development and Distribution License, Version 1.0 only 6 * (the "License"). You may not use this file except in compliance 7 * with the License. 8 * 9 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 10 * or http://www.opensolaris.org/os/licensing. 11 * See the License for the specific language governing permissions 12 * and limitations under the License. 13 * 14 * When distributing Covered Code, include this CDDL HEADER in each 15 * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 16 * If applicable, add the following below this CDDL HEADER, with the 17 * fields enclosed by brackets "[]" replaced with your own identifying 18 * information: Portions Copyright [yyyy] [name of copyright owner] 19 * 20 * CDDL HEADER END 21 */ 22 /* 23 * Copyright 1990-2002 Sun Microsystems, Inc. All rights reserved. 24 * Use is subject to license terms. 25 */ 26 27 #ifndef _SYS_PCB_H 28 #define _SYS_PCB_H 29 30 #pragma ident "%Z%%M% %I% %E% SMI" 31 32 #include <sys/regset.h> 33 34 #ifdef __cplusplus 35 extern "C" { 36 #endif 37 38 /* 39 * Sun software process control block 40 */ 41 42 #ifndef _ASM 43 typedef struct pcb { 44 int pcb_flags; /* various state flags; cleared on fork */ 45 uint32_t pcb_trap0addr; /* addr of user level trap 0 handler */ 46 /* deliberately restricted to 32 bits */ 47 /* because only used for SunOS programs */ 48 uint_t pcb_instr; /* /proc: instruction at stop */ 49 enum { XREGNONE = 0, XREGPRESENT, XREGMODIFIED } 50 pcb_xregstat; /* state of contents of pcb_xregs */ 51 struct rwindow pcb_xregs; /* locals+ins fetched/set via /proc */ 52 int pcb_step; /* used while single-stepping */ 53 caddr_t pcb_tracepc; /* used while single-stepping */ 54 } pcb_t; 55 #endif /* ! _ASM */ 56 57 /* pcb_flags */ 58 #define INSTR_VALID 0x02 /* value in pcb_instr is valid (/proc) */ 59 #define NORMAL_STEP 0x04 /* normal debugger requested single-step */ 60 #define WATCH_STEP 0x08 /* single-stepping in watchpoint emulation */ 61 #define CPC_OVERFLOW 0x10 /* performance counters overflowed */ 62 #define ASYNC_HWERR 0x20 /* asynchronous h/w error (e.g. parity error) */ 63 #define ASYNC_BERR 0x40 /* asynchronous bus error */ 64 #define ASYNC_BTO 0x80 /* asynchronous bus timeout */ 65 #define ASYNC_MOD_ILL 0x100 /* async module error w/ illegal instr/cycle */ 66 #define ASYNC_MOD_SEGV 0x200 /* async module error w/ address violation */ 67 #define ASYNC_ERR (ASYNC_HWERR | ASYNC_BERR | ASYNC_BTO | \ 68 ASYNC_MOD_ILL | ASYNC_MOD_SEGV) 69 70 /* pcb_step */ 71 #define STEP_NONE 0 /* no single step */ 72 #define STEP_REQUESTED 1 /* arrange to single-step the lwp */ 73 #define STEP_ACTIVE 2 /* actively patching addr, set active flag */ 74 #define STEP_WASACTIVE 3 /* wrap up after taking single-step fault */ 75 76 #ifdef __cplusplus 77 } 78 #endif 79 80 #endif /* _SYS_PCB_H */ 81