1 /* 2 * CDDL HEADER START 3 * 4 * The contents of this file are subject to the terms of the 5 * Common Development and Distribution License (the "License"). 6 * You may not use this file except in compliance with the License. 7 * 8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 9 * or http://www.opensolaris.org/os/licensing. 10 * See the License for the specific language governing permissions 11 * and limitations under the License. 12 * 13 * When distributing Covered Code, include this CDDL HEADER in each 14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 15 * If applicable, add the following below this CDDL HEADER, with the 16 * fields enclosed by brackets "[]" replaced with your own identifying 17 * information: Portions Copyright [yyyy] [name of copyright owner] 18 * 19 * CDDL HEADER END 20 */ 21 22 /* 23 * Copyright 2009 Sun Microsystems, Inc. All rights reserved. 24 * Use is subject to license terms. 25 */ 26 27 #ifndef _SYS_PCB_H 28 #define _SYS_PCB_H 29 30 #include <sys/regset.h> 31 32 #ifdef __cplusplus 33 extern "C" { 34 #endif 35 36 /* 37 * Sun software process control block 38 */ 39 40 #ifndef _ASM 41 typedef struct pcb { 42 int pcb_flags; /* various state flags; cleared on fork */ 43 uint32_t pcb_trap0addr; /* addr of user level trap 0 handler */ 44 /* deliberately restricted to 32 bits */ 45 /* because only used for SunOS programs */ 46 uint_t pcb_instr; /* /proc: instruction at stop */ 47 enum { XREGNONE = 0, XREGPRESENT, XREGMODIFIED } 48 pcb_xregstat; /* state of contents of pcb_xregs */ 49 struct rwindow pcb_xregs; /* locals+ins fetched/set via /proc */ 50 int pcb_step; /* used while single-stepping */ 51 caddr_t pcb_tracepc; /* used while single-stepping */ 52 } pcb_t; 53 #endif /* ! _ASM */ 54 55 /* pcb_flags */ 56 #define PRSTOP_CALLED 0x01 /* prstop() has been called for this lwp */ 57 #define INSTR_VALID 0x02 /* value in pcb_instr is valid (/proc) */ 58 #define NORMAL_STEP 0x04 /* normal debugger requested single-step */ 59 #define WATCH_STEP 0x08 /* single-stepping in watchpoint emulation */ 60 #define CPC_OVERFLOW 0x10 /* performance counters overflowed */ 61 #define ASYNC_HWERR 0x20 /* asynchronous h/w error (e.g. parity error) */ 62 #define ASYNC_BERR 0x40 /* asynchronous bus error */ 63 #define ASYNC_BTO 0x80 /* asynchronous bus timeout */ 64 #define ASYNC_MOD_ILL 0x100 /* async module error w/ illegal instr/cycle */ 65 #define ASYNC_MOD_SEGV 0x200 /* async module error w/ address violation */ 66 #define ASYNC_ERR (ASYNC_HWERR | ASYNC_BERR | ASYNC_BTO | \ 67 ASYNC_MOD_ILL | ASYNC_MOD_SEGV) 68 69 /* pcb_step */ 70 #define STEP_NONE 0 /* no single step */ 71 #define STEP_REQUESTED 1 /* arrange to single-step the lwp */ 72 #define STEP_ACTIVE 2 /* actively patching addr, set active flag */ 73 #define STEP_WASACTIVE 3 /* wrap up after taking single-step fault */ 74 75 #ifdef __cplusplus 76 } 77 #endif 78 79 #endif /* _SYS_PCB_H */ 80