xref: /titanic_41/usr/src/uts/sparc/sys/machlock.h (revision 18c2aff776a775d34a4c9893a4c72e0434d68e36)
1 /*
2  * CDDL HEADER START
3  *
4  * The contents of this file are subject to the terms of the
5  * Common Development and Distribution License, Version 1.0 only
6  * (the "License").  You may not use this file except in compliance
7  * with the License.
8  *
9  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
10  * or http://www.opensolaris.org/os/licensing.
11  * See the License for the specific language governing permissions
12  * and limitations under the License.
13  *
14  * When distributing Covered Code, include this CDDL HEADER in each
15  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
16  * If applicable, add the following below this CDDL HEADER, with the
17  * fields enclosed by brackets "[]" replaced with your own identifying
18  * information: Portions Copyright [yyyy] [name of copyright owner]
19  *
20  * CDDL HEADER END
21  */
22 /*
23  * Copyright 1990-2003 Sun Microsystems, Inc.  All rights reserved.
24  * Use is subject to license terms.
25  */
26 
27 #ifndef _SYS_MACHLOCK_H
28 #define	_SYS_MACHLOCK_H
29 
30 #pragma ident	"%Z%%M%	%I%	%E% SMI"
31 
32 #ifdef	__cplusplus
33 extern "C" {
34 #endif
35 
36 #ifndef	_ASM
37 
38 #include <sys/types.h>
39 
40 #ifdef _KERNEL
41 
42 extern void	lock_set(lock_t *lp);
43 extern int	lock_try(lock_t *lp);
44 extern int	lock_spin_try(lock_t *lp);
45 extern int	ulock_try(lock_t *lp);
46 extern void	ulock_clear(lock_t *lp);
47 extern void	lock_clear(lock_t *lp);
48 extern void	lock_set_spl(lock_t *lp, int new_pil, ushort_t *old_pil);
49 extern void	lock_clear_splx(lock_t *lp, int s);
50 
51 #endif	/* _KERNEL */
52 
53 #define	LOCK_HELD_VALUE		0xff
54 #define	LOCK_INIT_CLEAR(lp)	(*(lp) = 0)
55 #define	LOCK_INIT_HELD(lp)	(*(lp) = LOCK_HELD_VALUE)
56 #define	LOCK_HELD(lp)		(*(volatile lock_t *)(lp) != 0)
57 
58 typedef	lock_t	disp_lock_t;		/* dispatcher lock type */
59 
60 /*
61  * SPIN_LOCK() macro indicates whether lock is implemented as a spin lock or
62  * an adaptive mutex, depending on what interrupt levels use it.
63  */
64 #define	SPIN_LOCK(pl)	((pl) > ipltospl(LOCK_LEVEL))
65 
66 /*
67  * Macro to control loops which spin on a lock and then check state
68  * periodically.  Its passed an integer, and returns a boolean value
69  * that if true indicates its a good time to get the scheduler lock and
70  * check the state of the current owner of the lock.
71  */
72 #define	LOCK_SAMPLE_INTERVAL(i)	(((i) & 0xff) == 0)
73 
74 /*
75  * Extern for CLOCK_LOCK.
76  */
77 extern	int	hres_lock;
78 
79 #endif	/* _ASM */
80 
81 /*
82  * The definitions of the symbolic interrupt levels:
83  *
84  *   CLOCK_LEVEL =>  The level at which one must be to block the clock.
85  *
86  *   LOCK_LEVEL  =>  The highest level at which one may block (and thus the
87  *                   highest level at which one may acquire adaptive locks)
88  *                   Also the highest level at which one may be preempted.
89  *
90  *   DISP_LEVEL  =>  The level at which one must be to perform dispatcher
91  *                   operations.
92  *
93  * The constraints on the platform:
94  *
95  *  - CLOCK_LEVEL must be less than or equal to LOCK_LEVEL
96  *  - LOCK_LEVEL must be less than DISP_LEVEL
97  *  - DISP_LEVEL should be as close to LOCK_LEVEL as possible
98  *
99  * Note that LOCK_LEVEL and CLOCK_LEVEL have historically always been equal;
100  * changing this relationship is probably possible but not advised.
101  *
102  */
103 #define	CLOCK_LEVEL	10
104 #define	LOCK_LEVEL	10
105 #define	DISP_LEVEL	(LOCK_LEVEL + 1)
106 
107 #define	HIGH_LEVELS	(PIL_MAX - LOCK_LEVEL)
108 
109 #define	PIL_MAX		15
110 
111 /*
112  * The mutex and semaphore code depends on being able to represent a lock
113  * plus owner in a single 32-bit word.  Thus the owner must contain at most
114  * 24 significant bits.  At present only threads, mutexes and semaphores
115  * must be aware of this vile constraint.  Different ISAs may handle this
116  * differently depending on their capabilities (e.g. compare-and-swap)
117  * and limitations (e.g. constraints on alignment and/or KERNELBASE).
118  */
119 #define	PTR24_LSB	5			/* lower bits all zero */
120 #define	PTR24_MSB	(PTR24_LSB + 24)	/* upper bits all one */
121 #define	PTR24_ALIGN	32		/* minimum alignment (1 << lsb) */
122 #define	PTR24_BASE	0xe0000000	/* minimum ptr value (-1 >> (32-msb)) */
123 
124 #ifdef	__cplusplus
125 }
126 #endif
127 
128 #endif	/* _SYS_MACHLOCK_H */
129