xref: /titanic_41/usr/src/uts/sparc/io/pciex/pcieb_plx.h (revision d4bc0535efa2c2219e9f83246a5f371dc7f94273)
1*d4bc0535SKrishna Elango /*
2*d4bc0535SKrishna Elango  * CDDL HEADER START
3*d4bc0535SKrishna Elango  *
4*d4bc0535SKrishna Elango  * The contents of this file are subject to the terms of the
5*d4bc0535SKrishna Elango  * Common Development and Distribution License (the "License").
6*d4bc0535SKrishna Elango  * You may not use this file except in compliance with the License.
7*d4bc0535SKrishna Elango  *
8*d4bc0535SKrishna Elango  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9*d4bc0535SKrishna Elango  * or http://www.opensolaris.org/os/licensing.
10*d4bc0535SKrishna Elango  * See the License for the specific language governing permissions
11*d4bc0535SKrishna Elango  * and limitations under the License.
12*d4bc0535SKrishna Elango  *
13*d4bc0535SKrishna Elango  * When distributing Covered Code, include this CDDL HEADER in each
14*d4bc0535SKrishna Elango  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15*d4bc0535SKrishna Elango  * If applicable, add the following below this CDDL HEADER, with the
16*d4bc0535SKrishna Elango  * fields enclosed by brackets "[]" replaced with your own identifying
17*d4bc0535SKrishna Elango  * information: Portions Copyright [yyyy] [name of copyright owner]
18*d4bc0535SKrishna Elango  *
19*d4bc0535SKrishna Elango  * CDDL HEADER END
20*d4bc0535SKrishna Elango  */
21*d4bc0535SKrishna Elango /*
22*d4bc0535SKrishna Elango  * Copyright 2009 Sun Microsystems, Inc.  All rights reserved.
23*d4bc0535SKrishna Elango  * Use is subject to license terms.
24*d4bc0535SKrishna Elango  */
25*d4bc0535SKrishna Elango 
26*d4bc0535SKrishna Elango #ifndef	_SYS_PCIEB_PLX_H
27*d4bc0535SKrishna Elango #define	_SYS_PCIEB_PLX_H
28*d4bc0535SKrishna Elango 
29*d4bc0535SKrishna Elango #ifdef	__cplusplus
30*d4bc0535SKrishna Elango extern "C" {
31*d4bc0535SKrishna Elango #endif
32*d4bc0535SKrishna Elango 
33*d4bc0535SKrishna Elango /* PLX Vendor/Device IDs */
34*d4bc0535SKrishna Elango #define	PXB_VENDOR_PLX		0x10B5
35*d4bc0535SKrishna Elango #define	PXB_DEVICE_PLX_8516	0x8516
36*d4bc0535SKrishna Elango #define	PXB_DEVICE_PLX_8532	0x8532
37*d4bc0535SKrishna Elango #define	PXB_DEVICE_PLX_8533	0x8533
38*d4bc0535SKrishna Elango #define	PXB_DEVICE_PLX_8548	0x8548
39*d4bc0535SKrishna Elango 
40*d4bc0535SKrishna Elango #define	PXB_VENDOR_SUN		0x108E
41*d4bc0535SKrishna Elango #define	PXB_DEVICE_PLX_PCIX	0x9010
42*d4bc0535SKrishna Elango #define	PXB_DEVICE_PLX_PCIE	0x9020
43*d4bc0535SKrishna Elango 
44*d4bc0535SKrishna Elango /* Last known bad rev for MSI and other issues */
45*d4bc0535SKrishna Elango #define	PXB_DEVICE_PLX_AA_REV	0xAA
46*d4bc0535SKrishna Elango 
47*d4bc0535SKrishna Elango /* Register offsets and bits specific to the 8548 and 8533 */
48*d4bc0535SKrishna Elango #define	PLX_INGRESS_CONTROL_SHADOW	0x664
49*d4bc0535SKrishna Elango #define	PLX_INGRESS_PORT_ENABLE		0x668
50*d4bc0535SKrishna Elango #define	PLX_CAM_PORT_8			0x2e8
51*d4bc0535SKrishna Elango #define	PLX_CAM_PORT_12			0x2f8
52*d4bc0535SKrishna Elango #define	PLX_RO_MODE_BIT			0x20
53*d4bc0535SKrishna Elango 
54*d4bc0535SKrishna Elango #define	IS_PLX_VENDORID(x)		(x == PXB_VENDOR_PLX)
55*d4bc0535SKrishna Elango 
56*d4bc0535SKrishna Elango static int pxb_tlp_count = 64;
57*d4bc0535SKrishna Elango 
58*d4bc0535SKrishna Elango #ifdef	__cplusplus
59*d4bc0535SKrishna Elango }
60*d4bc0535SKrishna Elango #endif
61*d4bc0535SKrishna Elango 
62*d4bc0535SKrishna Elango #endif	/* _SYS_PCIEB_PLX_H */
63