xref: /titanic_41/usr/src/uts/intel/sys/tss.h (revision e4b86885570d77af552e9cf94f142f4d744fb8c8)
1 /*
2  * Copyright 2004 Sun Microsystems, Inc.  All rights reserved.
3  * Use is subject to license terms.
4  */
5 
6 #ifndef	_SYS_TSS_H
7 #define	_SYS_TSS_H
8 
9 #pragma ident	"%Z%%M%	%I%	%E% SMI"
10 
11 #ifdef	__cplusplus
12 extern "C" {
13 #endif
14 
15 /*	Copyright (c) 1990, 1991 UNIX System Laboratories, Inc.	*/
16 /*	Copyright (c) 1984, 1986, 1987, 1988, 1989, 1990 AT&T	*/
17 /*	  All Rights Reserved  	*/
18 
19 /*
20  * Copyright (c) 1990 The Regents of the University of California.
21  * All rights reserved.
22  *
23  * This code is derived from software contributed to Berkeley by
24  * William Jolitz.
25  *
26  * Redistribution and use in source and binary forms, with or without
27  * modification, are permitted provided that the following conditions
28  * are met:
29  * 1. Redistributions of source code must retain the above copyright
30  *    notice, this list of conditions and the following disclaimer.
31  * 2. Redistributions in binary form must reproduce the above copyright
32  *    notice, this list of conditions and the following disclaimer in the
33  *    documentation and/or other materials provided with the distribution.
34  * 3. All advertising materials mentioning features or use of this software
35  *    must display the following acknowledgement:
36  *	This product includes software developed by the University of
37  *	California, Berkeley and its contributors.
38  * 4. Neither the name of the University nor the names of its contributors
39  *    may be used to endorse or promote products derived from this software
40  *    without specific prior written permission.
41  *
42  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
43  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
44  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
45  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
46  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
47  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
48  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
49  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
50  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
51  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
52  * SUCH DAMAGE.
53  *
54  *	from: @(#)tss.h	5.4 (Berkeley) 1/18/91
55  * $FreeBSD: src/sys/i386/include/tss.h,v 1.13 2002/09/23 05:04:05 peter Exp $
56  */
57 
58 /*
59  * Maximum I/O address that will be in TSS bitmap
60  */
61 #define	MAXTSSIOADDR	0x3ff	/* XXX - needs to support 64K I/O space */
62 
63 #ifndef _ASM
64 
65 /*
66  * Task state segment (tss). Holds the processor state assoicated with
67  * a task.
68  */
69 
70 #if defined(__amd64)
71 
72 #pragma	pack(4)
73 struct tss {
74 	uint32_t	tss_rsvd0;	/* reserved, ignored */
75 	uint64_t	tss_rsp0; 	/* stack pointer CPL = 0 */
76 	uint64_t	tss_rsp1; 	/* stack pointer CPL = 1 */
77 	uint64_t	tss_rsp2; 	/* stack pointer CPL = 2 */
78 	uint64_t	tss_rsvd1;	/* reserved, ignored */
79 	uint64_t	tss_ist1;	/* Interrupt stack table 1 */
80 	uint64_t	tss_ist2;	/* Interrupt stack table 2 */
81 	uint64_t	tss_ist3;	/* Interrupt stack table 3 */
82 	uint64_t	tss_ist4;	/* Interrupt stack table 4 */
83 	uint64_t	tss_ist5;	/* Interrupt stack table 5 */
84 	uint64_t	tss_ist6;	/* Interrupt stack table 6 */
85 	uint64_t	tss_ist7;	/* Interrupt stack table 7 */
86 	uint64_t	tss_rsvd2;	/* reserved, ignored */
87 	uint16_t	tss_rsvd3;	/* reserved, ignored */
88 	uint16_t	tss_bitmapbase;	/* io permission bitmap base address */
89 };
90 #pragma	pack()
91 
92 #elif defined(__i386)
93 
94 struct tss {
95 	uint16_t	tss_link;	/* 16-bit prior TSS selector */
96 	uint16_t	tss_rsvd0;	/* reserved, ignored */
97 	uint32_t	tss_esp0;
98 	uint16_t	tss_ss0;
99 	uint16_t	tss_rsvd1;	/* reserved, ignored */
100 	uint32_t	tss_esp1;
101 	uint16_t	tss_ss1;
102 	uint16_t	tss_rsvd2;	/* reserved, ignored */
103 	uint32_t	tss_esp2;
104 	uint16_t	tss_ss2;
105 	uint16_t	tss_rsvd3;	/* reserved, ignored */
106 	uint32_t	tss_cr3;
107 	uint32_t	tss_eip;
108 	uint32_t	tss_eflags;
109 	uint32_t	tss_eax;
110 	uint32_t	tss_ecx;
111 	uint32_t	tss_edx;
112 	uint32_t	tss_ebx;
113 	uint32_t	tss_esp;
114 	uint32_t	tss_ebp;
115 	uint32_t	tss_esi;
116 	uint32_t	tss_edi;
117 	uint16_t	tss_es;
118 	uint16_t	tss_rsvd4;	/* reserved, ignored */
119 	uint16_t	tss_cs;
120 	uint16_t	tss_rsvd5;	/* reserved, ignored */
121 	uint16_t	tss_ss;
122 	uint16_t	tss_rsvd6;	/* reserved, ignored */
123 	uint16_t	tss_ds;
124 	uint16_t	tss_rsvd7;	/* reserved, ignored */
125 	uint16_t	tss_fs;
126 	uint16_t	tss_rsvd8;	/* reserved, ignored */
127 	uint16_t	tss_gs;
128 	uint16_t	tss_rsvd9;	/* reserved, ignored */
129 	uint16_t	tss_ldt;
130 	uint16_t	tss_rsvd10;	/* reserved, ignored */
131 	uint16_t	tss_rsvd11;	/* reserved, ignored */
132 	uint16_t	tss_bitmapbase;	/* io permission bitmap base address */
133 };
134 
135 #endif	/* __i386 */
136 
137 #endif	/* !_ASM */
138 
139 #ifdef	__cplusplus
140 }
141 #endif
142 
143 #endif	/* _SYS_TSS_H */
144