xref: /titanic_41/usr/src/uts/intel/sys/mc_intel.h (revision 75e21072b15921edb21066ef5eaa2e412b163266)
1 /*
2  * CDDL HEADER START
3  *
4  * The contents of this file are subject to the terms of the
5  * Common Development and Distribution License (the "License").
6  * You may not use this file except in compliance with the License.
7  *
8  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9  * or http://www.opensolaris.org/os/licensing.
10  * See the License for the specific language governing permissions
11  * and limitations under the License.
12  *
13  * When distributing Covered Code, include this CDDL HEADER in each
14  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15  * If applicable, add the following below this CDDL HEADER, with the
16  * fields enclosed by brackets "[]" replaced with your own identifying
17  * information: Portions Copyright [yyyy] [name of copyright owner]
18  *
19  * CDDL HEADER END
20  */
21 
22 /*
23  * Copyright 2009 Sun Microsystems, Inc.  All rights reserved.
24  * Use is subject to license terms.
25  */
26 
27 #ifndef _MC_INTEL_H
28 #define	_MC_INTEL_H
29 
30 #ifdef __cplusplus
31 extern "C" {
32 #endif
33 
34 #define	FM_EREPORT_CPU_INTEL	"intel"
35 
36 #define	MCINTEL_NVLIST_VERSTR	"mcintel-nvlist-version"
37 #define	MCINTEL_NVLIST_VERS0	0
38 
39 #define	MCINTEL_NVLIST_VERS	MCINTEL_NVLIST_VERS0
40 
41 #define	MCINTEL_NVLIST_MEM	"memory-controller"
42 #define	MCINTEL_NVLIST_NMEM	"memory-controllers"
43 #define	MCINTEL_NVLIST_MC	"memory-channels"
44 #define	MCINTEL_NVLIST_DIMMS	"memory-dimms"
45 #define	MCINTEL_NVLIST_DIMMSZ	"memory-dimm-size"
46 #define	MCINTEL_NVLIST_NRANKS	"dimm-max-ranks"
47 #define	MCINTEL_NVLIST_RANKS	"dimm-ranks"
48 #define	MCINTEL_NVLIST_ROWS	"dimm-rows"
49 #define	MCINTEL_NVLIST_COL	"dimm-column"
50 #define	MCINTEL_NVLIST_BANK	"dimm-banks"
51 #define	MCINTEL_NVLIST_WIDTH	"dimm-width"
52 #define	MCINTEL_NVLIST_MID	"dimm-manufacture-id"
53 #define	MCINTEL_NVLIST_MLOC	"dimm-manufacture-location"
54 #define	MCINTEL_NVLIST_MWEEK	"dimm-manufacture-week"
55 #define	MCINTEL_NVLIST_MYEAR	"dimm-manufacture-year"
56 #define	MCINTEL_NVLIST_SERIALNO	"dimm-serial-number"
57 #define	MCINTEL_NVLIST_PARTNO	"dimm-part-number"
58 #define	MCINTEL_NVLIST_REV	"dimm-part-rev"
59 
60 #define	FM_EREPORT_PAYLOAD_NAME_FERR_GLOBAL		"ferr_global"
61 #define	FM_EREPORT_PAYLOAD_NAME_NERR_GLOBAL		"nerr_global"
62 #define	FM_EREPORT_PAYLOAD_NAME_FSB			"fsb"
63 #define	FM_EREPORT_PAYLOAD_NAME_FERR_FAT_FSB		"ferr_fat_fsb"
64 #define	FM_EREPORT_PAYLOAD_NAME_NERR_FAT_FSB		"nerr_fat_fsb"
65 #define	FM_EREPORT_PAYLOAD_NAME_FERR_NF_FSB		"ferr_nf_fsb"
66 #define	FM_EREPORT_PAYLOAD_NAME_NERR_NF_FSB		"nerr_nf_fsb"
67 #define	FM_EREPORT_PAYLOAD_NAME_NRECFSB			"nrecfsb"
68 #define	FM_EREPORT_PAYLOAD_NAME_NRECFSB_ADDR		"nrecfsb_addr"
69 #define	FM_EREPORT_PAYLOAD_NAME_RECFSB			"recfsb"
70 #define	FM_EREPORT_PAYLOAD_NAME_PEX			"pex"
71 #define	FM_EREPORT_PAYLOAD_NAME_PEX_FAT_FERR		"pex_fat_ferr"
72 #define	FM_EREPORT_PAYLOAD_NAME_PEX_FAT_NERR		"pex_fat_nerr"
73 #define	FM_EREPORT_PAYLOAD_NAME_PEX_NF_CORR_FERR	"pex_nf_corr_ferr"
74 #define	FM_EREPORT_PAYLOAD_NAME_PEX_NF_CORR_NERR	"pex_nf_corr_nerr"
75 #define	FM_EREPORT_PAYLOAD_NAME_UNCERRSEV		"uncerrsev"
76 #define	FM_EREPORT_PAYLOAD_NAME_RPERRSTS		"rperrsts"
77 #define	FM_EREPORT_PAYLOAD_NAME_RPERRSID		"rperrsid"
78 #define	FM_EREPORT_PAYLOAD_NAME_UNCERRSTS		"uncerrsts"
79 #define	FM_EREPORT_PAYLOAD_NAME_AERRCAPCTRL		"aerrcapctrl"
80 #define	FM_EREPORT_PAYLOAD_NAME_CORERRSTS		"corerrsts"
81 #define	FM_EREPORT_PAYLOAD_NAME_PEXDEVSTS		"pexdevsts"
82 #define	FM_EREPORT_PAYLOAD_NAME_FERR_FAT_INT		"ferr_fat_int"
83 #define	FM_EREPORT_PAYLOAD_NAME_FERR_NF_INT		"ferr_nf_int"
84 #define	FM_EREPORT_PAYLOAD_NAME_NERR_FAT_INT		"nerr_fat_int"
85 #define	FM_EREPORT_PAYLOAD_NAME_NERR_NF_INT		"nerr_nf_int"
86 #define	FM_EREPORT_PAYLOAD_NAME_NRECINT			"nrecint"
87 #define	FM_EREPORT_PAYLOAD_NAME_RECINT			"recint"
88 #define	FM_EREPORT_PAYLOAD_NAME_NRECSF			"nrecsf"
89 #define	FM_EREPORT_PAYLOAD_NAME_RECSF			"recsf"
90 #define	FM_EREPORT_PAYLOAD_NAME_RANK			"rank"
91 #define	FM_EREPORT_PAYLOAD_NAME_BANK			"bank"
92 #define	FM_EREPORT_PAYLOAD_NAME_CAS			"cas"
93 #define	FM_EREPORT_PAYLOAD_NAME_RAS			"ras"
94 #define	FM_EREPORT_PAYLOAD_NAME_FERR_FAT_FBD		"ferr_fat_fbd"
95 #define	FM_EREPORT_PAYLOAD_NAME_NERR_FAT_FBD		"nerr_fat_fbd"
96 #define	FM_EREPORT_PAYLOAD_NAME_NRECMEMA		"nrecmema"
97 #define	FM_EREPORT_PAYLOAD_NAME_NRECMEMB		"nrecmemb"
98 #define	FM_EREPORT_PAYLOAD_NAME_NRECFGLOG		"nrecfglog"
99 #define	FM_EREPORT_PAYLOAD_NAME_NRECFBDA		"nrecfbda"
100 #define	FM_EREPORT_PAYLOAD_NAME_NRECFBDB		"nrecfbdb"
101 #define	FM_EREPORT_PAYLOAD_NAME_NRECFBDC		"nrecfbdc"
102 #define	FM_EREPORT_PAYLOAD_NAME_NRECFBDD		"nrecfbdd"
103 #define	FM_EREPORT_PAYLOAD_NAME_NRECFBDE		"nrecfbde"
104 #define	FM_EREPORT_PAYLOAD_NAME_NRECFBDF		"nrecfbdf"
105 #define	FM_EREPORT_PAYLOAD_NAME_SPCPC			"spcpc"
106 #define	FM_EREPORT_PAYLOAD_NAME_SPCPS			"spcps"
107 #define	FM_EREPORT_PAYLOAD_NAME_UERRCNT			"uerrcnt"
108 #define	FM_EREPORT_PAYLOAD_NAME_UERRCNT_LAST		"uerrcnt_last"
109 #define	FM_EREPORT_PAYLOAD_NAME_BADRAMA			"badrama"
110 #define	FM_EREPORT_PAYLOAD_NAME_BADRAMB			"badramb"
111 #define	FM_EREPORT_PAYLOAD_NAME_BADCNT			"badcnt"
112 #define	FM_EREPORT_PAYLOAD_NAME_MC			"mc"
113 #define	FM_EREPORT_PAYLOAD_NAME_MCA			"mca"
114 #define	FM_EREPORT_PAYLOAD_NAME_TOLM			"tolm"
115 #define	FM_EREPORT_PAYLOAD_NAME_MIR			"mir"
116 #define	FM_EREPORT_PAYLOAD_NAME_MTR			"mtr"
117 #define	FM_EREPORT_PAYLOAD_NAME_DMIR			"dmir"
118 #define	FM_EREPORT_PAYLOAD_NAME_FERR_NF_FBD		"ferr_nf_fbd"
119 #define	FM_EREPORT_PAYLOAD_NAME_NERR_NF_FBD		"nerr_nf_fbd"
120 #define	FM_EREPORT_PAYLOAD_NAME_RECMEMA			"recmema"
121 #define	FM_EREPORT_PAYLOAD_NAME_RECMEMB			"recmemb"
122 #define	FM_EREPORT_PAYLOAD_NAME_RECFGLOG		"recfglog"
123 #define	FM_EREPORT_PAYLOAD_NAME_RECFBDA			"recfbda"
124 #define	FM_EREPORT_PAYLOAD_NAME_RECFBDB			"recfbdb"
125 #define	FM_EREPORT_PAYLOAD_NAME_RECFBDC			"recfbdc"
126 #define	FM_EREPORT_PAYLOAD_NAME_RECFBDD			"recfbdd"
127 #define	FM_EREPORT_PAYLOAD_NAME_RECFBDE			"recfbde"
128 #define	FM_EREPORT_PAYLOAD_NAME_RECFBDF			"recfbdf"
129 #define	FM_EREPORT_PAYLOAD_NAME_CERRCNT			"cerrcnt"
130 #define	FM_EREPORT_PAYLOAD_NAME_CERRCNT_LAST		"cerrcnt_last"
131 #define	FM_EREPORT_PAYLOAD_NAME_CERRCNTA		"cerrcnta"
132 #define	FM_EREPORT_PAYLOAD_NAME_CERRCNTB		"cerrcntb"
133 #define	FM_EREPORT_PAYLOAD_NAME_CERRCNTC		"cerrcntc"
134 #define	FM_EREPORT_PAYLOAD_NAME_CERRCNTD		"cerrcntd"
135 #define	FM_EREPORT_PAYLOAD_NAME_CERRCNTA_LAST		"cerrcnta_last"
136 #define	FM_EREPORT_PAYLOAD_NAME_CERRCNTB_LAST		"cerrcntb_last"
137 #define	FM_EREPORT_PAYLOAD_NAME_CERRCNTC_LAST		"cerrcntc_last"
138 #define	FM_EREPORT_PAYLOAD_NAME_CERRCNTD_LAST		"cerrcntd_last"
139 #define	FM_EREPORT_PAYLOAD_NAME_PCISTS			"pcists"
140 #define	FM_EREPORT_PAYLOAD_NAME_PEXDEVSTS		"pexdevsts"
141 #define	FM_EREPORT_PAYLOAD_NAME_ERROR_NO		"intel-error-list"
142 
143 #define	FM_EREPORT_PAYLOAD_NAME_CTSTS			"ctsts"
144 #define	FM_EREPORT_PAYLOAD_NAME_THRTSTS			"thrtsts"
145 #define	FM_EREPORT_PAYLOAD_NAME_FERR_FAT_THR		"ferr_fat_thr"
146 #define	FM_EREPORT_PAYLOAD_NAME_NERR_FAT_THR		"nerr_fat_thr"
147 #define	FM_EREPORT_PAYLOAD_NAME_FERR_NF_THR		"ferr_nf_thr"
148 #define	FM_EREPORT_PAYLOAD_NAME_NERR_NF_THR		"nerr_nf_thr"
149 
150 #define	FM_EREPORT_PAYLOAD_NAME_ADDR			"addr"
151 #define	FM_EREPORT_PAYLOAD_NAME_BANK_NUM		"bank-number"
152 #define	FM_EREPORT_PAYLOAD_NAME_BANK_MISC		"bank-misc"
153 #define	FM_EREPORT_PAYLOAD_NAME_BANK_STAT		"bank-status"
154 #define	FM_EREPORT_PAYLOAD_NAME_BANK_OFFSET		"bank-offset"
155 #define	FM_EREPORT_PAYLOAD_NAME_MC_TYPE			"mc-type"
156 #define	FM_EREPORT_PAYLOAD_CPUID			"cpuid"
157 
158 #define	FM_EREPORT_PAYLOAD_BQR				"Bus-queue-request"
159 #define	FM_EREPORT_PAYLOAD_BQET				"Bus-queue-error-type"
160 #define	FM_EREPORT_PAYLOAD_FRC				"FRC-error"
161 #define	FM_EREPORT_PAYLOAD_BERR				"BERR"
162 #define	FM_EREPORT_PAYLOAD_INT_BINT			"Internal-BINT"
163 #define	FM_EREPORT_PAYLOAD_EXT_BINT			"External-BINT"
164 #define	FM_EREPORT_PAYLOAD_BUS_BINT			"Bus-BINT"
165 #define	FM_EREPORT_PAYLOAD_TO_BINT			"Timeout-BINT"
166 #define	FM_EREPORT_PAYLOAD_HARD				"Hard-error"
167 #define	FM_EREPORT_PAYLOAD_IERR				"IERR"
168 #define	FM_EREPORT_PAYLOAD_AERR				"AERR"
169 #define	FM_EREPORT_PAYLOAD_UERR				"UERR"
170 #define	FM_EREPORT_PAYLOAD_CECC				"CECC"
171 #define	FM_EREPORT_PAYLOAD_UECC				"UECC"
172 #define	FM_EREPORT_PAYLOAD_ECC_SYND			"ECC-syndrome"
173 
174 #define	FM_EREPORT_PAYLOAD_FSB_PARITY			"fsb-address-parity"
175 #define	FM_EREPORT_PAYLOAD_RESP_HF			"response-hard-fail"
176 #define	FM_EREPORT_PAYLOAD_RESP_PARITY			"response-parity"
177 #define	FM_EREPORT_PAYLOAD_DATA_PARITY			"bus-data-parity"
178 #define	FM_EREPORT_PAYLOAD_INV_PIC			"invalid-pic-request"
179 #define	FM_EREPORT_PAYLOAD_PAD_SM			"pad-state-machine"
180 #define	FM_EREPORT_PAYLOAD_PAD_SG			"pad-strobe-glitch"
181 
182 #define	FM_EREPORT_PAYLOAD_TAG				"tag-error"
183 #define	FM_EREPORT_PAYLOAD_TAG_CLEAN			"clean"
184 #define	FM_EREPORT_PAYLOAD_TAG_HIT			"hit"
185 #define	FM_EREPORT_PAYLOAD_TAG_MISS			"miss"
186 #define	FM_EREPORT_PAYLOAD_DATA				"data-error"
187 #define	FM_EREPORT_PAYLOAD_DATA_SINGLE			"single-bit"
188 #define	FM_EREPORT_PAYLOAD_DATA_DBL_CLEAN		"double-bit-clean"
189 #define	FM_EREPORT_PAYLOAD_DATA_DBL_MOD			"double-bit-modified"
190 #define	FM_EREPORT_PAYLOAD_L3				"l3-cache"
191 #define	FM_EREPORT_PAYLOAD_INV_PIC			"invalid-pic-request"
192 #define	FM_EREPORT_PAYLOAD_CACHE_NERRORS		"cache-error-count"
193 
194 #define	FM_EREPORT_PAYLOAD_NAME_RESOURCE		"resource"
195 #define	FM_EREPORT_PAYLOAD_MEM_ECC_COUNTER_THIS	"mem_cor_ecc_counter"
196 #define	FM_EREPORT_PAYLOAD_MEM_ECC_COUNTER_LAST	"mem_cor_ecc_counter_last"
197 
198 #define	INTEL_NB_5000P	0x25d88086
199 #define	INTEL_NB_5000V	0x25d48086
200 #define	INTEL_NB_5000X	0x25c08086
201 #define	INTEL_NB_5000Z	0x25d08086
202 #define	INTEL_NB_5400	0x40008086
203 #define	INTEL_NB_5400A	0x40018086
204 #define	INTEL_NB_5400B	0x40038086
205 #define	INTEL_NB_7300	0x36008086
206 
207 #define	INTEL_NHM	0x2c408086
208 #define	INTEL_QP_IO	0x34008086
209 #define	INTEL_QP_36D	0x34068086
210 #define	INTEL_QP_24D	0x34038086
211 #define	INTEL_QP_WP	0x34058086
212 #define	INTEL_QP_U1	0x34018086
213 #define	INTEL_QP_U2	0x34028086
214 #define	INTEL_QP_U3	0x34048086
215 #define	INTEL_QP_U4	0x34078086
216 
217 /* Intel QuickPath Bus Interconnect Errors */
218 
219 #define	MSR_MC_STATUS_QP_HEADER_PARITY		(1 << 16)
220 #define	MSR_MC_STATUS_QP_DATA_PARITY		(1 << 17)
221 #define	MSR_MC_STATUS_QP_RETRIES_EXCEEDED	(1 << 18)
222 #define	MSR_MC_STATUS_QP_POISON		(1 << 19)
223 
224 #define	MSR_MC_STATUS_QP_UNSUPPORTED_MSG	(1 << 22)
225 #define	MSR_MC_STATUS_QP_UNSUPPORTED_CREDIT	(1 << 23)
226 #define	MSR_MC_STATUS_QP_FLIT_BUF_OVER		(1 << 24)
227 #define	MSR_MC_STATUS_QP_FAILED_RESPONSE	(1 << 25)
228 #define	MSR_MC_STATUS_QP_CLOCK_JITTER		(1 << 26)
229 
230 #define	MSR_MC_MISC_QP_CLASS		0x000000ff
231 #define	MSR_MC_MISC_QP_RTID		0x00003f00
232 #define	MSR_MC_MISC_QP_RHNID		0x00070000
233 #define	MSR_MC_MISC_QP_IIB		0x01000000
234 
235 /* Intel QuickPath Memory Errors */
236 
237 #define	MCAX86_COMPOUND_BUS_MEMORY		0x0080
238 #define	MCAX86_COMPOUND_BUS_MEMORY_MASK		0xff80
239 #define	MCAX86_COMPOUND_BUS_MEMORY_TRANSACTION	0x0070
240 #define	MCAX86_COMPOUND_BUS_MEMORY_READ		0x0010
241 #define	MCAX86_COMPOUND_BUS_MEMORY_WRITE	0x0020
242 #define	MCAX86_COMPOUND_BUS_MEMORY_CMD		0x0030
243 #define	MCAX86_COMPOUND_BUS_MEMORY_CHANNEL	0x000f
244 
245 #define	MSR_MC_STATUS_MEM_ECC_READ	(1 << 16)
246 #define	MSR_MC_STATUS_MEM_ECC_SCRUB	(1 << 17)
247 #define	MSR_MC_STATUS_MEM_PARITY	(1 << 18)
248 #define	MSR_MC_STATUS_MEM_REDUNDANT_MEM	(1 << 19)
249 #define	MSR_MC_STATUS_MEM_SPARE_MEM	(1 << 20)
250 #define	MSR_MC_STATUS_MEM_ILLEGAL_ADDR	(1 << 21)
251 #define	MSR_MC_STATUS_MEM_BAD_ID	(1 << 22)
252 #define	MSR_MC_STATUS_MEM_ADDR_PARITY	(1 << 23)
253 #define	MSR_MC_STATUS_MEM_BYTE_PARITY	(1 << 24)
254 
255 #define	MSR_MC_MISC_MEM_RTID		0x00000000000000ffULL
256 #define	MSR_MC_MISC_MEM_DIMM		0x0000000000030000ULL
257 #define	MSR_MC_MISC_MEM_DIMM_SHIFT	16
258 #define	MSR_MC_MISC_MEM_CHANNEL		0x00000000000c0000ULL
259 #define	MSR_MC_MISC_MEM_CHANNEL_SHIFT	18
260 #define	MSR_MC_MISC_MEM_SYNDROME	0xffffffff00000000ULL
261 #define	MSR_MC_MISC_MEM_SYNDROME_SHIFT	32
262 
263 #ifdef __cplusplus
264 }
265 #endif
266 
267 #endif /* _MC_INTEL_H */
268