1 /******************************************************************************* 2 * 3 * Module Name: rsirq - IRQ resource descriptors 4 * 5 ******************************************************************************/ 6 7 /* 8 * Copyright (C) 2000 - 2011, Intel Corp. 9 * All rights reserved. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions, and the following disclaimer, 16 * without modification. 17 * 2. Redistributions in binary form must reproduce at minimum a disclaimer 18 * substantially similar to the "NO WARRANTY" disclaimer below 19 * ("Disclaimer") and any redistribution must be conditioned upon 20 * including a substantially similar Disclaimer requirement for further 21 * binary redistribution. 22 * 3. Neither the names of the above-listed copyright holders nor the names 23 * of any contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * Alternatively, this software may be distributed under the terms of the 27 * GNU General Public License ("GPL") version 2 as published by the Free 28 * Software Foundation. 29 * 30 * NO WARRANTY 31 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 32 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 33 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR 34 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 35 * HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 36 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 37 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 38 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 39 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING 40 * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 41 * POSSIBILITY OF SUCH DAMAGES. 42 */ 43 44 #define __RSIRQ_C__ 45 46 #include "acpi.h" 47 #include "accommon.h" 48 #include "acresrc.h" 49 50 #define _COMPONENT ACPI_RESOURCES 51 ACPI_MODULE_NAME ("rsirq") 52 53 54 /******************************************************************************* 55 * 56 * AcpiRsGetIrq 57 * 58 ******************************************************************************/ 59 60 ACPI_RSCONVERT_INFO AcpiRsGetIrq[8] = 61 { 62 {ACPI_RSC_INITGET, ACPI_RESOURCE_TYPE_IRQ, 63 ACPI_RS_SIZE (ACPI_RESOURCE_IRQ), 64 ACPI_RSC_TABLE_SIZE (AcpiRsGetIrq)}, 65 66 /* Get the IRQ mask (bytes 1:2) */ 67 68 {ACPI_RSC_BITMASK16,ACPI_RS_OFFSET (Data.Irq.Interrupts[0]), 69 AML_OFFSET (Irq.IrqMask), 70 ACPI_RS_OFFSET (Data.Irq.InterruptCount)}, 71 72 /* Set default flags (others are zero) */ 73 74 {ACPI_RSC_SET8, ACPI_RS_OFFSET (Data.Irq.Triggering), 75 ACPI_EDGE_SENSITIVE, 76 1}, 77 78 /* Get the descriptor length (2 or 3 for IRQ descriptor) */ 79 80 {ACPI_RSC_2BITFLAG, ACPI_RS_OFFSET (Data.Irq.DescriptorLength), 81 AML_OFFSET (Irq.DescriptorType), 82 0}, 83 84 /* All done if no flag byte present in descriptor */ 85 86 {ACPI_RSC_EXIT_NE, ACPI_RSC_COMPARE_AML_LENGTH, 0, 3}, 87 88 /* Get flags: Triggering[0], Polarity[3], Sharing[4] */ 89 90 {ACPI_RSC_1BITFLAG, ACPI_RS_OFFSET (Data.Irq.Triggering), 91 AML_OFFSET (Irq.Flags), 92 0}, 93 94 {ACPI_RSC_1BITFLAG, ACPI_RS_OFFSET (Data.Irq.Polarity), 95 AML_OFFSET (Irq.Flags), 96 3}, 97 98 {ACPI_RSC_1BITFLAG, ACPI_RS_OFFSET (Data.Irq.Sharable), 99 AML_OFFSET (Irq.Flags), 100 4} 101 }; 102 103 104 /******************************************************************************* 105 * 106 * AcpiRsSetIrq 107 * 108 ******************************************************************************/ 109 110 ACPI_RSCONVERT_INFO AcpiRsSetIrq[13] = 111 { 112 /* Start with a default descriptor of length 3 */ 113 114 {ACPI_RSC_INITSET, ACPI_RESOURCE_NAME_IRQ, 115 sizeof (AML_RESOURCE_IRQ), 116 ACPI_RSC_TABLE_SIZE (AcpiRsSetIrq)}, 117 118 /* Convert interrupt list to 16-bit IRQ bitmask */ 119 120 {ACPI_RSC_BITMASK16,ACPI_RS_OFFSET (Data.Irq.Interrupts[0]), 121 AML_OFFSET (Irq.IrqMask), 122 ACPI_RS_OFFSET (Data.Irq.InterruptCount)}, 123 124 /* Set the flags byte */ 125 126 {ACPI_RSC_1BITFLAG, ACPI_RS_OFFSET (Data.Irq.Triggering), 127 AML_OFFSET (Irq.Flags), 128 0}, 129 130 {ACPI_RSC_1BITFLAG, ACPI_RS_OFFSET (Data.Irq.Polarity), 131 AML_OFFSET (Irq.Flags), 132 3}, 133 134 {ACPI_RSC_1BITFLAG, ACPI_RS_OFFSET (Data.Irq.Sharable), 135 AML_OFFSET (Irq.Flags), 136 4}, 137 138 /* 139 * All done if the output descriptor length is required to be 3 140 * (i.e., optimization to 2 bytes cannot be attempted) 141 */ 142 {ACPI_RSC_EXIT_EQ, ACPI_RSC_COMPARE_VALUE, 143 ACPI_RS_OFFSET(Data.Irq.DescriptorLength), 144 3}, 145 146 /* Set length to 2 bytes (no flags byte) */ 147 148 {ACPI_RSC_LENGTH, 0, 0, sizeof (AML_RESOURCE_IRQ_NOFLAGS)}, 149 150 /* 151 * All done if the output descriptor length is required to be 2. 152 * 153 * TBD: Perhaps we should check for error if input flags are not 154 * compatible with a 2-byte descriptor. 155 */ 156 {ACPI_RSC_EXIT_EQ, ACPI_RSC_COMPARE_VALUE, 157 ACPI_RS_OFFSET(Data.Irq.DescriptorLength), 158 2}, 159 160 /* Reset length to 3 bytes (descriptor with flags byte) */ 161 162 {ACPI_RSC_LENGTH, 0, 0, sizeof (AML_RESOURCE_IRQ)}, 163 164 /* 165 * Check if the flags byte is necessary. Not needed if the flags are: 166 * ACPI_EDGE_SENSITIVE, ACPI_ACTIVE_HIGH, ACPI_EXCLUSIVE 167 */ 168 {ACPI_RSC_EXIT_NE, ACPI_RSC_COMPARE_VALUE, 169 ACPI_RS_OFFSET (Data.Irq.Triggering), 170 ACPI_EDGE_SENSITIVE}, 171 172 {ACPI_RSC_EXIT_NE, ACPI_RSC_COMPARE_VALUE, 173 ACPI_RS_OFFSET (Data.Irq.Polarity), 174 ACPI_ACTIVE_HIGH}, 175 176 {ACPI_RSC_EXIT_NE, ACPI_RSC_COMPARE_VALUE, 177 ACPI_RS_OFFSET (Data.Irq.Sharable), 178 ACPI_EXCLUSIVE}, 179 180 /* We can optimize to a 2-byte IrqNoFlags() descriptor */ 181 182 {ACPI_RSC_LENGTH, 0, 0, sizeof (AML_RESOURCE_IRQ_NOFLAGS)} 183 }; 184 185 186 /******************************************************************************* 187 * 188 * AcpiRsConvertExtIrq 189 * 190 ******************************************************************************/ 191 192 ACPI_RSCONVERT_INFO AcpiRsConvertExtIrq[9] = 193 { 194 {ACPI_RSC_INITGET, ACPI_RESOURCE_TYPE_EXTENDED_IRQ, 195 ACPI_RS_SIZE (ACPI_RESOURCE_EXTENDED_IRQ), 196 ACPI_RSC_TABLE_SIZE (AcpiRsConvertExtIrq)}, 197 198 {ACPI_RSC_INITSET, ACPI_RESOURCE_NAME_EXTENDED_IRQ, 199 sizeof (AML_RESOURCE_EXTENDED_IRQ), 200 0}, 201 202 /* Flag bits */ 203 204 {ACPI_RSC_1BITFLAG, ACPI_RS_OFFSET (Data.ExtendedIrq.ProducerConsumer), 205 AML_OFFSET (ExtendedIrq.Flags), 206 0}, 207 208 {ACPI_RSC_1BITFLAG, ACPI_RS_OFFSET (Data.ExtendedIrq.Triggering), 209 AML_OFFSET (ExtendedIrq.Flags), 210 1}, 211 212 {ACPI_RSC_1BITFLAG, ACPI_RS_OFFSET (Data.ExtendedIrq.Polarity), 213 AML_OFFSET (ExtendedIrq.Flags), 214 2}, 215 216 {ACPI_RSC_1BITFLAG, ACPI_RS_OFFSET (Data.ExtendedIrq.Sharable), 217 AML_OFFSET (ExtendedIrq.Flags), 218 3}, 219 220 /* IRQ Table length (Byte4) */ 221 222 {ACPI_RSC_COUNT, ACPI_RS_OFFSET (Data.ExtendedIrq.InterruptCount), 223 AML_OFFSET (ExtendedIrq.InterruptCount), 224 sizeof (UINT32)}, 225 226 /* Copy every IRQ in the table, each is 32 bits */ 227 228 {ACPI_RSC_MOVE32, ACPI_RS_OFFSET (Data.ExtendedIrq.Interrupts[0]), 229 AML_OFFSET (ExtendedIrq.Interrupts[0]), 230 0}, 231 232 /* Optional ResourceSource (Index and String) */ 233 234 {ACPI_RSC_SOURCEX, ACPI_RS_OFFSET (Data.ExtendedIrq.ResourceSource), 235 ACPI_RS_OFFSET (Data.ExtendedIrq.Interrupts[0]), 236 sizeof (AML_RESOURCE_EXTENDED_IRQ)} 237 }; 238 239 240 /******************************************************************************* 241 * 242 * AcpiRsConvertDma 243 * 244 ******************************************************************************/ 245 246 ACPI_RSCONVERT_INFO AcpiRsConvertDma[6] = 247 { 248 {ACPI_RSC_INITGET, ACPI_RESOURCE_TYPE_DMA, 249 ACPI_RS_SIZE (ACPI_RESOURCE_DMA), 250 ACPI_RSC_TABLE_SIZE (AcpiRsConvertDma)}, 251 252 {ACPI_RSC_INITSET, ACPI_RESOURCE_NAME_DMA, 253 sizeof (AML_RESOURCE_DMA), 254 0}, 255 256 /* Flags: transfer preference, bus mastering, channel speed */ 257 258 {ACPI_RSC_2BITFLAG, ACPI_RS_OFFSET (Data.Dma.Transfer), 259 AML_OFFSET (Dma.Flags), 260 0}, 261 262 {ACPI_RSC_1BITFLAG, ACPI_RS_OFFSET (Data.Dma.BusMaster), 263 AML_OFFSET (Dma.Flags), 264 2}, 265 266 {ACPI_RSC_2BITFLAG, ACPI_RS_OFFSET (Data.Dma.Type), 267 AML_OFFSET (Dma.Flags), 268 5}, 269 270 /* DMA channel mask bits */ 271 272 {ACPI_RSC_BITMASK, ACPI_RS_OFFSET (Data.Dma.Channels[0]), 273 AML_OFFSET (Dma.DmaChannelMask), 274 ACPI_RS_OFFSET (Data.Dma.ChannelCount)} 275 }; 276 277