xref: /titanic_41/usr/src/uts/intel/asm/cpu.h (revision 0485cf53f277ad1364b39e092bfa2480dbcac144)
1 /*
2  * CDDL HEADER START
3  *
4  * The contents of this file are subject to the terms of the
5  * Common Development and Distribution License (the "License").
6  * You may not use this file except in compliance with the License.
7  *
8  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9  * or http://www.opensolaris.org/os/licensing.
10  * See the License for the specific language governing permissions
11  * and limitations under the License.
12  *
13  * When distributing Covered Code, include this CDDL HEADER in each
14  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15  * If applicable, add the following below this CDDL HEADER, with the
16  * fields enclosed by brackets "[]" replaced with your own identifying
17  * information: Portions Copyright [yyyy] [name of copyright owner]
18  *
19  * CDDL HEADER END
20  */
21 /*
22  * Copyright 2009 Sun Microsystems, Inc.  All rights reserved.
23  * Use is subject to license terms.
24  */
25 
26 #ifndef _ASM_CPU_H
27 #define	_ASM_CPU_H
28 
29 #ifdef	__cplusplus
30 extern "C" {
31 #endif
32 
33 #if !defined(__lint) && defined(__GNUC__)
34 
35 #if defined(__i386) || defined(__amd64)
36 
37 extern __inline__ void ht_pause(void)
38 {
39 	__asm__ __volatile__(
40 	    "pause");
41 }
42 
43 #if !defined(__xpv)
44 
45 extern __inline__ void cli(void)
46 {
47 	__asm__ __volatile__(
48 	    "cli" : : : "memory");
49 }
50 
51 extern __inline__ void sti(void)
52 {
53 	__asm__ __volatile__(
54 	    "sti");
55 }
56 
57 extern __inline__ void i86_halt(void)
58 {
59 	__asm__ __volatile__(
60 	    "sti; hlt");
61 }
62 
63 #endif /* !__xpv */
64 
65 #endif	/* __i386 || defined(__amd64) */
66 
67 #if defined(__amd64)
68 
69 extern __inline__ void __set_ds(selector_t value)
70 {
71 	__asm__ __volatile__(
72 	    "movw	%0, %%ds"
73 	    : /* no output */
74 	    : "r" (value));
75 }
76 
77 extern __inline__ void __set_es(selector_t value)
78 {
79 	__asm__ __volatile__(
80 	    "movw	%0, %%es"
81 	    : /* no output */
82 	    : "r" (value));
83 }
84 
85 extern __inline__ void __set_fs(selector_t value)
86 {
87 	__asm__ __volatile__(
88 	    "movw	%0, %%fs"
89 	    : /* no output */
90 	    : "r" (value));
91 }
92 
93 extern __inline__ void __set_gs(selector_t value)
94 {
95 	__asm__ __volatile__(
96 	    "movw	%0, %%gs"
97 	    : /* no output */
98 	    : "r" (value));
99 }
100 
101 #if !defined(__xpv)
102 
103 extern __inline__ void __swapgs(void)
104 {
105 	__asm__ __volatile__(
106 	    "mfence; swapgs");
107 }
108 
109 #endif /* !__xpv */
110 
111 #endif	/* __amd64 */
112 
113 #endif	/* !__lint && __GNUC__ */
114 
115 #if !defined(__lint) && defined(__GNUC__)
116 
117 #if defined(__i386) || defined(__amd64)
118 
119 /*
120  * prefetch 64 bytes
121  * prefetch is an SSE extension which is not supported on
122  * older 32-bit processors, so define this as a no-op for now
123  */
124 
125 extern __inline__ void prefetch64(caddr_t addr)
126 {
127 #if defined(__amd64)
128 	__asm__ __volatile__(
129 	    "prefetcht0 (%0);"
130 	    "prefetcht0 32(%0)"
131 	    : /* no output */
132 	    : "r" (addr));
133 #endif	/* __amd64 */
134 }
135 
136 #endif	/* __i386 || __amd64 */
137 
138 #endif	/* !__lint && __GNUC__ */
139 
140 #ifdef	__cplusplus
141 }
142 #endif
143 
144 #endif	/* _ASM_CPU_H */
145