xref: /titanic_41/usr/src/uts/i86pc/sys/machsystm.h (revision 491d31d91dffec9b5f8abaf7728301a572326daa)
1 /*
2  * CDDL HEADER START
3  *
4  * The contents of this file are subject to the terms of the
5  * Common Development and Distribution License (the "License").
6  * You may not use this file except in compliance with the License.
7  *
8  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9  * or http://www.opensolaris.org/os/licensing.
10  * See the License for the specific language governing permissions
11  * and limitations under the License.
12  *
13  * When distributing Covered Code, include this CDDL HEADER in each
14  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15  * If applicable, add the following below this CDDL HEADER, with the
16  * fields enclosed by brackets "[]" replaced with your own identifying
17  * information: Portions Copyright [yyyy] [name of copyright owner]
18  *
19  * CDDL HEADER END
20  */
21 
22 /*
23  * Copyright (c) 2010, Oracle and/or its affiliates. All rights reserved.
24  */
25 /*
26  * Copyright (c) 2010, Intel Corporation.
27  * All rights reserved.
28  */
29 
30 #ifndef _SYS_MACHSYSTM_H
31 #define	_SYS_MACHSYSTM_H
32 
33 /*
34  * Numerous platform-dependent interfaces that don't seem to belong
35  * in any other header file.
36  *
37  * This file should not be included by code that purports to be
38  * platform-independent.
39  *
40  */
41 
42 #include <sys/machparam.h>
43 #include <sys/varargs.h>
44 #include <sys/thread.h>
45 #include <sys/cpuvar.h>
46 #include <sys/privregs.h>
47 #include <sys/systm.h>
48 #include <sys/traptrace.h>
49 #include <vm/page.h>
50 
51 #ifdef __cplusplus
52 extern "C" {
53 #endif
54 
55 #ifdef _KERNEL
56 
57 typedef enum mach_cpu_add_arg_type {
58 	MACH_CPU_ARG_LOCAL_APIC,
59 	MACH_CPU_ARG_LOCAL_X2APIC,
60 } mach_cpu_add_arg_type_t;
61 
62 typedef struct mach_cpu_add_arg {
63 	mach_cpu_add_arg_type_t		type;
64 	union {
65 		struct {
66 			uint32_t	apic_id;
67 			uint32_t	proc_id;
68 		} apic;
69 	} arg;
70 } mach_cpu_add_arg_t;
71 
72 extern void mach_cpu_idle(void);
73 extern void mach_cpu_halt(char *);
74 extern int mach_cpu_start(cpu_t *, void *);
75 extern int mach_cpuid_start(processorid_t, void *);
76 extern int mach_cpu_stop(cpu_t *, void *);
77 extern int mach_cpu_add(mach_cpu_add_arg_t *, processorid_t *);
78 extern int mach_cpu_remove(processorid_t);
79 extern int mach_cpu_create_device_node(cpu_t *, dev_info_t **);
80 extern int mach_cpu_get_device_node(cpu_t *, dev_info_t **);
81 
82 extern int Cpudelay;
83 extern void setcpudelay(void);
84 
85 extern void send_dirint(int, int);
86 extern void siron(void);
87 extern void sir_on(int);
88 
89 extern void return_instr(void);
90 
91 extern int kcpc_hw_load_pcbe(void);
92 extern void kcpc_hw_init(cpu_t *cp);
93 extern void kcpc_hw_fini(cpu_t *cp);
94 extern int kcpc_hw_overflow_intr_installed;
95 
96 struct panic_trap_info {
97 	struct regs *trap_regs;
98 	uint_t trap_type;
99 	caddr_t trap_addr;
100 };
101 
102 struct memconf {
103 	pfn_t	mcf_spfn;	/* begin page frame number */
104 	pfn_t	mcf_epfn;	/* end page frame number */
105 };
106 
107 struct system_hardware {
108 	int		hd_nodes;		/* number of nodes */
109 	int		hd_cpus_per_node; 	/* max cpus in a node */
110 	struct memconf 	hd_mem[MAXNODES];
111 						/*
112 						 * memory layout for each
113 						 * node.
114 						 */
115 };
116 extern struct system_hardware system_hardware;
117 extern void get_system_configuration(void);
118 extern void mmu_init(void);
119 extern int cpuid2nodeid(int);
120 extern void map_kaddr(caddr_t, pfn_t, int, int);
121 
122 extern void memscrub_init(void);
123 extern void trap(struct regs *, caddr_t, processorid_t);
124 
125 extern void do_interrupt(struct regs *, trap_trace_rec_t *);
126 extern void memscrub_disable(void);
127 
128 /*
129  * Interrupt handling hooks
130  */
131 extern void (*do_interrupt_common)(struct regs *, trap_trace_rec_t *);
132 extern uintptr_t (*get_intr_handler)(int, short);
133 
134 /*
135  * Dispatcher hooks.
136  */
137 void    (*idle_cpu)();
138 void    (*non_deep_idle_cpu)();
139 void    (*disp_enq_thread)(cpu_t *, int);
140 void    (*non_deep_idle_disp_enq_thread)(cpu_t *, int);
141 
142 #ifndef __xpv
143 extern unsigned int microdata;
144 #endif
145 
146 extern int use_mp;
147 
148 extern struct cpu	cpus[];		/* pointer to other cpus */
149 extern struct cpu	*cpu[];		/* pointer to all cpus */
150 
151 /* Operation types for extended mach_cpucontext interfaces */
152 #define	MACH_CPUCONTEXT_OP_START	0
153 #define	MACH_CPUCONTEXT_OP_STOP		1
154 
155 extern int mach_cpucontext_init(void);
156 extern void mach_cpucontext_fini(void);
157 extern void *mach_cpucontext_alloc(struct cpu *);
158 extern void mach_cpucontext_free(struct cpu *, void *, int);
159 extern void *mach_cpucontext_xalloc(struct cpu *, int);
160 extern void mach_cpucontext_xfree(struct cpu *, void *, int, int);
161 extern void rmp_gdt_init(rm_platter_t *);
162 
163 extern uintptr_t hole_start, hole_end;
164 
165 #define	INVALID_VADDR(a)	\
166 	(((a) >= (caddr_t)hole_start && (a) < (caddr_t)hole_end))
167 
168 /* kpm mapping window */
169 extern size_t   kpm_size;
170 extern uchar_t  kpm_size_shift;
171 extern caddr_t  kpm_vbase;
172 
173 struct memlist;
174 extern void memlist_add(uint64_t, uint64_t, struct memlist *,
175     struct memlist **);
176 extern page_t *page_get_physical(uintptr_t seed);
177 extern int linear_pc(struct regs *rp, proc_t *p, caddr_t *linearp);
178 extern int dtrace_linear_pc(struct regs *rp, proc_t *p, caddr_t *linearp);
179 
180 extern int force_shutdown_method;
181 
182 /* Dynamic Reconfiguration capability interface. */
183 #define	PLAT_DR_OPTIONS_NAME		"plat-dr-options"
184 #define	PLAT_DR_PHYSMAX_NAME		"plat-dr-physmax"
185 #define	PLAT_MAX_NCPUS_NAME		"plat-max-ncpus"
186 #define	BOOT_MAX_NCPUS_NAME		"boot-max-ncpus"
187 #define	BOOT_NCPUS_NAME			"boot-ncpus"
188 
189 #define	PLAT_DR_FEATURE_CPU		0x1
190 #define	PLAT_DR_FEATURE_MEMORY		0x2
191 #define	PLAT_DR_FEATURE_ENABLED		0x1000000
192 
193 #define	plat_dr_enabled()		\
194 	plat_dr_check_capability(PLAT_DR_FEATURE_ENABLED)
195 
196 #define	plat_dr_enable()		\
197 	plat_dr_enable_capability(PLAT_DR_FEATURE_ENABLED)
198 
199 #define	plat_dr_disable_cpu()		\
200 	plat_dr_disable_capability(PLAT_DR_FEATURE_CPU)
201 #define	plat_dr_disable_memory()	\
202 	plat_dr_disable_capability(PLAT_DR_FEATURE_MEMORY)
203 
204 extern boolean_t plat_dr_support_cpu(void);
205 extern boolean_t plat_dr_support_memory(void);
206 extern boolean_t plat_dr_check_capability(uint64_t features);
207 extern void plat_dr_enable_capability(uint64_t features);
208 extern void plat_dr_disable_capability(uint64_t features);
209 
210 #pragma	weak plat_dr_support_cpu
211 #pragma	weak plat_dr_support_memory
212 
213 /*
214  * Used to communicate DR updates to platform lgroup framework
215  */
216 typedef struct {
217 	uint64_t	u_base;
218 	uint64_t	u_length;
219 	uint32_t	u_domain;
220 	uint32_t	u_device_id;
221 	uint32_t	u_sli_cnt;
222 	uchar_t		*u_sli_ptr;
223 } update_membounds_t;
224 
225 /* Maximum physical page number (PFN) for memory DR operations. */
226 extern uint64_t plat_dr_physmax;
227 
228 #ifdef __xpv
229 #include <sys/xen_mmu.h>
230 extern page_t *page_get_high_mfn(mfn_t);
231 #endif
232 
233 
234 #endif /* _KERNEL */
235 
236 #ifdef __cplusplus
237 }
238 #endif
239 
240 #endif	/* _SYS_MACHSYSTM_H */
241