1 /* 2 * CDDL HEADER START 3 * 4 * The contents of this file are subject to the terms of the 5 * Common Development and Distribution License (the "License"). 6 * You may not use this file except in compliance with the License. 7 * 8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 9 * or http://www.opensolaris.org/os/licensing. 10 * See the License for the specific language governing permissions 11 * and limitations under the License. 12 * 13 * When distributing Covered Code, include this CDDL HEADER in each 14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 15 * If applicable, add the following below this CDDL HEADER, with the 16 * fields enclosed by brackets "[]" replaced with your own identifying 17 * information: Portions Copyright [yyyy] [name of copyright owner] 18 * 19 * CDDL HEADER END 20 */ 21 /* 22 * Copyright 2007 Sun Microsystems, Inc. All rights reserved. 23 * Use is subject to license terms. 24 */ 25 26 #ifndef _SYS_MACHCPUVAR_H 27 #define _SYS_MACHCPUVAR_H 28 29 #pragma ident "%Z%%M% %I% %E% SMI" 30 31 #ifdef __cplusplus 32 extern "C" { 33 #endif 34 35 #include <sys/inttypes.h> 36 #include <sys/xc_levels.h> 37 #include <sys/tss.h> 38 #include <sys/segments.h> 39 #include <sys/rm_platter.h> 40 #include <sys/avintr.h> 41 #include <sys/pte.h> 42 43 #ifndef _ASM 44 /* 45 * On a virtualized platform a virtual cpu may not be actually 46 * on a physical cpu, especially in situations where a configuration has 47 * more vcpus than pcpus. This function tells us (if it's able) if the 48 * specified vcpu is currently running on a pcpu. Note if it is not 49 * known or not able to determine, it will return the unknown state. 50 */ 51 #define VCPU_STATE_UNKNOWN 0 52 #define VCPU_ON_PCPU 1 53 #define VCPU_NOT_ON_PCPU 2 54 55 extern int vcpu_on_pcpu(processorid_t); 56 57 /* 58 * Machine specific fields of the cpu struct 59 * defined in common/sys/cpuvar.h. 60 * 61 * Note: This is kinda kludgy but seems to be the best 62 * of our alternatives. 63 */ 64 typedef void *cpu_pri_lev_t; 65 66 struct cpuid_info; 67 struct cpu_ucode_info; 68 69 /* 70 * A note about the hypervisor affinity bits: a one bit in the affinity mask 71 * means the corresponding event channel is allowed to be serviced 72 * by this cpu. 73 */ 74 struct xen_evt_data { 75 ulong_t pending_sel[PIL_MAX + 1]; /* event array selectors */ 76 ulong_t pending_evts[PIL_MAX + 1][sizeof (ulong_t) * 8]; 77 ulong_t evt_affinity[sizeof (ulong_t) * 8]; /* service on cpu */ 78 }; 79 80 struct machcpu { 81 /* define all the x_call stuff */ 82 volatile int xc_pend[X_CALL_LEVELS]; 83 volatile int xc_wait[X_CALL_LEVELS]; 84 volatile int xc_ack[X_CALL_LEVELS]; 85 volatile int xc_state[X_CALL_LEVELS]; 86 volatile int xc_retval[X_CALL_LEVELS]; 87 88 int mcpu_nodeid; /* node-id */ 89 int mcpu_pri; /* CPU priority */ 90 cpu_pri_lev_t mcpu_pri_data; /* ptr to machine dependent */ 91 /* data for setting priority */ 92 /* level */ 93 94 struct hat *mcpu_current_hat; /* cpu's current hat */ 95 96 struct hat_cpu_info *mcpu_hat_info; 97 98 volatile ulong_t mcpu_tlb_info; 99 100 /* i86 hardware table addresses that cannot be shared */ 101 102 user_desc_t *mcpu_gdt; /* GDT */ 103 gate_desc_t *mcpu_idt; /* current IDT */ 104 105 struct tss *mcpu_tss; /* TSS */ 106 107 kmutex_t mcpu_ppaddr_mutex; 108 caddr_t mcpu_caddr1; /* per cpu CADDR1 */ 109 caddr_t mcpu_caddr2; /* per cpu CADDR2 */ 110 uint64_t mcpu_caddr1pte; 111 uint64_t mcpu_caddr2pte; 112 113 struct softint mcpu_softinfo; 114 uint64_t pil_high_start[HIGH_LEVELS]; 115 uint64_t intrstat[PIL_MAX + 1][2]; 116 117 struct cpuid_info *mcpu_cpi; 118 119 #if defined(__amd64) 120 greg_t mcpu_rtmp_rsp; /* syscall: temporary %rsp stash */ 121 greg_t mcpu_rtmp_r15; /* syscall: temporary %r15 stash */ 122 #endif 123 124 struct vcpu_info *mcpu_vcpu_info; 125 uint64_t mcpu_gdtpa; /* hypervisor: GDT physical address */ 126 127 uint16_t mcpu_intr_pending; /* hypervisor: pending intrpt levels */ 128 struct xen_evt_data *mcpu_evt_pend; /* hypervisor: pending events */ 129 130 volatile uint32_t *mcpu_mwait; /* MONITOR/MWAIT buffer */ 131 132 struct cpu_ucode_info *mcpu_ucode_info; 133 }; 134 135 #define NINTR_THREADS (LOCK_LEVEL-1) /* number of interrupt threads */ 136 #define MWAIT_HALTED (1) /* mcpu_mwait set when halting */ 137 #define MWAIT_RUNNING (0) /* mcpu_mwait set to wakeup */ 138 #define MWAIT_WAKEUP(cpu) (*((cpu)->cpu_m.mcpu_mwait) = MWAIT_RUNNING); 139 140 #endif /* _ASM */ 141 142 /* Please DON'T add any more of this namespace-poisoning sewage here */ 143 144 #define cpu_nodeid cpu_m.mcpu_nodeid 145 #define cpu_pri cpu_m.mcpu_pri 146 #define cpu_pri_data cpu_m.mcpu_pri_data 147 #define cpu_current_hat cpu_m.mcpu_current_hat 148 #define cpu_hat_info cpu_m.mcpu_hat_info 149 #define cpu_ppaddr_mutex cpu_m.mcpu_ppaddr_mutex 150 #define cpu_gdt cpu_m.mcpu_gdt 151 #define cpu_idt cpu_m.mcpu_idt 152 #define cpu_tss cpu_m.mcpu_tss 153 #define cpu_ldt cpu_m.mcpu_ldt 154 #define cpu_caddr1 cpu_m.mcpu_caddr1 155 #define cpu_caddr2 cpu_m.mcpu_caddr2 156 #define cpu_softinfo cpu_m.mcpu_softinfo 157 #define cpu_caddr1pte cpu_m.mcpu_caddr1pte 158 #define cpu_caddr2pte cpu_m.mcpu_caddr2pte 159 160 #ifdef __cplusplus 161 } 162 #endif 163 164 #endif /* _SYS_MACHCPUVAR_H */ 165