1 /* 2 * CDDL HEADER START 3 * 4 * The contents of this file are subject to the terms of the 5 * Common Development and Distribution License (the "License"). 6 * You may not use this file except in compliance with the License. 7 * 8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 9 * or http://www.opensolaris.org/os/licensing. 10 * See the License for the specific language governing permissions 11 * and limitations under the License. 12 * 13 * When distributing Covered Code, include this CDDL HEADER in each 14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 15 * If applicable, add the following below this CDDL HEADER, with the 16 * fields enclosed by brackets "[]" replaced with your own identifying 17 * information: Portions Copyright [yyyy] [name of copyright owner] 18 * 19 * CDDL HEADER END 20 */ 21 /* 22 * Copyright (c) 2010, Oracle and/or its affiliates. All rights reserved. 23 */ 24 25 #ifndef __SYS_APIX_APIX_H 26 #define __SYS_APIX_APIX_H 27 28 #include <sys/note.h> 29 #include <sys/avintr.h> 30 #include <sys/traptrace.h> 31 #include <sys/apic.h> 32 #include <sys/apic_common.h> 33 34 #ifdef __cplusplus 35 extern "C" { 36 #endif 37 38 #ifdef DEBUG 39 #ifndef TRAPTRACE 40 #define TRAPTRACE 41 #endif 42 #endif 43 44 #define APIX_NAME "apix" 45 46 #define APIX_NVECTOR 256 /* max number of per-cpu vectors */ 47 #define APIX_NIRQ 256 /* maximum number of IRQs */ 48 #define APIX_INVALID_VECT 0 /* invalid vector */ 49 50 /* vector type */ 51 #define APIX_TYPE_FIXED DDI_INTR_TYPE_FIXED /* 1 */ 52 #define APIX_TYPE_MSI DDI_INTR_TYPE_MSI /* 2 */ 53 #define APIX_TYPE_MSIX DDI_INTR_TYPE_MSIX /* 4 */ 54 #define APIX_TYPE_IPI 8 55 56 /* vector states */ 57 enum { 58 APIX_STATE_FREED = 0, 59 APIX_STATE_OBSOLETED, /* 1 */ 60 APIX_STATE_ALLOCED, /* 2 */ 61 APIX_STATE_ENABLED, /* 3 */ 62 APIX_STATE_DISABLED /* 4 */ 63 }; 64 #define IS_VECT_FREE(p) \ 65 (((p) == NULL) || ((p)->v_state == APIX_STATE_FREED)) 66 #define IS_VECT_OBSOL(p) \ 67 (((p) != NULL) && ((p)->v_state == APIX_STATE_OBSOLETED)) 68 #define IS_VECT_ENABLED(p) \ 69 (((p) != NULL) && ((p)->v_state == APIX_STATE_ENABLED)) 70 71 /* flags */ 72 #define APIX_VECT_USER_BOUND 0x1 73 #define APIX_VECT_MASKABLE 0x2 74 75 /* 76 * Number of interrupt vectors reserved by software on each LOCAL APIC: 77 * 1. Dtrace 78 * 2. int80 79 * 3. system-call 80 * 4. fast-trap 81 * 5. apix-reserved 82 */ 83 #define APIX_SW_RESERVED_VECTORS 5 84 85 /* 86 * Macros to help deal with shared interrupts and to differentiate 87 * between vector and irq number when passing arguments to interfaces 88 * xxx_avintr() 89 */ 90 #define APIX_VIRTVEC_VECMASK 0xff 91 #define APIX_VIRTVEC_FLAG 0x80000000 92 #define APIX_VIRTVECTOR(cpuid, v) \ 93 (APIX_VIRTVEC_FLAG | ((cpuid) << 8) | (v)) 94 #define APIX_IS_VIRTVEC(vv) \ 95 ((vv) & APIX_VIRTVEC_FLAG) 96 #define APIX_VIRTVEC_VECTOR(vv) \ 97 (((uchar_t)(vv)) & APIX_VIRTVEC_VECMASK) 98 #define APIX_VIRTVEC_CPU(vv) \ 99 (((uint32_t)(vv) & ~APIX_VIRTVEC_FLAG) >> 8) 100 101 struct apix_dev_vector; 102 typedef struct apix_vector { 103 ushort_t v_state; 104 ushort_t v_type; /* interrupt type */ 105 processorid_t v_cpuid; /* current target cpu */ 106 uchar_t v_vector; /* vector */ 107 uchar_t v_share; /* intrs at this vector */ 108 int v_inum; /* irq for fixed, inum for msi/x */ 109 uint_t v_flags; 110 processorid_t v_bound_cpuid; /* binding cpu */ 111 uint_t v_busy; /* How frequently did clock */ 112 /* find us in this */ 113 uint_t v_pri; /* maximum priority */ 114 struct autovec *v_autovect; /* ISR linked list */ 115 void *v_intrmap_private; /* intr remap data */ 116 struct apix_dev_vector *v_devp; /* pointer to device */ 117 struct apix_vector *v_next; /* next on per-cpu obosoletes chain */ 118 } apix_vector_t; 119 120 typedef struct apix_impl { 121 processorid_t x_cpuid; /* cpu number */ 122 123 uint16_t x_intr_pending; /* pending intr by IPL */ 124 /* pointer to head of interrupt pending list */ 125 struct autovec *x_intr_head[PIL_MAX + 1]; 126 /* pointer to tail of interrupt pending list */ 127 struct autovec *x_intr_tail[PIL_MAX + 1]; 128 129 apix_vector_t *x_obsoletes; /* obosoleted vectors */ 130 apix_vector_t *x_vectbl[APIX_NVECTOR]; /* vector table */ 131 132 lock_t x_lock; 133 } apix_impl_t; 134 135 #define HILEVEL_PENDING(cpu) \ 136 (apixs[(cpu)->cpu_id]->x_intr_pending & CPU_INTR_ACTV_HIGH_LEVEL_MASK) 137 #define LOWLEVEL_PENDING(cpu) \ 138 (apixs[(cpu)->cpu_id]->x_intr_pending & ~CPU_INTR_ACTV_HIGH_LEVEL_MASK) 139 #define IS_HILEVEL_RUNNING(cpu) \ 140 (((ushort_t)((cpu)->intr_actv)) & CPU_INTR_ACTV_HIGH_LEVEL_MASK) 141 #define IS_LOWLEVEL_RUNNING(cpu) \ 142 (((ushort_t)((cpu)->intr_actv)) & ~CPU_INTR_ACTV_HIGH_LEVEL_MASK) 143 144 #define INTR_PENDING(apixp, ipl) \ 145 ((ipl) <= LOCK_LEVEL ? \ 146 ((apixp)->x_intr_pending & (1 << (ipl))) : \ 147 ((apixp)->x_intr_pending >> (LOCK_LEVEL + 1))) 148 149 /* 150 * We need a way to find allocated vector for a device. One option 151 * is to maintain a mapping table in pcplusmp. Another option would 152 * be to record vector or irq with interrupt handler hdlp->ih_vector or 153 * hdlp->ih_irq. 154 * Second option requires interface changes, such as, a new interface 155 * for noticing vector changes caused by interrupt re-targeting. 156 * Currently we choose the first option cause it doesn't require 157 * new interfaces. 158 */ 159 typedef struct apix_dev_vector { 160 dev_info_t *dv_dip; 161 int dv_inum; /* interrupt number */ 162 int dv_type; /* interrupt type */ 163 apix_vector_t *dv_vector; /* vector */ 164 struct apix_dev_vector *dv_next; /* per major chain */ 165 } apix_dev_vector_t; 166 167 extern lock_t apix_lock; 168 extern apix_impl_t *apixs[]; 169 extern int apix_nipis; 170 extern int apix_cpu_nvectors; 171 extern apix_dev_vector_t **apix_dev_vector; 172 extern processorid_t *apix_major_to_cpu; 173 extern kmutex_t apix_mutex; 174 175 #define xv_vector(cpu, v) apixs[(cpu)]->x_vectbl[(v)] 176 #define xv_intrmap_private(cpu, v) (xv_vector(cpu, v))->v_intrmap_private 177 178 #define APIX_IPI_MAX APIC_MAX_VECTOR 179 #define APIX_IPI_MIN (APIX_NVECTOR - apix_nipis) 180 #define APIX_AVINTR_MIN 0x20 181 #define APIX_NAVINTR \ 182 (apix_cpu_nvectors - apix_nipis - APIX_AVINTR_MIN) 183 #define APIX_AVINTR_MAX \ 184 ((APIX_NAVINTR <= 0) ? 0 : \ 185 (((APIX_AVINTR_MIN + APIX_NAVINTR) > APIX_IPI_MIN) ? \ 186 (APIX_IPI_MIN - 2) : \ 187 (APIX_AVINTR_MIN + APIX_NAVINTR - 2))) 188 #define APIX_RESV_VECTOR (APIX_AVINTR_MAX + 1) 189 190 #define IS_VALID_AVINTR(v) \ 191 ((v) >= APIX_AVINTR_MIN && (v) <= APIX_AVINTR_MAX) 192 193 #define APIX_ENTER_CPU_LOCK(cpuid) lock_set(&apixs[(cpuid)]->x_lock) 194 #define APIX_LEAVE_CPU_LOCK(cpuid) lock_clear(&apixs[(cpuid)]->x_lock) 195 #define APIX_CPU_LOCK_HELD(cpuid) LOCK_HELD(&apixs[(cpuid)]->x_lock) 196 197 /* Get dip for msi/x */ 198 #define APIX_GET_DIP(v) \ 199 ((v)->v_devp->dv_dip) 200 201 /* 202 * For irq 203 */ 204 extern apic_irq_t *apic_irq_table[APIC_MAX_VECTOR+1]; 205 #define IS_IRQ_FREE(p) \ 206 ((p) == NULL || ((p)->airq_mps_intr_index == FREE_INDEX)) 207 208 #define UNREFERENCED_1PARAMETER(_p) _NOTE(ARGUNUSED(_p)) 209 #define UNREFERENCED_3PARAMETER(_p, _q, _r) _NOTE(ARGUNUSED(_p, _q, _r)) 210 211 /* 212 * From mp_platform_common.c 213 */ 214 extern int apic_intr_policy; 215 extern iflag_t apic_sci_flags; 216 extern int apic_hpet_vect; 217 extern iflag_t apic_hpet_flags; 218 extern int apic_redist_cpu_skip; 219 extern int apic_num_imbalance; 220 extern int apic_num_rebind; 221 extern struct apic_io_intr *apic_io_intrp; 222 extern int apic_use_acpi_madt_only; 223 extern uint32_t eisa_level_intr_mask; 224 extern int apic_pci_bus_total; 225 extern uchar_t apic_single_pci_busid; 226 227 extern ACPI_MADT_INTERRUPT_OVERRIDE *acpi_isop; 228 extern int acpi_iso_cnt; 229 230 extern int apic_defconf; 231 extern int apic_irq_translate; 232 233 extern int apic_max_reps_clear_pending; 234 235 extern int apic_probe_common(char *modname); 236 extern uchar_t acpi_find_ioapic(int irq); 237 extern int apic_find_bus_id(int bustype); 238 extern int apic_find_intin(uchar_t ioapic, uchar_t intin); 239 extern struct apic_io_intr *apic_find_io_intr_w_busid(int irqno, int busid); 240 extern int apic_acpi_translate_pci_irq(dev_info_t *dip, int busid, int devid, 241 int ipin, int *pci_irqp, iflag_t *intr_flagp); 242 extern int apic_handle_pci_pci_bridge(dev_info_t *idip, int child_devno, 243 int child_ipin, struct apic_io_intr **intrp); 244 extern void apic_record_rdt_entry(apic_irq_t *irqptr, int irq); 245 246 /* 247 * From apic_regops.c 248 */ 249 extern int apic_have_32bit_cr8; 250 251 /* 252 * apix_intr.c 253 */ 254 extern void apix_do_interrupt(struct regs *rp, trap_trace_rec_t *ttp); 255 256 /* 257 * apix_utils.c 258 */ 259 260 typedef struct apix_rebind_info { 261 int i_go; /* if rebinding op is in progress */ 262 uint_t i_pri; 263 processorid_t i_old_cpuid; 264 struct autovec *i_old_av; 265 processorid_t i_new_cpuid; 266 struct autovec *i_new_av; 267 } apix_rebind_info_t; 268 269 extern struct apix_rebind_info apix_rebindinfo; 270 271 #define APIX_SET_REBIND_INFO(_ovp, _nvp)\ 272 if (((_ovp)->v_flags & APIX_VECT_MASKABLE) == 0) {\ 273 apix_rebindinfo.i_pri = (_ovp)->v_pri;\ 274 apix_rebindinfo.i_old_cpuid = (_ovp)->v_cpuid;\ 275 apix_rebindinfo.i_old_av = (_ovp)->v_autovect;\ 276 apix_rebindinfo.i_new_cpuid = (_nvp)->v_cpuid;\ 277 apix_rebindinfo.i_new_av = (_nvp)->v_autovect;\ 278 apix_rebindinfo.i_go = 1;\ 279 } 280 281 #define APIX_CLR_REBIND_INFO() \ 282 apix_rebindinfo.i_go = 0 283 284 #define APIX_IS_FAKE_INTR(_vector)\ 285 (apix_rebindinfo.i_go && (_vector) == APIX_RESV_VECTOR) 286 287 #define APIX_DO_FAKE_INTR(_cpu, _vector)\ 288 if (APIX_IS_FAKE_INTR(_vector)) {\ 289 struct autovec *tp;\ 290 if ((_cpu) == apix_rebindinfo.i_old_cpuid)\ 291 tp = apix_rebindinfo.i_old_av;\ 292 else if ((_cpu) == apix_rebindinfo.i_new_cpuid)\ 293 tp = apix_rebindinfo.i_new_av;\ 294 if (tp->av_vector != NULL &&\ 295 (tp->av_flags & AV_PENTRY_PEND) == 0) {\ 296 tp->av_flags |= AV_PENTRY_PEND;\ 297 apix_insert_pending_av(apixs[(_cpu)], tp,\ 298 tp->av_prilevel);\ 299 apixs[(_cpu)]->x_intr_pending |=\ 300 (1 << tp->av_prilevel);\ 301 }\ 302 } 303 304 extern int apix_add_avintr(void *intr_id, int ipl, avfunc xxintr, char *name, 305 int vector, caddr_t arg1, caddr_t arg2, uint64_t *ticksp, dev_info_t *dip); 306 extern void apix_rem_avintr(void *intr_id, int ipl, avfunc xxintr, 307 int virt_vect); 308 309 extern uint32_t apix_bind_cpu_locked(dev_info_t *dip); 310 extern apix_vector_t *apix_rebind(apix_vector_t *vecp, processorid_t tocpu, 311 int count); 312 313 extern uchar_t apix_alloc_ipi(int ipl); 314 extern apix_vector_t *apix_alloc_intx(dev_info_t *dip, int inum, int irqno); 315 extern int apix_alloc_msi(dev_info_t *dip, int inum, int count, int behavior); 316 extern int apix_alloc_msix(dev_info_t *dip, int inum, int count, int behavior); 317 extern void apix_free_vectors(dev_info_t *dip, int inum, int count, int type); 318 extern void apix_enable_vector(apix_vector_t *vecp); 319 extern void apix_disable_vector(apix_vector_t *vecp); 320 extern int apix_obsolete_vector(apix_vector_t *vecp); 321 extern int apix_find_cont_vector_oncpu(uint32_t cpuid, int count); 322 323 extern void apix_set_dev_map(apix_vector_t *vecp, dev_info_t *dip, int inum); 324 extern apix_vector_t *apix_get_dev_map(dev_info_t *dip, int inum, int type); 325 extern apix_vector_t *apix_setup_io_intr(apix_vector_t *vecp); 326 extern void ioapix_init_intr(int mask_apic); 327 extern int apix_get_min_dev_inum(dev_info_t *dip, int type); 328 extern int apix_get_max_dev_inum(dev_info_t *dip, int type); 329 330 /* 331 * apix.c 332 */ 333 extern int apix_addspl(int virtvec, int ipl, int min_ipl, int max_ipl); 334 extern int apix_delspl(int virtvec, int ipl, int min_ipl, int max_ipl); 335 extern void apix_intx_set_vector(int irqno, uint32_t cpuid, uchar_t vector); 336 extern apix_vector_t *apix_intx_get_vector(int irqno); 337 extern void apix_intx_enable(int irqno); 338 extern void apix_intx_disable(int irqno); 339 extern void apix_intx_free(int irqno); 340 extern int apix_intx_rebind(int irqno, processorid_t cpuid, uchar_t vector); 341 extern apix_vector_t *apix_set_cpu(apix_vector_t *vecp, int new_cpu, 342 int *result); 343 extern apix_vector_t *apix_grp_set_cpu(apix_vector_t *vecp, int new_cpu, 344 int *result); 345 extern void apix_level_intr_pre_eoi(int irq); 346 extern void apix_level_intr_post_dispatch(int irq); 347 348 #ifdef __cplusplus 349 } 350 #endif 351 352 #endif /* __SYS_APIX_APIX_H */ 353