1 /* 2 * CDDL HEADER START 3 * 4 * The contents of this file are subject to the terms of the 5 * Common Development and Distribution License, Version 1.0 only 6 * (the "License"). You may not use this file except in compliance 7 * with the License. 8 * 9 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 10 * or http://www.opensolaris.org/os/licensing. 11 * See the License for the specific language governing permissions 12 * and limitations under the License. 13 * 14 * When distributing Covered Code, include this CDDL HEADER in each 15 * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 16 * If applicable, add the following below this CDDL HEADER, with the 17 * fields enclosed by brackets "[]" replaced with your own identifying 18 * information: Portions Copyright [yyyy] [name of copyright owner] 19 * 20 * CDDL HEADER END 21 */ 22 23 /* 24 * Copyright 2006 Sun Microsystems, Inc. All rights reserved. 25 * Use is subject to license terms. 26 */ 27 28 /* Copyright (c) 1990, 1991 UNIX System Laboratories, Inc. */ 29 /* Copyright (c) 1984, 1986, 1987, 1988, 1989, 1990 AT&T */ 30 /* All Rights Reserved */ 31 /* */ 32 /* Copyright (c) 1987, 1988 Microsoft Corporation */ 33 /* All Rights Reserved */ 34 /* */ 35 36 #pragma ident "%Z%%M% %I% %E% SMI" 37 38 #include <sys/types.h> 39 #include <sys/sysmacros.h> 40 #include <sys/param.h> 41 #include <sys/signal.h> 42 #include <sys/systm.h> 43 #include <sys/user.h> 44 #include <sys/proc.h> 45 #include <sys/disp.h> 46 #include <sys/class.h> 47 #include <sys/core.h> 48 #include <sys/syscall.h> 49 #include <sys/cpuvar.h> 50 #include <sys/vm.h> 51 #include <sys/sysinfo.h> 52 #include <sys/fault.h> 53 #include <sys/stack.h> 54 #include <sys/mmu.h> 55 #include <sys/psw.h> 56 #include <sys/regset.h> 57 #include <sys/fp.h> 58 #include <sys/trap.h> 59 #include <sys/kmem.h> 60 #include <sys/vtrace.h> 61 #include <sys/cmn_err.h> 62 #include <sys/prsystm.h> 63 #include <sys/mutex_impl.h> 64 #include <sys/machsystm.h> 65 #include <sys/archsystm.h> 66 #include <sys/sdt.h> 67 #include <sys/avintr.h> 68 #include <sys/kobj.h> 69 70 #include <vm/hat.h> 71 72 #include <vm/seg_kmem.h> 73 #include <vm/as.h> 74 #include <vm/seg.h> 75 #include <vm/hat_pte.h> 76 77 #include <sys/procfs.h> 78 79 #include <sys/reboot.h> 80 #include <sys/debug.h> 81 #include <sys/debugreg.h> 82 #include <sys/modctl.h> 83 #include <sys/aio_impl.h> 84 #include <sys/tnf.h> 85 #include <sys/tnf_probe.h> 86 #include <sys/cred.h> 87 #include <sys/mman.h> 88 #include <sys/x86_archext.h> 89 #include <sys/copyops.h> 90 #include <c2/audit.h> 91 #include <sys/ftrace.h> 92 #include <sys/panic.h> 93 #include <sys/traptrace.h> 94 #include <sys/ontrap.h> 95 #include <sys/cpc_impl.h> 96 97 #define USER 0x10000 /* user-mode flag added to trap type */ 98 99 static const char *trap_type_mnemonic[] = { 100 "de", "db", "2", "bp", 101 "of", "br", "ud", "nm", 102 "df", "9", "ts", "np", 103 "ss", "gp", "pf", "15", 104 "mf", "ac", "mc", "xf" 105 }; 106 107 static const char *trap_type[] = { 108 "Divide error", /* trap id 0 */ 109 "Debug", /* trap id 1 */ 110 "NMI interrupt", /* trap id 2 */ 111 "Breakpoint", /* trap id 3 */ 112 "Overflow", /* trap id 4 */ 113 "BOUND range exceeded", /* trap id 5 */ 114 "Invalid opcode", /* trap id 6 */ 115 "Device not available", /* trap id 7 */ 116 "Double fault", /* trap id 8 */ 117 "Coprocessor segment overrun", /* trap id 9 */ 118 "Invalid TSS", /* trap id 10 */ 119 "Segment not present", /* trap id 11 */ 120 "Stack segment fault", /* trap id 12 */ 121 "General protection", /* trap id 13 */ 122 "Page fault", /* trap id 14 */ 123 "Reserved", /* trap id 15 */ 124 "x87 floating point error", /* trap id 16 */ 125 "Alignment check", /* trap id 17 */ 126 "Machine check", /* trap id 18 */ 127 "SIMD floating point exception", /* trap id 19 */ 128 }; 129 130 #define TRAP_TYPES (sizeof (trap_type) / sizeof (trap_type[0])) 131 132 int tudebug = 0; 133 int tudebugbpt = 0; 134 int tudebugfpe = 0; 135 int tudebugsse = 0; 136 137 #if defined(TRAPDEBUG) || defined(lint) 138 int tdebug = 0; 139 int lodebug = 0; 140 int faultdebug = 0; 141 #else 142 #define tdebug 0 143 #define lodebug 0 144 #define faultdebug 0 145 #endif /* defined(TRAPDEBUG) || defined(lint) */ 146 147 #if defined(TRAPTRACE) 148 static void dump_ttrace(void); 149 #endif /* TRAPTRACE */ 150 static void dumpregs(struct regs *); 151 static void showregs(uint_t, struct regs *, caddr_t); 152 static void dump_tss(void); 153 static int kern_gpfault(struct regs *); 154 155 struct trap_info { 156 struct regs *trap_regs; 157 uint_t trap_type; 158 caddr_t trap_addr; 159 }; 160 161 /*ARGSUSED*/ 162 static int 163 die(uint_t type, struct regs *rp, caddr_t addr, processorid_t cpuid) 164 { 165 struct trap_info ti; 166 const char *trap_name, *trap_mnemonic; 167 168 if (type < TRAP_TYPES) { 169 trap_name = trap_type[type]; 170 trap_mnemonic = trap_type_mnemonic[type]; 171 } else { 172 trap_name = "trap"; 173 trap_mnemonic = "-"; 174 } 175 176 #ifdef TRAPTRACE 177 TRAPTRACE_FREEZE; 178 #endif 179 180 ti.trap_regs = rp; 181 ti.trap_type = type & ~USER; 182 ti.trap_addr = addr; 183 184 curthread->t_panic_trap = &ti; 185 186 if (type == T_PGFLT && addr < (caddr_t)KERNELBASE) { 187 panic("BAD TRAP: type=%x (#%s %s) rp=%p addr=%p " 188 "occurred in module \"%s\" due to %s", 189 type, trap_mnemonic, trap_name, (void *)rp, (void *)addr, 190 mod_containing_pc((caddr_t)rp->r_pc), 191 addr < (caddr_t)PAGESIZE ? 192 "a NULL pointer dereference" : 193 "an illegal access to a user address"); 194 } else 195 panic("BAD TRAP: type=%x (#%s %s) rp=%p addr=%p", 196 type, trap_mnemonic, trap_name, (void *)rp, (void *)addr); 197 return (0); 198 } 199 200 /* 201 * Rewrite the instruction at pc to be an int $T_SYSCALLINT instruction. 202 * 203 * int <vector> is two bytes: 0xCD <vector> 204 */ 205 206 #define SLOW_SCALL_SIZE 2 207 208 static int 209 rewrite_syscall(caddr_t pc) 210 { 211 uchar_t instr[SLOW_SCALL_SIZE] = { 0xCD, T_SYSCALLINT }; 212 213 if (uwrite(curthread->t_procp, instr, SLOW_SCALL_SIZE, 214 (uintptr_t)pc) != 0) 215 return (1); 216 217 return (0); 218 } 219 220 /* 221 * Test to see if the instruction at pc is sysenter or syscall. The second 222 * argument should be the x86 feature flag corresponding to the expected 223 * instruction. 224 * 225 * sysenter is two bytes: 0x0F 0x34 226 * syscall is two bytes: 0x0F 0x05 227 */ 228 229 #define FAST_SCALL_SIZE 2 230 231 static int 232 instr_is_fast_syscall(caddr_t pc, int which) 233 { 234 uchar_t instr[FAST_SCALL_SIZE]; 235 236 ASSERT(which == X86_SEP || which == X86_ASYSC); 237 238 if (copyin_nowatch(pc, (caddr_t)instr, FAST_SCALL_SIZE) != 0 || 239 instr[0] != 0x0F) 240 return (0); 241 242 if ((which == X86_SEP && instr[1] == 0x34) || 243 (which == X86_ASYSC && instr[1] == 0x05)) 244 return (1); 245 246 return (0); 247 } 248 249 /* 250 * Test to see if the instruction at pc is a system call instruction. 251 * 252 * The bytes of an lcall instruction used for the syscall trap. 253 * static uchar_t lcall[7] = { 0x9a, 0, 0, 0, 0, 0x7, 0 }; 254 * static uchar_t lcallalt[7] = { 0x9a, 0, 0, 0, 0, 0x27, 0 }; 255 */ 256 257 #define LCALLSIZE 7 258 259 static int 260 instr_is_syscall(caddr_t pc) 261 { 262 uchar_t instr[LCALLSIZE]; 263 264 if (copyin_nowatch(pc, (caddr_t)instr, LCALLSIZE) == 0 && 265 instr[0] == 0x9a && 266 instr[1] == 0 && 267 instr[2] == 0 && 268 instr[3] == 0 && 269 instr[4] == 0 && 270 (instr[5] == 0x7 || instr[5] == 0x27) && 271 instr[6] == 0) 272 return (1); 273 274 return (0); 275 } 276 277 #ifdef OPTERON_ERRATUM_91 278 279 /* 280 * Test to see if the instruction at pc is a prefetch instruction. 281 * 282 * The first byte of prefetch instructions is always 0x0F. 283 * The second byte is 0x18 for regular prefetch or 0x0D for AMD 3dnow prefetch. 284 * The third byte is between 0 and 3 inclusive. 285 */ 286 287 #define PREFETCHSIZE 3 288 289 static int 290 cmp_to_prefetch(uchar_t *p) 291 { 292 if (*p == 0x0F && (*(p+1) == 0x18 || *(p+1) == 0x0D) && *(p+2) <= 3) 293 return (1); 294 return (0); 295 } 296 297 static int 298 instr_is_prefetch(caddr_t pc) 299 { 300 uchar_t instr[PREFETCHSIZE]; 301 int error; 302 303 error = copyin_nowatch(pc, (caddr_t)instr, PREFETCHSIZE); 304 305 if (error == 0 && cmp_to_prefetch(instr)) 306 return (1); 307 return (0); 308 } 309 310 #endif /* OPTERON_ERRATUM_91 */ 311 312 /* 313 * Called from the trap handler when a processor trap occurs. 314 * 315 * Note: All user-level traps that might call stop() must exit 316 * trap() by 'goto out' or by falling through. 317 */ 318 void 319 trap(struct regs *rp, caddr_t addr, processorid_t cpuid) 320 { 321 kthread_t *cur_thread = curthread; 322 enum seg_rw rw; 323 unsigned type; 324 extern int stop_on_fault(uint_t, k_siginfo_t *); 325 proc_t *p = ttoproc(cur_thread); 326 klwp_t *lwp = ttolwp(cur_thread); 327 uintptr_t lofault; 328 faultcode_t pagefault(), res, errcode; 329 enum fault_type fault_type; 330 k_siginfo_t siginfo; 331 uint_t fault = 0; 332 int mstate; 333 int sicode = 0; 334 int watchcode; 335 int watchpage; 336 caddr_t vaddr; 337 size_t sz; 338 int ta; 339 340 ASSERT_STACK_ALIGNED(); 341 342 type = rp->r_trapno; 343 CPU_STATS_ADDQ(CPU, sys, trap, 1); 344 345 ASSERT(cur_thread->t_schedflag & TS_DONT_SWAP); 346 347 if (type == T_PGFLT) { 348 349 errcode = rp->r_err; 350 if (errcode & PF_ERR_WRITE) 351 rw = S_WRITE; 352 else if ((caddr_t)rp->r_pc == addr || 353 (mmu.pt_nx != 0 && (errcode & PF_ERR_EXEC))) 354 rw = S_EXEC; 355 else 356 rw = S_READ; 357 358 #if defined(__i386) 359 /* 360 * Pentium Pro work-around 361 */ 362 if ((errcode & PF_ERR_PROT) && pentiumpro_bug4046376) { 363 uint_t attr; 364 uint_t priv_violation; 365 uint_t access_violation; 366 367 if (hat_getattr(addr < (caddr_t)kernelbase ? 368 curproc->p_as->a_hat : kas.a_hat, addr, &attr) 369 == -1) { 370 errcode &= ~PF_ERR_PROT; 371 } else { 372 priv_violation = (errcode & PF_ERR_USER) && 373 !(attr & PROT_USER); 374 access_violation = (errcode & PF_ERR_WRITE) && 375 !(attr & PROT_WRITE); 376 if (!priv_violation && !access_violation) 377 goto cleanup; 378 } 379 } 380 #endif /* __i386 */ 381 382 } 383 384 if (tdebug) 385 showregs(type, rp, addr); 386 387 if (USERMODE(rp->r_cs)) { 388 /* 389 * Set up the current cred to use during this trap. u_cred 390 * no longer exists. t_cred is used instead. 391 * The current process credential applies to the thread for 392 * the entire trap. If trapping from the kernel, this 393 * should already be set up. 394 */ 395 if (cur_thread->t_cred != p->p_cred) { 396 cred_t *oldcred = cur_thread->t_cred; 397 /* 398 * DTrace accesses t_cred in probe context. t_cred 399 * must always be either NULL, or point to a valid, 400 * allocated cred structure. 401 */ 402 cur_thread->t_cred = crgetcred(); 403 crfree(oldcred); 404 } 405 ASSERT(lwp != NULL); 406 type |= USER; 407 ASSERT(lwptoregs(lwp) == rp); 408 lwp->lwp_state = LWP_SYS; 409 410 switch (type) { 411 case T_PGFLT + USER: 412 if ((caddr_t)rp->r_pc == addr) 413 mstate = LMS_TFAULT; 414 else 415 mstate = LMS_DFAULT; 416 break; 417 default: 418 mstate = LMS_TRAP; 419 break; 420 } 421 /* Kernel probe */ 422 TNF_PROBE_1(thread_state, "thread", /* CSTYLED */, 423 tnf_microstate, state, mstate); 424 mstate = new_mstate(cur_thread, mstate); 425 426 bzero(&siginfo, sizeof (siginfo)); 427 } 428 429 switch (type) { 430 case T_PGFLT + USER: 431 case T_SGLSTP: 432 case T_SGLSTP + USER: 433 case T_BPTFLT + USER: 434 break; 435 436 default: 437 FTRACE_2("trap(): type=0x%lx, regs=0x%lx", 438 (ulong_t)type, (ulong_t)rp); 439 break; 440 } 441 442 switch (type) { 443 444 case T_MCE: /* Machine check exception */ 445 case T_MCE + USER: 446 if (x86_feature & X86_MCA) { 447 if (mca_exception(rp)) 448 (void) die(type, rp, addr, cpuid); 449 type &= ~USER; 450 goto cleanup; 451 } 452 default: 453 if (type & USER) { 454 if (tudebug) 455 showregs(type, rp, (caddr_t)0); 456 printf("trap: Unknown trap type %d in user mode\n", 457 type & ~USER); 458 siginfo.si_signo = SIGILL; 459 siginfo.si_code = ILL_ILLTRP; 460 siginfo.si_addr = (caddr_t)rp->r_pc; 461 siginfo.si_trapno = type & ~USER; 462 fault = FLTILL; 463 break; 464 } else { 465 (void) die(type, rp, addr, cpuid); 466 /*NOTREACHED*/ 467 } 468 469 case T_PGFLT: /* system page fault */ 470 /* 471 * If we're under on_trap() protection (see <sys/ontrap.h>), 472 * set ot_trap and longjmp back to the on_trap() call site. 473 */ 474 if ((cur_thread->t_ontrap != NULL) && 475 (cur_thread->t_ontrap->ot_prot & OT_DATA_ACCESS)) { 476 curthread->t_ontrap->ot_trap |= OT_DATA_ACCESS; 477 longjmp(&curthread->t_ontrap->ot_jmpbuf); 478 } 479 480 /* 481 * See if we can handle as pagefault. Save lofault 482 * across this. Here we assume that an address 483 * less than KERNELBASE is a user fault. 484 * We can do this as copy.s routines verify that the 485 * starting address is less than KERNELBASE before 486 * starting and because we know that we always have 487 * KERNELBASE mapped as invalid to serve as a "barrier". 488 */ 489 lofault = cur_thread->t_lofault; 490 cur_thread->t_lofault = 0; 491 492 mstate = new_mstate(cur_thread, LMS_KFAULT); 493 494 if (addr < (caddr_t)kernelbase) { 495 res = pagefault(addr, 496 (errcode & PF_ERR_PROT)? F_PROT: F_INVAL, rw, 0); 497 if (res == FC_NOMAP && 498 addr < p->p_usrstack && 499 grow(addr)) 500 res = 0; 501 } else { 502 res = pagefault(addr, 503 (errcode & PF_ERR_PROT)? F_PROT: F_INVAL, rw, 1); 504 } 505 (void) new_mstate(cur_thread, mstate); 506 507 /* 508 * Restore lofault. If we resolved the fault, exit. 509 * If we didn't and lofault wasn't set, die. 510 */ 511 cur_thread->t_lofault = lofault; 512 if (res == 0) 513 goto cleanup; 514 515 #if defined(OPTERON_ERRATUM_93) && defined(_LP64) 516 if (lofault == 0 && opteron_erratum_93) { 517 /* 518 * Workaround for Opteron Erratum 93. On return from 519 * a System Managment Interrupt at a HLT instruction 520 * the %rip might be truncated to a 32 bit value. 521 * BIOS is supposed to fix this, but some don't. 522 * If this occurs we simply restore the high order bits. 523 * The HLT instruction is 1 byte of 0xf4. 524 */ 525 uintptr_t rip = rp->r_pc; 526 527 if ((rip & 0xfffffffful) == rip) { 528 rip |= 0xfffffffful << 32; 529 if (hat_getpfnum(kas.a_hat, (caddr_t)rip) != 530 PFN_INVALID && 531 (*(uchar_t *)rip == 0xf4 || 532 *(uchar_t *)(rip - 1) == 0xf4)) { 533 rp->r_pc = rip; 534 goto cleanup; 535 } 536 } 537 } 538 #endif /* OPTERON_ERRATUM_93 && _LP64 */ 539 540 #ifdef OPTERON_ERRATUM_91 541 if (lofault == 0 && opteron_erratum_91) { 542 /* 543 * Workaround for Opteron Erratum 91. Prefetches may 544 * generate a page fault (they're not supposed to do 545 * that!). If this occurs we simply return back to the 546 * instruction. 547 */ 548 caddr_t pc = (caddr_t)rp->r_pc; 549 550 /* 551 * If the faulting PC is not mapped, this is a 552 * legitimate kernel page fault that must result in a 553 * panic. If the faulting PC is mapped, it could contain 554 * a prefetch instruction. Check for that here. 555 */ 556 if (hat_getpfnum(kas.a_hat, pc) != PFN_INVALID) { 557 if (cmp_to_prefetch((uchar_t *)pc)) { 558 #ifdef DEBUG 559 cmn_err(CE_WARN, "Opteron erratum 91 " 560 "occurred: kernel prefetch" 561 " at %p generated a page fault!", 562 (void *)rp->r_pc); 563 #endif /* DEBUG */ 564 goto cleanup; 565 } 566 } 567 (void) die(type, rp, addr, cpuid); 568 } 569 #endif /* OPTERON_ERRATUM_91 */ 570 571 if (lofault == 0) 572 (void) die(type, rp, addr, cpuid); 573 574 /* 575 * Cannot resolve fault. Return to lofault. 576 */ 577 if (lodebug) { 578 showregs(type, rp, addr); 579 traceregs(rp); 580 } 581 if (FC_CODE(res) == FC_OBJERR) 582 res = FC_ERRNO(res); 583 else 584 res = EFAULT; 585 rp->r_r0 = res; 586 rp->r_pc = cur_thread->t_lofault; 587 goto cleanup; 588 589 case T_PGFLT + USER: /* user page fault */ 590 if (faultdebug) { 591 char *fault_str; 592 593 switch (rw) { 594 case S_READ: 595 fault_str = "read"; 596 break; 597 case S_WRITE: 598 fault_str = "write"; 599 break; 600 case S_EXEC: 601 fault_str = "exec"; 602 break; 603 default: 604 fault_str = ""; 605 break; 606 } 607 printf("user %s fault: addr=0x%lx errcode=0x%x\n", 608 fault_str, (uintptr_t)addr, errcode); 609 } 610 611 #if defined(OPTERON_ERRATUM_100) && defined(_LP64) 612 /* 613 * Workaround for AMD erratum 100 614 * 615 * A 32-bit process may receive a page fault on a non 616 * 32-bit address by mistake. The range of the faulting 617 * address will be 618 * 619 * 0xffffffff80000000 .. 0xffffffffffffffff or 620 * 0x0000000100000000 .. 0x000000017fffffff 621 * 622 * The fault is always due to an instruction fetch, however 623 * the value of r_pc should be correct (in 32 bit range), 624 * so we ignore the page fault on the bogus address. 625 */ 626 if (p->p_model == DATAMODEL_ILP32 && 627 (0xffffffff80000000 <= (uintptr_t)addr || 628 (0x100000000 <= (uintptr_t)addr && 629 (uintptr_t)addr <= 0x17fffffff))) { 630 if (!opteron_erratum_100) 631 panic("unexpected erratum #100"); 632 if (rp->r_pc <= 0xffffffff) 633 goto out; 634 } 635 #endif /* OPTERON_ERRATUM_100 && _LP64 */ 636 637 ASSERT(!(curthread->t_flag & T_WATCHPT)); 638 watchpage = (pr_watch_active(p) && pr_is_watchpage(addr, rw)); 639 #ifdef __i386 640 /* 641 * In 32-bit mode, the lcall (system call) instruction fetches 642 * one word from the stack, at the stack pointer, because of the 643 * way the call gate is constructed. This is a bogus 644 * read and should not be counted as a read watchpoint. 645 * We work around the problem here by testing to see if 646 * this situation applies and, if so, simply jumping to 647 * the code in locore.s that fields the system call trap. 648 * The registers on the stack are already set up properly 649 * due to the match between the call gate sequence and the 650 * trap gate sequence. We just have to adjust the pc. 651 */ 652 if (watchpage && addr == (caddr_t)rp->r_sp && 653 rw == S_READ && instr_is_syscall((caddr_t)rp->r_pc)) { 654 extern void watch_syscall(void); 655 656 rp->r_pc += LCALLSIZE; 657 watch_syscall(); /* never returns */ 658 /* NOTREACHED */ 659 } 660 #endif /* __i386 */ 661 vaddr = addr; 662 if (!watchpage || (sz = instr_size(rp, &vaddr, rw)) <= 0) 663 fault_type = (errcode & PF_ERR_PROT)? F_PROT: F_INVAL; 664 else if ((watchcode = pr_is_watchpoint(&vaddr, &ta, 665 sz, NULL, rw)) != 0) { 666 if (ta) { 667 do_watch_step(vaddr, sz, rw, 668 watchcode, rp->r_pc); 669 fault_type = F_INVAL; 670 } else { 671 bzero(&siginfo, sizeof (siginfo)); 672 siginfo.si_signo = SIGTRAP; 673 siginfo.si_code = watchcode; 674 siginfo.si_addr = vaddr; 675 siginfo.si_trapafter = 0; 676 siginfo.si_pc = (caddr_t)rp->r_pc; 677 fault = FLTWATCH; 678 break; 679 } 680 } else { 681 /* XXX pr_watch_emul() never succeeds (for now) */ 682 if (rw != S_EXEC && pr_watch_emul(rp, vaddr, rw)) 683 goto out; 684 do_watch_step(vaddr, sz, rw, 0, 0); 685 fault_type = F_INVAL; 686 } 687 688 res = pagefault(addr, fault_type, rw, 0); 689 690 /* 691 * If pagefault() succeeded, ok. 692 * Otherwise attempt to grow the stack. 693 */ 694 if (res == 0 || 695 (res == FC_NOMAP && 696 addr < p->p_usrstack && 697 grow(addr))) { 698 lwp->lwp_lastfault = FLTPAGE; 699 lwp->lwp_lastfaddr = addr; 700 if (prismember(&p->p_fltmask, FLTPAGE)) { 701 bzero(&siginfo, sizeof (siginfo)); 702 siginfo.si_addr = addr; 703 (void) stop_on_fault(FLTPAGE, &siginfo); 704 } 705 goto out; 706 } else if (res == FC_PROT && addr < p->p_usrstack && 707 (mmu.pt_nx != 0 && (errcode & PF_ERR_EXEC))) { 708 report_stack_exec(p, addr); 709 } 710 711 #ifdef OPTERON_ERRATUM_91 712 /* 713 * Workaround for Opteron Erratum 91. Prefetches may generate a 714 * page fault (they're not supposed to do that!). If this 715 * occurs we simply return back to the instruction. 716 * 717 * We rely on copyin to properly fault in the page with r_pc. 718 */ 719 if (opteron_erratum_91 && 720 addr != (caddr_t)rp->r_pc && 721 instr_is_prefetch((caddr_t)rp->r_pc)) { 722 #ifdef DEBUG 723 cmn_err(CE_WARN, "Opteron erratum 91 occurred: " 724 "prefetch at %p in pid %d generated a trap!", 725 (void *)rp->r_pc, p->p_pid); 726 #endif /* DEBUG */ 727 goto out; 728 } 729 #endif /* OPTERON_ERRATUM_91 */ 730 731 if (tudebug) 732 showregs(type, rp, addr); 733 /* 734 * In the case where both pagefault and grow fail, 735 * set the code to the value provided by pagefault. 736 * We map all errors returned from pagefault() to SIGSEGV. 737 */ 738 bzero(&siginfo, sizeof (siginfo)); 739 siginfo.si_addr = addr; 740 switch (FC_CODE(res)) { 741 case FC_HWERR: 742 case FC_NOSUPPORT: 743 siginfo.si_signo = SIGBUS; 744 siginfo.si_code = BUS_ADRERR; 745 fault = FLTACCESS; 746 break; 747 case FC_ALIGN: 748 siginfo.si_signo = SIGBUS; 749 siginfo.si_code = BUS_ADRALN; 750 fault = FLTACCESS; 751 break; 752 case FC_OBJERR: 753 if ((siginfo.si_errno = FC_ERRNO(res)) != EINTR) { 754 siginfo.si_signo = SIGBUS; 755 siginfo.si_code = BUS_OBJERR; 756 fault = FLTACCESS; 757 } 758 break; 759 default: /* FC_NOMAP or FC_PROT */ 760 siginfo.si_signo = SIGSEGV; 761 siginfo.si_code = 762 (res == FC_NOMAP)? SEGV_MAPERR : SEGV_ACCERR; 763 fault = FLTBOUNDS; 764 break; 765 } 766 break; 767 768 case T_ILLINST + USER: /* invalid opcode fault */ 769 /* 770 * If the syscall instruction is disabled due to LDT usage, a 771 * user program that attempts to execute it will trigger a #ud 772 * trap. Check for that case here. If this occurs on a CPU which 773 * doesn't even support syscall, the result of all of this will 774 * be to emulate that particular instruction. 775 */ 776 if (p->p_ldt != NULL && 777 instr_is_fast_syscall((caddr_t)rp->r_pc, X86_ASYSC)) { 778 if (rewrite_syscall((caddr_t)rp->r_pc) == 0) 779 goto out; 780 #ifdef DEBUG 781 else 782 cmn_err(CE_WARN, "failed to rewrite syscall " 783 "instruction in process %d", 784 curthread->t_procp->p_pid); 785 #endif /* DEBUG */ 786 } 787 /*FALLTHROUGH*/ 788 789 if (tudebug) 790 showregs(type, rp, (caddr_t)0); 791 siginfo.si_signo = SIGILL; 792 siginfo.si_code = ILL_ILLOPC; 793 siginfo.si_addr = (caddr_t)rp->r_pc; 794 fault = FLTILL; 795 break; 796 797 case T_ZERODIV + USER: /* integer divide by zero */ 798 if (tudebug && tudebugfpe) 799 showregs(type, rp, (caddr_t)0); 800 siginfo.si_signo = SIGFPE; 801 siginfo.si_code = FPE_INTDIV; 802 siginfo.si_addr = (caddr_t)rp->r_pc; 803 fault = FLTIZDIV; 804 break; 805 806 case T_OVFLW + USER: /* integer overflow */ 807 if (tudebug && tudebugfpe) 808 showregs(type, rp, (caddr_t)0); 809 siginfo.si_signo = SIGFPE; 810 siginfo.si_code = FPE_INTOVF; 811 siginfo.si_addr = (caddr_t)rp->r_pc; 812 fault = FLTIOVF; 813 break; 814 815 case T_NOEXTFLT + USER: /* math coprocessor not available */ 816 if (tudebug && tudebugfpe) 817 showregs(type, rp, addr); 818 if (fpnoextflt(rp)) { 819 siginfo.si_signo = SIGFPE; 820 siginfo.si_code = ILL_ILLOPC; 821 siginfo.si_addr = (caddr_t)rp->r_pc; 822 fault = FLTFPE; 823 } 824 break; 825 826 case T_EXTOVRFLT: /* extension overrun fault */ 827 /* check if we took a kernel trap on behalf of user */ 828 { 829 extern void ndptrap_frstor(void); 830 if (rp->r_pc != (uintptr_t)ndptrap_frstor) 831 (void) die(type, rp, addr, cpuid); 832 type |= USER; 833 } 834 /*FALLTHROUGH*/ 835 case T_EXTOVRFLT + USER: /* extension overrun fault */ 836 if (tudebug && tudebugfpe) 837 showregs(type, rp, addr); 838 if (fpextovrflt(rp)) { 839 siginfo.si_signo = SIGSEGV; 840 siginfo.si_code = SEGV_MAPERR; 841 siginfo.si_addr = (caddr_t)rp->r_pc; 842 fault = FLTBOUNDS; 843 } 844 break; 845 846 case T_EXTERRFLT: /* x87 floating point exception pending */ 847 /* check if we took a kernel trap on behalf of user */ 848 { 849 extern void ndptrap_frstor(void); 850 if (rp->r_pc != (uintptr_t)ndptrap_frstor) 851 (void) die(type, rp, addr, cpuid); 852 type |= USER; 853 } 854 /*FALLTHROUGH*/ 855 856 case T_EXTERRFLT + USER: /* x87 floating point exception pending */ 857 if (tudebug && tudebugfpe) 858 showregs(type, rp, addr); 859 if (sicode = fpexterrflt(rp)) { 860 siginfo.si_signo = SIGFPE; 861 siginfo.si_code = sicode; 862 siginfo.si_addr = (caddr_t)rp->r_pc; 863 fault = FLTFPE; 864 } 865 break; 866 867 case T_SIMDFPE + USER: /* SSE and SSE2 exceptions */ 868 if (tudebug && tudebugsse) 869 showregs(type, rp, addr); 870 if ((x86_feature & (X86_SSE|X86_SSE2)) == 0) { 871 /* 872 * There are rumours that some user instructions 873 * on older CPUs can cause this trap to occur; in 874 * which case send a SIGILL instead of a SIGFPE. 875 */ 876 siginfo.si_signo = SIGILL; 877 siginfo.si_code = ILL_ILLTRP; 878 siginfo.si_addr = (caddr_t)rp->r_pc; 879 siginfo.si_trapno = type & ~USER; 880 fault = FLTILL; 881 } else if ((sicode = fpsimderrflt(rp)) != 0) { 882 siginfo.si_signo = SIGFPE; 883 siginfo.si_code = sicode; 884 siginfo.si_addr = (caddr_t)rp->r_pc; 885 fault = FLTFPE; 886 } 887 break; 888 889 case T_BPTFLT: /* breakpoint trap */ 890 /* 891 * Kernel breakpoint traps should only happen when kmdb is 892 * active, and even then, it'll have interposed on the IDT, so 893 * control won't get here. If it does, we've hit a breakpoint 894 * without the debugger, which is very strange, and very 895 * fatal. 896 */ 897 if (tudebug && tudebugbpt) 898 showregs(type, rp, (caddr_t)0); 899 900 (void) die(type, rp, addr, cpuid); 901 break; 902 903 case T_SGLSTP: /* single step/hw breakpoint exception */ 904 if (tudebug && tudebugbpt) 905 showregs(type, rp, (caddr_t)0); 906 907 /* Now evaluate how we got here */ 908 if (lwp != NULL && (lwp->lwp_pcb.pcb_drstat & DR_SINGLESTEP)) { 909 /* 910 * i386 single-steps even through lcalls which 911 * change the privilege level. So we take a trap at 912 * the first instruction in privileged mode. 913 * 914 * Set a flag to indicate that upon completion of 915 * the system call, deal with the single-step trap. 916 * 917 * The same thing happens for sysenter, too. 918 */ 919 #if defined(__amd64) 920 if (rp->r_pc == (uintptr_t)sys_sysenter) { 921 /* 922 * Adjust the pc so that we don't execute the 923 * swapgs instruction at the head of the 924 * handler and completely confuse things. 925 */ 926 rp->r_pc = (uintptr_t) 927 _sys_sysenter_post_swapgs; 928 #elif defined(__i386) 929 if (rp->r_pc == (uintptr_t)sys_call || 930 rp->r_pc == (uintptr_t)sys_sysenter) { 931 #endif 932 rp->r_ps &= ~PS_T; /* turn off trace */ 933 lwp->lwp_pcb.pcb_flags |= DEBUG_PENDING; 934 cur_thread->t_post_sys = 1; 935 goto cleanup; 936 } 937 } 938 /* XXX - needs review on debugger interface? */ 939 if (boothowto & RB_DEBUG) 940 debug_enter((char *)NULL); 941 else 942 (void) die(type, rp, addr, cpuid); 943 break; 944 945 case T_NMIFLT: /* NMI interrupt */ 946 printf("Unexpected NMI in system mode\n"); 947 goto cleanup; 948 949 case T_NMIFLT + USER: /* NMI interrupt */ 950 printf("Unexpected NMI in user mode\n"); 951 break; 952 953 case T_GPFLT: /* general protection violation */ 954 #if defined(__amd64) 955 /* 956 * On amd64, we can get a #gp from referencing addresses 957 * in the virtual address hole e.g. from a copyin. 958 */ 959 960 /* 961 * If we're under on_trap() protection (see <sys/ontrap.h>), 962 * set ot_trap and longjmp back to the on_trap() call site. 963 */ 964 if ((cur_thread->t_ontrap != NULL) && 965 (cur_thread->t_ontrap->ot_prot & OT_DATA_ACCESS)) { 966 curthread->t_ontrap->ot_trap |= OT_DATA_ACCESS; 967 longjmp(&curthread->t_ontrap->ot_jmpbuf); 968 } 969 970 /* 971 * If we're under lofault protection (copyin etc.), 972 * longjmp back to lofault with an EFAULT. 973 */ 974 if (cur_thread->t_lofault) { 975 /* 976 * Fault is not resolvable, so just return to lofault 977 */ 978 if (lodebug) { 979 showregs(type, rp, addr); 980 traceregs(rp); 981 } 982 rp->r_r0 = EFAULT; 983 rp->r_pc = cur_thread->t_lofault; 984 goto cleanup; 985 } 986 /*FALLTHROUGH*/ 987 #endif 988 case T_STKFLT: /* stack fault */ 989 case T_TSSFLT: /* invalid TSS fault */ 990 case T_SEGFLT: /* segment not present fault */ 991 if (tudebug) 992 showregs(type, rp, (caddr_t)0); 993 if (kern_gpfault(rp)) 994 (void) die(type, rp, addr, cpuid); 995 goto cleanup; 996 /*FALLTHROUGH*/ 997 998 /* 999 * ONLY 32-bit PROCESSES can USE a PRIVATE LDT! 64-bit apps should have 1000 * no legacy need for them, so we put a stop to it here. 1001 * 1002 * So: not-present fault is ONLY valid for 32-bit processes with a private LDT 1003 * trying to do a system call. Emulate it. 1004 * 1005 * #gp fault is ONLY valid for 32-bit processes also, which DO NOT have private 1006 * LDT, and are trying to do a system call. Emulate it. 1007 */ 1008 case T_SEGFLT + USER: /* segment not present fault */ 1009 case T_GPFLT + USER: /* general protection violation */ 1010 #ifdef _SYSCALL32_IMPL 1011 if (p->p_model != DATAMODEL_NATIVE) { 1012 #endif /* _SYSCALL32_IMPL */ 1013 if (instr_is_syscall((caddr_t)rp->r_pc)) { 1014 if (type == T_SEGFLT + USER) 1015 ASSERT(p->p_ldt != NULL); 1016 1017 if ((p->p_ldt == NULL && type == T_GPFLT + USER) || 1018 type == T_SEGFLT + USER) { 1019 1020 /* 1021 * The user attempted a system call via the obsolete 1022 * call gate mechanism. Because the process doesn't have 1023 * an LDT (i.e. the ldtr contains 0), a #gp results. 1024 * Emulate the syscall here, just as we do above for a 1025 * #np trap. 1026 */ 1027 1028 /* 1029 * Since this is a not-present trap, rp->r_pc points to 1030 * the trapping lcall instruction. We need to bump it 1031 * to the next insn so the app can continue on. 1032 */ 1033 rp->r_pc += LCALLSIZE; 1034 lwp->lwp_regs = rp; 1035 1036 /* 1037 * Normally the microstate of the LWP is forced back to 1038 * LMS_USER by the syscall handlers. Emulate that 1039 * behavior here. 1040 */ 1041 mstate = LMS_USER; 1042 1043 dosyscall(); 1044 goto out; 1045 } 1046 } 1047 #ifdef _SYSCALL32_IMPL 1048 } 1049 #endif /* _SYSCALL32_IMPL */ 1050 /* 1051 * If the current process is using a private LDT and the 1052 * trapping instruction is sysenter, the sysenter instruction 1053 * has been disabled on the CPU because it destroys segment 1054 * registers. If this is the case, rewrite the instruction to 1055 * be a safe system call and retry it. If this occurs on a CPU 1056 * which doesn't even support sysenter, the result of all of 1057 * this will be to emulate that particular instruction. 1058 */ 1059 if (p->p_ldt != NULL && 1060 instr_is_fast_syscall((caddr_t)rp->r_pc, X86_SEP)) { 1061 if (rewrite_syscall((caddr_t)rp->r_pc) == 0) 1062 goto out; 1063 #ifdef DEBUG 1064 else 1065 cmn_err(CE_WARN, "failed to rewrite sysenter " 1066 "instruction in process %d", 1067 curthread->t_procp->p_pid); 1068 #endif /* DEBUG */ 1069 } 1070 /*FALLTHROUGH*/ 1071 1072 case T_BOUNDFLT + USER: /* bound fault */ 1073 case T_STKFLT + USER: /* stack fault */ 1074 case T_TSSFLT + USER: /* invalid TSS fault */ 1075 if (tudebug) 1076 showregs(type, rp, (caddr_t)0); 1077 siginfo.si_signo = SIGSEGV; 1078 siginfo.si_code = SEGV_MAPERR; 1079 siginfo.si_addr = (caddr_t)rp->r_pc; 1080 fault = FLTBOUNDS; 1081 break; 1082 1083 case T_ALIGNMENT + USER: /* user alignment error (486) */ 1084 if (tudebug) 1085 showregs(type, rp, (caddr_t)0); 1086 bzero(&siginfo, sizeof (siginfo)); 1087 siginfo.si_signo = SIGBUS; 1088 siginfo.si_code = BUS_ADRALN; 1089 siginfo.si_addr = (caddr_t)rp->r_pc; 1090 fault = FLTACCESS; 1091 break; 1092 1093 case T_SGLSTP + USER: /* single step/hw breakpoint exception */ 1094 if (tudebug && tudebugbpt) 1095 showregs(type, rp, (caddr_t)0); 1096 1097 /* Was it single-stepping? */ 1098 if (lwp->lwp_pcb.pcb_drstat & DR_SINGLESTEP) { 1099 pcb_t *pcb = &lwp->lwp_pcb; 1100 1101 rp->r_ps &= ~PS_T; 1102 /* 1103 * If both NORMAL_STEP and WATCH_STEP are in effect, 1104 * give precedence to NORMAL_STEP. If neither is set, 1105 * user must have set the PS_T bit in %efl; treat this 1106 * as NORMAL_STEP. 1107 */ 1108 if ((pcb->pcb_flags & NORMAL_STEP) || 1109 !(pcb->pcb_flags & WATCH_STEP)) { 1110 siginfo.si_signo = SIGTRAP; 1111 siginfo.si_code = TRAP_TRACE; 1112 siginfo.si_addr = (caddr_t)rp->r_pc; 1113 fault = FLTTRACE; 1114 if (pcb->pcb_flags & WATCH_STEP) 1115 (void) undo_watch_step(NULL); 1116 } else { 1117 fault = undo_watch_step(&siginfo); 1118 } 1119 pcb->pcb_flags &= ~(NORMAL_STEP|WATCH_STEP); 1120 } else { 1121 cmn_err(CE_WARN, 1122 "Unexpected INT 1 in user mode, dr6=%lx", 1123 lwp->lwp_pcb.pcb_drstat); 1124 } 1125 break; 1126 1127 case T_BPTFLT + USER: /* breakpoint trap */ 1128 if (tudebug && tudebugbpt) 1129 showregs(type, rp, (caddr_t)0); 1130 /* 1131 * int 3 (the breakpoint instruction) leaves the pc referring 1132 * to the address one byte after the breakpointed address. 1133 * If the P_PR_BPTADJ flag has been set via /proc, We adjust 1134 * it back so it refers to the breakpointed address. 1135 */ 1136 if (p->p_proc_flag & P_PR_BPTADJ) 1137 rp->r_pc--; 1138 siginfo.si_signo = SIGTRAP; 1139 siginfo.si_code = TRAP_BRKPT; 1140 siginfo.si_addr = (caddr_t)rp->r_pc; 1141 fault = FLTBPT; 1142 break; 1143 1144 case T_AST: 1145 /* 1146 * This occurs only after the cs register has been made to 1147 * look like a kernel selector, either through debugging or 1148 * possibly by functions like setcontext(). The thread is 1149 * about to cause a general protection fault at common_iret() 1150 * in locore. We let that happen immediately instead of 1151 * doing the T_AST processing. 1152 */ 1153 goto cleanup; 1154 1155 case T_AST + USER: /* profiling or resched pseudo trap */ 1156 if (lwp->lwp_pcb.pcb_flags & CPC_OVERFLOW) { 1157 lwp->lwp_pcb.pcb_flags &= ~CPC_OVERFLOW; 1158 if (kcpc_overflow_ast()) { 1159 /* 1160 * Signal performance counter overflow 1161 */ 1162 if (tudebug) 1163 showregs(type, rp, (caddr_t)0); 1164 bzero(&siginfo, sizeof (siginfo)); 1165 siginfo.si_signo = SIGEMT; 1166 siginfo.si_code = EMT_CPCOVF; 1167 siginfo.si_addr = (caddr_t)rp->r_pc; 1168 fault = FLTCPCOVF; 1169 } 1170 } 1171 break; 1172 } 1173 1174 /* 1175 * We can't get here from a system trap 1176 */ 1177 ASSERT(type & USER); 1178 1179 if (fault) { 1180 /* 1181 * Remember the fault and fault adddress 1182 * for real-time (SIGPROF) profiling. 1183 */ 1184 lwp->lwp_lastfault = fault; 1185 lwp->lwp_lastfaddr = siginfo.si_addr; 1186 1187 DTRACE_PROC2(fault, int, fault, ksiginfo_t *, &siginfo); 1188 1189 /* 1190 * If a debugger has declared this fault to be an 1191 * event of interest, stop the lwp. Otherwise just 1192 * deliver the associated signal. 1193 */ 1194 if (siginfo.si_signo != SIGKILL && 1195 prismember(&p->p_fltmask, fault) && 1196 stop_on_fault(fault, &siginfo) == 0) 1197 siginfo.si_signo = 0; 1198 } 1199 1200 if (siginfo.si_signo) 1201 trapsig(&siginfo, (fault == FLTCPCOVF)? 0 : 1); 1202 1203 if (lwp->lwp_oweupc) 1204 profil_tick(rp->r_pc); 1205 1206 if (cur_thread->t_astflag | cur_thread->t_sig_check) { 1207 /* 1208 * Turn off the AST flag before checking all the conditions that 1209 * may have caused an AST. This flag is on whenever a signal or 1210 * unusual condition should be handled after the next trap or 1211 * syscall. 1212 */ 1213 astoff(cur_thread); 1214 cur_thread->t_sig_check = 0; 1215 1216 mutex_enter(&p->p_lock); 1217 if (curthread->t_proc_flag & TP_CHANGEBIND) { 1218 timer_lwpbind(); 1219 curthread->t_proc_flag &= ~TP_CHANGEBIND; 1220 } 1221 mutex_exit(&p->p_lock); 1222 1223 /* 1224 * for kaio requests that are on the per-process poll queue, 1225 * aiop->aio_pollq, they're AIO_POLL bit is set, the kernel 1226 * should copyout their result_t to user memory. by copying 1227 * out the result_t, the user can poll on memory waiting 1228 * for the kaio request to complete. 1229 */ 1230 if (p->p_aio) 1231 aio_cleanup(0); 1232 /* 1233 * If this LWP was asked to hold, call holdlwp(), which will 1234 * stop. holdlwps() sets this up and calls pokelwps() which 1235 * sets the AST flag. 1236 * 1237 * Also check TP_EXITLWP, since this is used by fresh new LWPs 1238 * through lwp_rtt(). That flag is set if the lwp_create(2) 1239 * syscall failed after creating the LWP. 1240 */ 1241 if (ISHOLD(p)) 1242 holdlwp(); 1243 1244 /* 1245 * All code that sets signals and makes ISSIG evaluate true must 1246 * set t_astflag afterwards. 1247 */ 1248 if (ISSIG_PENDING(cur_thread, lwp, p)) { 1249 if (issig(FORREAL)) 1250 psig(); 1251 cur_thread->t_sig_check = 1; 1252 } 1253 1254 if (cur_thread->t_rprof != NULL) { 1255 realsigprof(0, 0); 1256 cur_thread->t_sig_check = 1; 1257 } 1258 } 1259 1260 out: /* We can't get here from a system trap */ 1261 ASSERT(type & USER); 1262 1263 if (ISHOLD(p)) 1264 holdlwp(); 1265 1266 /* 1267 * Set state to LWP_USER here so preempt won't give us a kernel 1268 * priority if it occurs after this point. Call CL_TRAPRET() to 1269 * restore the user-level priority. 1270 * 1271 * It is important that no locks (other than spinlocks) be entered 1272 * after this point before returning to user mode (unless lwp_state 1273 * is set back to LWP_SYS). 1274 */ 1275 lwp->lwp_state = LWP_USER; 1276 1277 if (cur_thread->t_trapret) { 1278 cur_thread->t_trapret = 0; 1279 thread_lock(cur_thread); 1280 CL_TRAPRET(cur_thread); 1281 thread_unlock(cur_thread); 1282 } 1283 if (CPU->cpu_runrun) 1284 preempt(); 1285 (void) new_mstate(cur_thread, mstate); 1286 1287 /* Kernel probe */ 1288 TNF_PROBE_1(thread_state, "thread", /* CSTYLED */, 1289 tnf_microstate, state, LMS_USER); 1290 1291 return; 1292 1293 cleanup: /* system traps end up here */ 1294 ASSERT(!(type & USER)); 1295 } 1296 1297 /* 1298 * Patch non-zero to disable preemption of threads in the kernel. 1299 */ 1300 int IGNORE_KERNEL_PREEMPTION = 0; /* XXX - delete this someday */ 1301 1302 struct kpreempt_cnts { /* kernel preemption statistics */ 1303 int kpc_idle; /* executing idle thread */ 1304 int kpc_intr; /* executing interrupt thread */ 1305 int kpc_clock; /* executing clock thread */ 1306 int kpc_blocked; /* thread has blocked preemption (t_preempt) */ 1307 int kpc_notonproc; /* thread is surrendering processor */ 1308 int kpc_inswtch; /* thread has ratified scheduling decision */ 1309 int kpc_prilevel; /* processor interrupt level is too high */ 1310 int kpc_apreempt; /* asynchronous preemption */ 1311 int kpc_spreempt; /* synchronous preemption */ 1312 } kpreempt_cnts; 1313 1314 /* 1315 * kernel preemption: forced rescheduling, preempt the running kernel thread. 1316 * the argument is old PIL for an interrupt, 1317 * or the distingished value KPREEMPT_SYNC. 1318 */ 1319 void 1320 kpreempt(int asyncspl) 1321 { 1322 kthread_t *cur_thread = curthread; 1323 1324 if (IGNORE_KERNEL_PREEMPTION) { 1325 aston(CPU->cpu_dispthread); 1326 return; 1327 } 1328 1329 /* 1330 * Check that conditions are right for kernel preemption 1331 */ 1332 do { 1333 if (cur_thread->t_preempt) { 1334 /* 1335 * either a privileged thread (idle, panic, interrupt) 1336 * or will check when t_preempt is lowered 1337 */ 1338 if (cur_thread->t_pri < 0) 1339 kpreempt_cnts.kpc_idle++; 1340 else if (cur_thread->t_flag & T_INTR_THREAD) { 1341 kpreempt_cnts.kpc_intr++; 1342 if (cur_thread->t_pil == CLOCK_LEVEL) 1343 kpreempt_cnts.kpc_clock++; 1344 } else 1345 kpreempt_cnts.kpc_blocked++; 1346 aston(CPU->cpu_dispthread); 1347 return; 1348 } 1349 if (cur_thread->t_state != TS_ONPROC || 1350 cur_thread->t_disp_queue != CPU->cpu_disp) { 1351 /* this thread will be calling swtch() shortly */ 1352 kpreempt_cnts.kpc_notonproc++; 1353 if (CPU->cpu_thread != CPU->cpu_dispthread) { 1354 /* already in swtch(), force another */ 1355 kpreempt_cnts.kpc_inswtch++; 1356 siron(); 1357 } 1358 return; 1359 } 1360 if (getpil() >= DISP_LEVEL) { 1361 /* 1362 * We can't preempt this thread if it is at 1363 * a PIL >= DISP_LEVEL since it may be holding 1364 * a spin lock (like sched_lock). 1365 */ 1366 siron(); /* check back later */ 1367 kpreempt_cnts.kpc_prilevel++; 1368 return; 1369 } 1370 1371 if (asyncspl != KPREEMPT_SYNC) 1372 kpreempt_cnts.kpc_apreempt++; 1373 else 1374 kpreempt_cnts.kpc_spreempt++; 1375 1376 cur_thread->t_preempt++; 1377 preempt(); 1378 cur_thread->t_preempt--; 1379 } while (CPU->cpu_kprunrun); 1380 } 1381 1382 /* 1383 * Print out debugging info. 1384 */ 1385 static void 1386 showregs(uint_t type, struct regs *rp, caddr_t addr) 1387 { 1388 int s; 1389 1390 s = spl7(); 1391 type &= ~USER; 1392 if (u.u_comm[0]) 1393 printf("%s: ", u.u_comm); 1394 if (type < TRAP_TYPES) 1395 printf("#%s %s\n", trap_type_mnemonic[type], trap_type[type]); 1396 else 1397 switch (type) { 1398 case T_SYSCALL: 1399 printf("Syscall Trap:\n"); 1400 break; 1401 case T_AST: 1402 printf("AST\n"); 1403 break; 1404 default: 1405 printf("Bad Trap = %d\n", type); 1406 break; 1407 } 1408 if (type == T_PGFLT) { 1409 printf("Bad %s fault at addr=0x%lx\n", 1410 USERMODE(rp->r_cs) ? "user": "kernel", (uintptr_t)addr); 1411 } else if (addr) { 1412 printf("addr=0x%lx\n", (uintptr_t)addr); 1413 } 1414 1415 printf("pid=%d, pc=0x%lx, sp=0x%lx, eflags=0x%lx\n", 1416 (ttoproc(curthread) && ttoproc(curthread)->p_pidp) ? 1417 ttoproc(curthread)->p_pid : 0, rp->r_pc, rp->r_sp, rp->r_ps); 1418 1419 #if defined(__lint) 1420 /* 1421 * this clause can be deleted when lint bug 4870403 is fixed 1422 * (lint thinks that bit 32 is illegal in a %b format string) 1423 */ 1424 printf("cr0: %x cr4: %b\n", 1425 (uint_t)getcr0(), (uint_t)getcr4(), FMT_CR4); 1426 #else 1427 printf("cr0: %b cr4: %b\n", 1428 (uint_t)getcr0(), FMT_CR0, (uint_t)getcr4(), FMT_CR4); 1429 #endif 1430 1431 #if defined(__amd64) 1432 printf("cr2: %lx cr3: %lx cr8: %lx\n", getcr2(), getcr3(), getcr8()); 1433 #elif defined(__i386) 1434 printf("cr2: %lx cr3: %lx\n", getcr2(), getcr3()); 1435 #endif 1436 1437 dumpregs(rp); 1438 splx(s); 1439 } 1440 1441 static void 1442 dumpregs(struct regs *rp) 1443 { 1444 #if defined(__amd64) 1445 const char fmt[] = "\t%3s: %16lx %3s: %16lx %3s: %16lx\n"; 1446 1447 printf(fmt, "rdi", rp->r_rdi, "rsi", rp->r_rsi, "rdx", rp->r_rdx); 1448 printf(fmt, "rcx", rp->r_rcx, " r8", rp->r_r8, " r9", rp->r_r9); 1449 printf(fmt, "rax", rp->r_rax, "rbx", rp->r_rbx, "rbp", rp->r_rbp); 1450 printf(fmt, "r10", rp->r_r10, "r11", rp->r_r11, "r12", rp->r_r12); 1451 printf(fmt, "r13", rp->r_r13, "r14", rp->r_r14, "r15", rp->r_r15); 1452 1453 printf(fmt, "fsb", rp->r_fsbase, "gsb", rp->r_gsbase, " ds", rp->r_ds); 1454 printf(fmt, " es", rp->r_es, " fs", rp->r_fs, " gs", rp->r_gs); 1455 1456 printf(fmt, "trp", rp->r_trapno, "err", rp->r_err, "rip", rp->r_rip); 1457 printf(fmt, " cs", rp->r_cs, "rfl", rp->r_rfl, "rsp", rp->r_rsp); 1458 1459 printf("\t%3s: %16lx\n", " ss", rp->r_ss); 1460 1461 #elif defined(__i386) 1462 const char fmt[] = "\t%3s: %8lx %3s: %8lx %3s: %8lx %3s: %8lx\n"; 1463 1464 printf(fmt, " gs", rp->r_gs, " fs", rp->r_fs, 1465 " es", rp->r_es, " ds", rp->r_ds); 1466 printf(fmt, "edi", rp->r_edi, "esi", rp->r_esi, 1467 "ebp", rp->r_ebp, "esp", rp->r_esp); 1468 printf(fmt, "ebx", rp->r_ebx, "edx", rp->r_edx, 1469 "ecx", rp->r_ecx, "eax", rp->r_eax); 1470 printf(fmt, "trp", rp->r_trapno, "err", rp->r_err, 1471 "eip", rp->r_eip, " cs", rp->r_cs); 1472 printf("\t%3s: %8lx %3s: %8lx %3s: %8lx\n", 1473 "efl", rp->r_efl, "usp", rp->r_uesp, " ss", rp->r_ss); 1474 1475 #endif /* __i386 */ 1476 } 1477 1478 /* 1479 * Handle #gp faults in kernel mode. 1480 * 1481 * One legitimate way this can happen is if we attempt to update segment 1482 * registers to naughty values on the way out of the kernel. 1483 * 1484 * This can happen in a couple of ways: someone - either accidentally or 1485 * on purpose - creates (setcontext(2), lwp_create(2)) or modifies 1486 * (signal(2)) a ucontext that contains silly segment register values. 1487 * Or someone - either accidentally or on purpose - modifies the prgregset_t 1488 * of a subject process via /proc to contain silly segment register values. 1489 * 1490 * (The unfortunate part is that we can end up discovering the bad segment 1491 * register value in the middle of an 'iret' after we've popped most of the 1492 * stack. So it becomes quite difficult to associate an accurate ucontext 1493 * with the lwp, because the act of taking the #gp trap overwrites most of 1494 * what we were going to send the lwp.) 1495 * 1496 * OTOH if it turns out that's -not- the problem, and we're -not- an lwp 1497 * trying to return to user mode and we get a #gp fault, then we need 1498 * to die() -- which will happen if we return non-zero from this routine. 1499 */ 1500 static int 1501 kern_gpfault(struct regs *rp) 1502 { 1503 kthread_t *t = curthread; 1504 proc_t *p = ttoproc(t); 1505 klwp_t *lwp = ttolwp(t); 1506 struct regs tmpregs, *trp = NULL; 1507 caddr_t pc = (caddr_t)rp->r_pc; 1508 int v; 1509 1510 extern void _sys_rtt(), sr_sup(); 1511 1512 #if defined(__amd64) 1513 extern void _update_sregs(), _update_sregs_done(); 1514 static const uint8_t iretq_insn[2] = { 0x48, 0xcf }; 1515 1516 #elif defined(__i386) 1517 static const uint8_t iret_insn[1] = { 0xcf }; 1518 1519 /* 1520 * Note carefully the appallingly awful dependency between 1521 * the instruction sequence used in __SEGREGS_POP and these 1522 * instructions encoded here. 1523 * 1524 * XX64 Add some commentary to locore.s/privregs.h to document this. 1525 */ 1526 static const uint8_t movw_0_esp_gs[4] = { 0x8e, 0x6c, 0x24, 0x0 }; 1527 static const uint8_t movw_4_esp_fs[4] = { 0x8e, 0x64, 0x24, 0x4 }; 1528 static const uint8_t movw_8_esp_es[4] = { 0x8e, 0x44, 0x24, 0x8 }; 1529 static const uint8_t movw_c_esp_ds[4] = { 0x8e, 0x5c, 0x24, 0xc }; 1530 #endif 1531 /* 1532 * if we're not an lwp, or the pc range is outside _sys_rtt, then 1533 * we should immediately be die()ing horribly 1534 */ 1535 if (lwp == NULL || 1536 (uintptr_t)pc < (uintptr_t)_sys_rtt || 1537 (uintptr_t)pc > (uintptr_t)sr_sup) 1538 return (1); 1539 1540 /* 1541 * So at least we're in the right part of the kernel. 1542 * 1543 * Disassemble the instruction at the faulting pc. 1544 * Once we know what it is, we carefully reconstruct the stack 1545 * based on the order in which the stack is deconstructed in 1546 * _sys_rtt. Ew. 1547 */ 1548 1549 #if defined(__amd64) 1550 1551 if (bcmp(pc, iretq_insn, sizeof (iretq_insn)) == 0) { 1552 /* 1553 * We took the #gp while trying to perform the iretq. 1554 * This means that either %cs or %ss are bad. 1555 * All we know for sure is that most of the general 1556 * registers have been restored, including the 1557 * segment registers, and all we have left on the 1558 * topmost part of the lwp's stack are the 1559 * registers that the iretq was unable to consume. 1560 * 1561 * All the rest of the state was crushed by the #gp 1562 * which pushed -its- registers atop our old save area 1563 * (because we had to decrement the stack pointer, sigh) so 1564 * all that we can try and do is to reconstruct the 1565 * crushed frame from the #gp trap frame itself. 1566 */ 1567 trp = &tmpregs; 1568 trp->r_ss = lwptoregs(lwp)->r_ss; 1569 trp->r_sp = lwptoregs(lwp)->r_sp; 1570 trp->r_ps = lwptoregs(lwp)->r_ps; 1571 trp->r_cs = lwptoregs(lwp)->r_cs; 1572 trp->r_pc = lwptoregs(lwp)->r_pc; 1573 bcopy(rp, trp, offsetof(struct regs, r_pc)); 1574 1575 /* 1576 * Validate simple math 1577 */ 1578 ASSERT(trp->r_pc == lwptoregs(lwp)->r_pc); 1579 ASSERT(trp->r_err == rp->r_err); 1580 1581 } else if ((lwp->lwp_pcb.pcb_flags & RUPDATE_PENDING) != 0 && 1582 pc >= (caddr_t)_update_sregs && 1583 pc < (caddr_t)_update_sregs_done) { 1584 /* 1585 * This is the common case -- we're trying to load 1586 * a bad segment register value in the only section 1587 * of kernel code that ever loads segment registers. 1588 * 1589 * We don't need to do anything at this point because 1590 * the pcb contains all the pending segment register 1591 * state, and the regs are still intact because we 1592 * didn't adjust the stack pointer yet. Given the fidelity 1593 * of all this, we could conceivably send a signal 1594 * to the lwp, rather than core-ing. 1595 */ 1596 trp = lwptoregs(lwp); 1597 ASSERT((caddr_t)trp == (caddr_t)rp->r_sp); 1598 } 1599 1600 #elif defined(__i386) 1601 1602 if (bcmp(pc, iret_insn, sizeof (iret_insn)) == 0) { 1603 /* 1604 * We took the #gp while trying to perform the iret. 1605 * This means that either %cs or %ss are bad. 1606 * All we know for sure is that most of the general 1607 * registers have been restored, including the 1608 * segment registers, and all we have left on the 1609 * topmost part of the lwp's stack are the registers that 1610 * the iret was unable to consume. 1611 * 1612 * All the rest of the state was crushed by the #gp 1613 * which pushed -its- registers atop our old save area 1614 * (because we had to decrement the stack pointer, sigh) so 1615 * all that we can try and do is to reconstruct the 1616 * crushed frame from the #gp trap frame itself. 1617 */ 1618 trp = &tmpregs; 1619 trp->r_ss = lwptoregs(lwp)->r_ss; 1620 trp->r_sp = lwptoregs(lwp)->r_sp; 1621 trp->r_ps = lwptoregs(lwp)->r_ps; 1622 trp->r_cs = lwptoregs(lwp)->r_cs; 1623 trp->r_pc = lwptoregs(lwp)->r_pc; 1624 bcopy(rp, trp, offsetof(struct regs, r_pc)); 1625 1626 ASSERT(trp->r_pc == lwptoregs(lwp)->r_pc); 1627 ASSERT(trp->r_err == rp->r_err); 1628 1629 } else { 1630 /* 1631 * Segment registers are reloaded in _sys_rtt 1632 * via the following sequence: 1633 * 1634 * movw 0(%esp), %gs 1635 * movw 4(%esp), %fs 1636 * movw 8(%esp), %es 1637 * movw 12(%esp), %ds 1638 * addl $16, %esp 1639 * 1640 * Thus if any of them fault, we know the user 1641 * registers are left unharmed on the stack. 1642 */ 1643 if (bcmp(pc, movw_0_esp_gs, sizeof (movw_0_esp_gs)) == 0 || 1644 bcmp(pc, movw_4_esp_fs, sizeof (movw_4_esp_fs)) == 0 || 1645 bcmp(pc, movw_8_esp_es, sizeof (movw_8_esp_es)) == 0 || 1646 bcmp(pc, movw_c_esp_ds, sizeof (movw_c_esp_ds)) == 0) 1647 trp = lwptoregs(lwp); 1648 } 1649 #endif /* __amd64 */ 1650 1651 if (trp == NULL) 1652 return (1); 1653 1654 /* 1655 * If we get to here, we're reasonably confident that we've 1656 * correctly decoded what happened on the way out of the kernel. 1657 * Rewrite the lwp's registers so that we can create a core dump 1658 * the (at least vaguely) represents the mcontext we were 1659 * being asked to restore when things went so terribly wrong. 1660 */ 1661 1662 /* 1663 * Make sure that we have a meaningful %trapno and %err. 1664 */ 1665 trp->r_trapno = rp->r_trapno; 1666 trp->r_err = rp->r_err; 1667 1668 if ((caddr_t)trp != (caddr_t)lwptoregs(lwp)) 1669 bcopy(trp, lwptoregs(lwp), sizeof (*trp)); 1670 1671 mutex_enter(&p->p_lock); 1672 lwp->lwp_cursig = SIGSEGV; 1673 mutex_exit(&p->p_lock); 1674 1675 /* 1676 * Terminate all LWPs but don't discard them. If another lwp beat us to 1677 * the punch by calling exit(), evaporate now. 1678 */ 1679 proc_is_exiting(p); 1680 if (exitlwps(1) != 0) { 1681 mutex_enter(&p->p_lock); 1682 lwp_exit(); 1683 } 1684 1685 #ifdef C2_AUDIT 1686 if (audit_active) /* audit core dump */ 1687 audit_core_start(SIGSEGV); 1688 #endif 1689 v = core(SIGSEGV, B_FALSE); 1690 #ifdef C2_AUDIT 1691 if (audit_active) /* audit core dump */ 1692 audit_core_finish(v ? CLD_KILLED : CLD_DUMPED); 1693 #endif 1694 exit(v ? CLD_KILLED : CLD_DUMPED, SIGSEGV); 1695 return (0); 1696 } 1697 1698 /* 1699 * dump_tss() - Display the TSS structure 1700 */ 1701 1702 #if defined(__amd64) 1703 1704 static void 1705 dump_tss(void) 1706 { 1707 const char tss_fmt[] = "tss.%s:\t0x%p\n"; /* Format string */ 1708 struct tss *tss = CPU->cpu_tss; 1709 1710 printf(tss_fmt, "tss_rsp0", (void *)tss->tss_rsp0); 1711 printf(tss_fmt, "tss_rsp1", (void *)tss->tss_rsp1); 1712 printf(tss_fmt, "tss_rsp2", (void *)tss->tss_rsp2); 1713 1714 printf(tss_fmt, "tss_ist1", (void *)tss->tss_ist1); 1715 printf(tss_fmt, "tss_ist2", (void *)tss->tss_ist2); 1716 printf(tss_fmt, "tss_ist3", (void *)tss->tss_ist3); 1717 printf(tss_fmt, "tss_ist4", (void *)tss->tss_ist4); 1718 printf(tss_fmt, "tss_ist5", (void *)tss->tss_ist5); 1719 printf(tss_fmt, "tss_ist6", (void *)tss->tss_ist6); 1720 printf(tss_fmt, "tss_ist7", (void *)tss->tss_ist7); 1721 } 1722 1723 #elif defined(__i386) 1724 1725 static void 1726 dump_tss(void) 1727 { 1728 const char tss_fmt[] = "tss.%s:\t0x%p\n"; /* Format string */ 1729 struct tss *tss = CPU->cpu_tss; 1730 1731 printf(tss_fmt, "tss_link", (void *)(uintptr_t)tss->tss_link); 1732 printf(tss_fmt, "tss_esp0", (void *)(uintptr_t)tss->tss_esp0); 1733 printf(tss_fmt, "tss_ss0", (void *)(uintptr_t)tss->tss_ss0); 1734 printf(tss_fmt, "tss_esp1", (void *)(uintptr_t)tss->tss_esp1); 1735 printf(tss_fmt, "tss_ss1", (void *)(uintptr_t)tss->tss_ss1); 1736 printf(tss_fmt, "tss_esp2", (void *)(uintptr_t)tss->tss_esp2); 1737 printf(tss_fmt, "tss_ss2", (void *)(uintptr_t)tss->tss_ss2); 1738 printf(tss_fmt, "tss_cr3", (void *)(uintptr_t)tss->tss_cr3); 1739 printf(tss_fmt, "tss_eip", (void *)(uintptr_t)tss->tss_eip); 1740 printf(tss_fmt, "tss_eflags", (void *)(uintptr_t)tss->tss_eflags); 1741 printf(tss_fmt, "tss_eax", (void *)(uintptr_t)tss->tss_eax); 1742 printf(tss_fmt, "tss_ebx", (void *)(uintptr_t)tss->tss_ebx); 1743 printf(tss_fmt, "tss_ecx", (void *)(uintptr_t)tss->tss_ecx); 1744 printf(tss_fmt, "tss_edx", (void *)(uintptr_t)tss->tss_edx); 1745 printf(tss_fmt, "tss_esp", (void *)(uintptr_t)tss->tss_esp); 1746 } 1747 1748 #endif /* __amd64 */ 1749 1750 #if defined(TRAPTRACE) 1751 1752 int ttrace_nrec = 0; /* number of records to dump out */ 1753 int ttrace_dump_nregs = 5; /* dump out this many records with regs too */ 1754 1755 /* 1756 * Dump out the last ttrace_nrec traptrace records on each CPU 1757 */ 1758 static void 1759 dump_ttrace(void) 1760 { 1761 trap_trace_ctl_t *ttc; 1762 trap_trace_rec_t *rec; 1763 uintptr_t current; 1764 int i, j, k; 1765 int n = NCPU; 1766 #if defined(__amd64) 1767 const char banner[] = 1768 "\ncpu address timestamp " 1769 "type vc handler pc\n"; 1770 const char fmt1[] = "%3d %016lx %12llx "; 1771 #elif defined(__i386) 1772 const char banner[] = 1773 "\ncpu address timestamp type vc handler pc\n"; 1774 const char fmt1[] = "%3d %08lx %12llx "; 1775 #endif 1776 const char fmt2[] = "%4s %3x "; 1777 const char fmt3[] = "%8s "; 1778 1779 if (ttrace_nrec == 0) 1780 return; 1781 1782 printf(banner); 1783 1784 for (i = 0; i < n; i++) { 1785 ttc = &trap_trace_ctl[i]; 1786 if (ttc->ttc_first == NULL) 1787 continue; 1788 1789 current = ttc->ttc_next - sizeof (trap_trace_rec_t); 1790 for (j = 0; j < ttrace_nrec; j++) { 1791 struct sysent *sys; 1792 struct autovec *vec; 1793 extern struct av_head autovect[]; 1794 int type; 1795 ulong_t off; 1796 char *sym, *stype; 1797 1798 if (current < ttc->ttc_first) 1799 current = 1800 ttc->ttc_limit - sizeof (trap_trace_rec_t); 1801 1802 if (current == NULL) 1803 continue; 1804 1805 rec = (trap_trace_rec_t *)current; 1806 1807 if (rec->ttr_stamp == 0) 1808 break; 1809 1810 printf(fmt1, i, (uintptr_t)rec, rec->ttr_stamp); 1811 1812 switch (rec->ttr_marker) { 1813 case TT_SYSCALL: 1814 case TT_SYSENTER: 1815 case TT_SYSC: 1816 case TT_SYSC64: 1817 #if defined(__amd64) 1818 sys = &sysent32[rec->ttr_sysnum]; 1819 switch (rec->ttr_marker) { 1820 case TT_SYSC64: 1821 sys = &sysent[rec->ttr_sysnum]; 1822 /*FALLTHROUGH*/ 1823 #elif defined(__i386) 1824 sys = &sysent[rec->ttr_sysnum]; 1825 switch (rec->ttr_marker) { 1826 case TT_SYSC64: 1827 #endif 1828 case TT_SYSC: 1829 stype = "sysc"; /* syscall */ 1830 break; 1831 case TT_SYSCALL: 1832 stype = "lcal"; /* lcall */ 1833 break; 1834 case TT_SYSENTER: 1835 stype = "syse"; /* sysenter */ 1836 break; 1837 default: 1838 break; 1839 } 1840 printf(fmt2, "sysc", rec->ttr_sysnum); 1841 if (sys != NULL) { 1842 sym = kobj_getsymname( 1843 (uintptr_t)sys->sy_callc, 1844 &off); 1845 if (sym != NULL) 1846 printf("%s ", sym); 1847 else 1848 printf("%p ", sys->sy_callc); 1849 } else { 1850 printf("unknown "); 1851 } 1852 break; 1853 1854 case TT_INTERRUPT: 1855 printf(fmt2, "intr", rec->ttr_vector); 1856 vec = (&autovect[rec->ttr_vector])->avh_link; 1857 if (vec != NULL) { 1858 sym = kobj_getsymname( 1859 (uintptr_t)vec->av_vector, &off); 1860 if (sym != NULL) 1861 printf("%s ", sym); 1862 else 1863 printf("%p ", vec->av_vector); 1864 } else { 1865 printf("unknown "); 1866 } 1867 break; 1868 1869 case TT_TRAP: 1870 type = rec->ttr_regs.r_trapno; 1871 printf(fmt2, "trap", type); 1872 printf("#%s ", type < TRAP_TYPES ? 1873 trap_type_mnemonic[type] : "trap"); 1874 break; 1875 1876 default: 1877 break; 1878 } 1879 1880 sym = kobj_getsymname(rec->ttr_regs.r_pc, &off); 1881 if (sym != NULL) 1882 printf("%s+%lx\n", sym, off); 1883 else 1884 printf("%lx\n", rec->ttr_regs.r_pc); 1885 1886 if (ttrace_dump_nregs-- > 0) { 1887 int s; 1888 1889 if (rec->ttr_marker == TT_INTERRUPT) 1890 printf( 1891 "\t\tipl %x spl %x pri %x\n", 1892 rec->ttr_ipl, 1893 rec->ttr_spl, 1894 rec->ttr_pri); 1895 1896 dumpregs(&rec->ttr_regs); 1897 1898 printf("\t%3s: %p\n\n", " ct", 1899 (void *)rec->ttr_curthread); 1900 1901 /* 1902 * print out the pc stack that we recorded 1903 * at trap time (if any) 1904 */ 1905 for (s = 0; s < rec->ttr_sdepth; s++) { 1906 uintptr_t fullpc; 1907 1908 if (s >= TTR_STACK_DEPTH) { 1909 printf("ttr_sdepth corrupt\n"); 1910 break; 1911 } 1912 1913 fullpc = (uintptr_t)rec->ttr_stack[s]; 1914 1915 sym = kobj_getsymname(fullpc, &off); 1916 if (sym != NULL) 1917 printf("-> %s+0x%lx()\n", 1918 sym, off); 1919 else 1920 printf("-> 0x%lx()\n", fullpc); 1921 } 1922 printf("\n"); 1923 } 1924 current -= sizeof (trap_trace_rec_t); 1925 } 1926 } 1927 } 1928 1929 #endif /* TRAPTRACE */ 1930 1931 void 1932 panic_showtrap(struct trap_info *tip) 1933 { 1934 showregs(tip->trap_type, tip->trap_regs, tip->trap_addr); 1935 1936 #if defined(TRAPTRACE) 1937 dump_ttrace(); 1938 #endif /* TRAPTRACE */ 1939 1940 if (tip->trap_type == T_DBLFLT) 1941 dump_tss(); 1942 } 1943 1944 void 1945 panic_savetrap(panic_data_t *pdp, struct trap_info *tip) 1946 { 1947 panic_saveregs(pdp, tip->trap_regs); 1948 } 1949