xref: /titanic_41/usr/src/uts/i86pc/io/pciex/pcie_x86.c (revision e762302f03f5529f83d98085b915143b08d3ae1b)
1*e762302fSShesha Sreenivasamurthy /*
2*e762302fSShesha Sreenivasamurthy  * CDDL HEADER START
3*e762302fSShesha Sreenivasamurthy  *
4*e762302fSShesha Sreenivasamurthy  * The contents of this file are subject to the terms of the
5*e762302fSShesha Sreenivasamurthy  * Common Development and Distribution License (the "License").
6*e762302fSShesha Sreenivasamurthy  * You may not use this file except in compliance with the License.
7*e762302fSShesha Sreenivasamurthy  *
8*e762302fSShesha Sreenivasamurthy  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9*e762302fSShesha Sreenivasamurthy  * or http://www.opensolaris.org/os/licensing.
10*e762302fSShesha Sreenivasamurthy  * See the License for the specific language governing permissions
11*e762302fSShesha Sreenivasamurthy  * and limitations under the License.
12*e762302fSShesha Sreenivasamurthy  *
13*e762302fSShesha Sreenivasamurthy  * When distributing Covered Code, include this CDDL HEADER in each
14*e762302fSShesha Sreenivasamurthy  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15*e762302fSShesha Sreenivasamurthy  * If applicable, add the following below this CDDL HEADER, with the
16*e762302fSShesha Sreenivasamurthy  * fields enclosed by brackets "[]" replaced with your own identifying
17*e762302fSShesha Sreenivasamurthy  * information: Portions Copyright [yyyy] [name of copyright owner]
18*e762302fSShesha Sreenivasamurthy  *
19*e762302fSShesha Sreenivasamurthy  * CDDL HEADER END
20*e762302fSShesha Sreenivasamurthy  */
21*e762302fSShesha Sreenivasamurthy /*
22*e762302fSShesha Sreenivasamurthy  * Copyright 2009 Sun Microsystems, Inc.  All rights reserved.
23*e762302fSShesha Sreenivasamurthy  * Use is subject to license terms.
24*e762302fSShesha Sreenivasamurthy  */
25*e762302fSShesha Sreenivasamurthy 
26*e762302fSShesha Sreenivasamurthy #include <sys/types.h>
27*e762302fSShesha Sreenivasamurthy #include <sys/ddi.h>
28*e762302fSShesha Sreenivasamurthy #include <sys/kmem.h>
29*e762302fSShesha Sreenivasamurthy #include <sys/sysmacros.h>
30*e762302fSShesha Sreenivasamurthy #include <sys/sunddi.h>
31*e762302fSShesha Sreenivasamurthy #include <sys/sunpm.h>
32*e762302fSShesha Sreenivasamurthy #include <sys/epm.h>
33*e762302fSShesha Sreenivasamurthy #include <sys/sunndi.h>
34*e762302fSShesha Sreenivasamurthy #include <sys/ddi_impldefs.h>
35*e762302fSShesha Sreenivasamurthy #include <sys/ddi_implfuncs.h>
36*e762302fSShesha Sreenivasamurthy #include <sys/pcie.h>
37*e762302fSShesha Sreenivasamurthy #include <sys/pcie_impl.h>
38*e762302fSShesha Sreenivasamurthy #include <sys/pcie_pwr.h>
39*e762302fSShesha Sreenivasamurthy #include <sys/pcie_acpi.h>	/* pcie_x86_priv_t */
40*e762302fSShesha Sreenivasamurthy 
41*e762302fSShesha Sreenivasamurthy void
pcie_init_plat(dev_info_t * dip)42*e762302fSShesha Sreenivasamurthy pcie_init_plat(dev_info_t *dip)
43*e762302fSShesha Sreenivasamurthy {
44*e762302fSShesha Sreenivasamurthy 	pcie_bus_t	*bus_p = PCIE_DIP2BUS(dip);
45*e762302fSShesha Sreenivasamurthy 	bus_p->bus_plat_private =
46*e762302fSShesha Sreenivasamurthy 	    (pcie_x86_priv_t *)kmem_zalloc(sizeof (pcie_x86_priv_t), KM_SLEEP);
47*e762302fSShesha Sreenivasamurthy }
48*e762302fSShesha Sreenivasamurthy 
49*e762302fSShesha Sreenivasamurthy void
pcie_fini_plat(dev_info_t * dip)50*e762302fSShesha Sreenivasamurthy pcie_fini_plat(dev_info_t *dip)
51*e762302fSShesha Sreenivasamurthy {
52*e762302fSShesha Sreenivasamurthy 	pcie_bus_t	*bus_p = PCIE_DIP2BUS(dip);
53*e762302fSShesha Sreenivasamurthy 
54*e762302fSShesha Sreenivasamurthy 	kmem_free(bus_p->bus_plat_private, sizeof (pcie_x86_priv_t));
55*e762302fSShesha Sreenivasamurthy }
56*e762302fSShesha Sreenivasamurthy 
57*e762302fSShesha Sreenivasamurthy /* ARGSUSED */
58*e762302fSShesha Sreenivasamurthy int
pcie_plat_pwr_setup(dev_info_t * dip)59*e762302fSShesha Sreenivasamurthy pcie_plat_pwr_setup(dev_info_t *dip)
60*e762302fSShesha Sreenivasamurthy {
61*e762302fSShesha Sreenivasamurthy 	return (DDI_SUCCESS);
62*e762302fSShesha Sreenivasamurthy }
63*e762302fSShesha Sreenivasamurthy 
64*e762302fSShesha Sreenivasamurthy /*
65*e762302fSShesha Sreenivasamurthy  * Undo whatever is done in pcie_plat_pwr_common_setup
66*e762302fSShesha Sreenivasamurthy  */
67*e762302fSShesha Sreenivasamurthy /* ARGSUSED */
68*e762302fSShesha Sreenivasamurthy void
pcie_plat_pwr_teardown(dev_info_t * dip)69*e762302fSShesha Sreenivasamurthy pcie_plat_pwr_teardown(dev_info_t *dip)
70*e762302fSShesha Sreenivasamurthy {
71*e762302fSShesha Sreenivasamurthy }
72