1 /* 2 * CDDL HEADER START 3 * 4 * The contents of this file are subject to the terms of the 5 * Common Development and Distribution License (the "License"). 6 * You may not use this file except in compliance with the License. 7 * 8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 9 * or http://www.opensolaris.org/os/licensing. 10 * See the License for the specific language governing permissions 11 * and limitations under the License. 12 * 13 * When distributing Covered Code, include this CDDL HEADER in each 14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 15 * If applicable, add the following below this CDDL HEADER, with the 16 * fields enclosed by brackets "[]" replaced with your own identifying 17 * information: Portions Copyright [yyyy] [name of copyright owner] 18 * 19 * CDDL HEADER END 20 */ 21 22 /* 23 * Copyright 2006 Sun Microsystems, Inc. All rights reserved. 24 * Use is subject to license terms. 25 */ 26 27 #ifndef _PCI_PCI_COMMON_H 28 #define _PCI_PCI_COMMON_H 29 30 #pragma ident "%Z%%M% %I% %E% SMI" 31 32 #ifdef __cplusplus 33 extern "C" { 34 #endif 35 36 /* 37 * Common header file with definitions shared between 38 * pci(7d) and npe(7d) 39 */ 40 41 /* State structure. */ 42 typedef struct pci_state { 43 dev_info_t *pci_dip; 44 int pci_fmcap; 45 ddi_iblock_cookie_t pci_fm_ibc; 46 kmutex_t pci_peek_poke_mutex; 47 kmutex_t pci_err_mutex; 48 } pci_state_t; 49 50 /* AMD's northbridges vendor-id and device-ids */ 51 #define AMD_NTBRDIGE_VID 0x1022 /* AMD vendor-id */ 52 #define AMD_HT_NTBRIDGE_DID 0x1100 /* HT Configuration */ 53 #define AMD_AM_NTBRIDGE_DID 0x1101 /* Address Map */ 54 #define AMD_DC_NTBRIDGE_DID 0x1102 /* DRAM Controller */ 55 #define AMD_MC_NTBRIDGE_DID 0x1103 /* Misc Controller */ 56 57 /* 58 * Check if the given device is an AMD northbridge 59 */ 60 #define IS_AMD_NTBRIDGE(vid, did) \ 61 (((vid) == AMD_NTBRDIGE_VID) && \ 62 (((did) == AMD_HT_NTBRIDGE_DID) || \ 63 ((did) == AMD_AM_NTBRIDGE_DID) || \ 64 ((did) == AMD_DC_NTBRIDGE_DID) || \ 65 ((did) == AMD_MC_NTBRIDGE_DID))) 66 67 /* 68 * Check if the give device is a PCI northbridge 69 */ 70 int is_amd_northbridge(dev_info_t *dip); 71 72 /* 73 * These are the access routines. 74 * The pci_bus_map sets the handle to point to these in pci(7d). 75 * The npe_bus_map sets the handle to point to these in npe(7d). 76 */ 77 uint8_t pci_config_rd8(ddi_acc_impl_t *hdlp, uint8_t *addr); 78 uint16_t pci_config_rd16(ddi_acc_impl_t *hdlp, uint16_t *addr); 79 uint32_t pci_config_rd32(ddi_acc_impl_t *hdlp, uint32_t *addr); 80 uint64_t pci_config_rd64(ddi_acc_impl_t *hdlp, uint64_t *addr); 81 82 void pci_config_wr8(ddi_acc_impl_t *hdlp, uint8_t *addr, 83 uint8_t value); 84 void pci_config_wr16(ddi_acc_impl_t *hdlp, uint16_t *addr, 85 uint16_t value); 86 void pci_config_wr32(ddi_acc_impl_t *hdlp, uint32_t *addr, 87 uint32_t value); 88 void pci_config_wr64(ddi_acc_impl_t *hdlp, uint64_t *addr, 89 uint64_t value); 90 91 void pci_config_rep_rd8(ddi_acc_impl_t *hdlp, uint8_t *host_addr, 92 uint8_t *dev_addr, size_t repcount, uint_t flags); 93 void pci_config_rep_rd16(ddi_acc_impl_t *hdlp, uint16_t *host_addr, 94 uint16_t *dev_addr, size_t repcount, uint_t flags); 95 void pci_config_rep_rd32(ddi_acc_impl_t *hdlp, uint32_t *host_addr, 96 uint32_t *dev_addr, size_t repcount, uint_t flags); 97 void pci_config_rep_rd64(ddi_acc_impl_t *hdlp, uint64_t *host_addr, 98 uint64_t *dev_addr, size_t repcount, uint_t flags); 99 100 void pci_config_rep_wr8(ddi_acc_impl_t *hdlp, uint8_t *host_addr, 101 uint8_t *dev_addr, size_t repcount, uint_t flags); 102 void pci_config_rep_wr16(ddi_acc_impl_t *hdlp, uint16_t *host_addr, 103 uint16_t *dev_addr, size_t repcount, uint_t flags); 104 void pci_config_rep_wr32(ddi_acc_impl_t *hdlp, uint32_t *host_addr, 105 uint32_t *dev_addr, size_t repcount, uint_t flags); 106 void pci_config_rep_wr64(ddi_acc_impl_t *hdlp, uint64_t *host_addr, 107 uint64_t *dev_addr, size_t repcount, uint_t flags); 108 109 /* 110 * PCI tool related declarations 111 */ 112 int pci_common_ioctl(dev_info_t *dip, dev_t dev, int cmd, 113 intptr_t arg, int mode, cred_t *credp, int *rvalp); 114 115 /* 116 * Interrupt related declaration 117 */ 118 int pci_common_intr_ops(dev_info_t *, dev_info_t *, ddi_intr_op_t, 119 ddi_intr_handle_impl_t *, void *); 120 void pci_common_set_parent_private_data(dev_info_t *); 121 122 /* 123 * Miscellaneous library functions 124 */ 125 int pci_common_get_reg_prop(dev_info_t *dip, pci_regspec_t *pci_rp); 126 int pci_common_name_child(dev_info_t *child, char *name, int namelen); 127 int pci_common_peekpoke(dev_info_t *dip, dev_info_t *rdip, 128 ddi_ctl_enum_t ctlop, void *arg, void *result); 129 int pci_fm_acc_setup(ddi_acc_hdl_t *hp, off_t offset, off_t len); 130 131 #ifdef __cplusplus 132 } 133 #endif 134 135 #endif /* _PCI_PCI_COMMON_H */ 136