1 /* 2 * CDDL HEADER START 3 * 4 * The contents of this file are subject to the terms of the 5 * Common Development and Distribution License (the "License"). 6 * You may not use this file except in compliance with the License. 7 * 8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 9 * or http://www.opensolaris.org/os/licensing. 10 * See the License for the specific language governing permissions 11 * and limitations under the License. 12 * 13 * When distributing Covered Code, include this CDDL HEADER in each 14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 15 * If applicable, add the following below this CDDL HEADER, with the 16 * fields enclosed by brackets "[]" replaced with your own identifying 17 * information: Portions Copyright [yyyy] [name of copyright owner] 18 * 19 * CDDL HEADER END 20 */ 21 22 /* 23 * Copyright 2006 Sun Microsystems, Inc. All rights reserved. 24 * Use is subject to license terms. 25 */ 26 27 #ifndef _AO_H 28 #define _AO_H 29 30 #pragma ident "%Z%%M% %I% %E% SMI" 31 32 #include <sys/types.h> 33 #include <sys/mc.h> 34 #include <sys/mca_amd.h> 35 #include <sys/cpu_module_impl.h> 36 #include <sys/nvpair.h> 37 #include <sys/cyclic.h> 38 #include <sys/errorq.h> 39 #include <sys/kobj.h> 40 #include <sys/fm/util.h> 41 42 #ifdef __cplusplus 43 extern "C" { 44 #endif 45 46 #define AO_MCA_MAX_ERRORS 10 47 48 typedef struct ao_data ao_data_t; 49 50 typedef struct ao_bank_regs { 51 uint32_t abr_status; 52 uint32_t abr_addr; 53 uint32_t abr_misc; 54 } ao_bank_regs_t; 55 56 extern ao_bank_regs_t ao_bank_regs[AMD_MCA_BANK_COUNT]; 57 58 /* 59 * Rather than using torturous conditionals, we match errors using a table of 60 * ao_error_disp_t's. The members in the ao_error_disp_t are matched against 61 * the value of MCi_STATUS, with a successful match indicating that the given 62 * error occurred. 63 * 64 * While aed_stat_code will match most of the status code bits, a few of the 65 * status code fields are either/or, and are treated separately so as to 66 * minimize the number of ao_error_disp_t structures that must be created. 67 * For example, the dc.tag_par error can have r4 values drd or dwr. Rather 68 * than creating two ao_error_disp_t's, we use the separate aed_stat_r4_bits 69 * field to indicate both AO_MCA_R4_BIT_DRD and AO_MCA_R4_BIT_DWD. As the 70 * matching r4 values are drawn from aed_stat_r4_bits, we don't use the r4 71 * bits in aed_stat_code for matching. Similar reasoning lies behind the 72 * creation of the pp and ii fields. 73 */ 74 #define AO_AED_PANIC_NEVER 0x00 75 #define AO_AED_PANIC_IFMCE 0x01 76 #define AO_AED_PANIC_ALWAYS 0x80 77 78 #define AO_AED_F_CORRECTABLE 0x01 79 #define AO_AED_F_LOFAULT_OK 0x02 80 81 typedef struct ao_error_disp { 82 const char *aed_class; /* ereport class for use if match */ 83 uint64_t aed_ereport_members; /* ereport contents flags if match */ 84 uint64_t aed_stat_mask; /* status msr bits for match */ 85 uint64_t aed_stat_mask_res; /* status mask result for match */ 86 uint16_t aed_stat_code; /* status code for match */ 87 uint8_t aed_stat_extcode; /* extended status code for match */ 88 uint8_t aed_stat_pp_bits:4; /* AO_MCA_PP_BIT_* for pp matching */ 89 uint8_t aed_stat_ii_bits:4; /* AO_MCA_II_BIT_* for ii matching */ 90 uint16_t aed_stat_r4_bits; /* AO_MCA_R4_BIT_* for r4 matching */ 91 uint8_t aed_panic_when; /* extra conditions for panic */ 92 uint8_t aed_flags; /* AO_AED_F_* */ 93 } ao_error_disp_t; 94 95 /* 96 * The poller has two parts. First is the omni cyclic, which runs on all 97 * CPUs, and which polls the error MSRs at some fixed (long) interval. This 98 * cyclic will run on all machines, all the time, and thus must have minimal 99 * runtime impact. The second portion of the poller is manually-initiated, and 100 * is used by the error injector/synthesizer to request an immediate poll of the 101 * error state registers. 102 * 103 * With this number of moving parts, it is essential that we have some sort of 104 * audit log for post-mortem analysis. A circular array of trace buffers 105 * (ao_mca_poll_trace_t structures) is kept to record this activity. Whenever 106 * an event occurs that is of interest to the poller, an entry is made in 107 * the trace array describing that event. 108 */ 109 #define AO_MPT_WHAT_CYC_ERR 0 /* cyclic-induced poll */ 110 #define AO_MPT_WHAT_POKE_ERR 1 /* manually-induced poll */ 111 #define AO_MPT_WHAT_UNFAULTING 2 /* discarded error state */ 112 113 typedef struct ao_mca_poll_trace { 114 hrtime_t mpt_when; /* timestamp of event */ 115 uint8_t mpt_what; /* AO_MPT_WHAT_* (which event?) */ 116 uint8_t mpt_nerr; /* number of errors discovered */ 117 uint16_t mpt_pad1; 118 uint32_t mpt_pad2; 119 } ao_mca_poll_trace_t; 120 121 /* 122 * Processor error state is saved in logout areas. There are three separate 123 * logout areas, each used for a different purpose. The logout areas are stored 124 * in an array (ao_mca_logout), indexed by the AO_MCA_LOGOUT_* macros. 125 * 126 * The save areas are: 127 * 128 * 1. Exception handler MSR save - Written to by the initial portion of the #mc 129 * handler. Read from by the main body of the exception handler. 130 * 131 * 3. Poller MSR save - Used by the poller to store error state MSR values. 132 * While this logout area doesn't necessarily have to live in the ao_mca_t, 133 * it does so to enhance observability. 134 * 135 * The logout areas contain both global error state (acl_ip, acl_timestamp, 136 * etc.), as well as a bank array. The bank array contains one ao_bank_logout_t 137 * per error reporting bank. 138 */ 139 140 typedef struct ao_bank_logout { 141 uint64_t abl_status; /* Saved MCi_STATUS register */ 142 uint64_t abl_addr; /* Saved MCi_ADDR register */ 143 uint64_t abl_misc; /* Saved MCi_MISC register */ 144 } ao_bank_logout_t; 145 146 #define AO_ACL_F_PRIV 0x1 /* #mc in kernel mode (else user) */ 147 #define AO_ACL_F_FATAL 0x2 /* logout detected fatal error(s) */ 148 149 typedef struct ao_cpu_logout { 150 ao_data_t *acl_ao; /* pointer to per-cpu ao_data_t */ 151 uintptr_t acl_ip; /* instruction pointer if #mc trap */ 152 uint64_t acl_timestamp; /* gethrtime() at time of logout */ 153 uint64_t acl_mcg_status; /* MCG_STATUS register value */ 154 ao_bank_logout_t acl_banks[AMD_MCA_BANK_COUNT]; /* bank state saves */ 155 pc_t acl_stack[FM_STK_DEPTH]; /* saved stack trace (if any) */ 156 int acl_stackdepth; /* saved stack trace depth */ 157 uint_t acl_flags; /* flags (see AO_ACL_F_* above) */ 158 } ao_cpu_logout_t; 159 160 /* Index for ao_mca_logout, below */ 161 #define AO_MCA_LOGOUT_EXCEPTION 0 162 #define AO_MCA_LOGOUT_POLLER 1 163 #define AO_MCA_LOGOUT_NUM 2 164 165 #define AO_MCA_F_UNFAULTING 0x1 /* CPU exiting faulted state */ 166 167 /* 168 * We store config as inherited from the BIOS to assist in troubleshooting. 169 * The NorthBridge config is stored in the chipshared structure below. 170 */ 171 typedef struct ao_bios_cfg { 172 uint64_t bcfg_bank_ctl[AMD_MCA_BANK_COUNT]; 173 uint64_t bcfg_bank_mask[AMD_MCA_BANK_COUNT]; 174 uint64_t bcfg_bank_misc[AMD_MCA_BANK_COUNT]; 175 } ao_bios_cfg_t; 176 177 /* 178 * The master data structure used to hold MCA-related state. 179 */ 180 typedef struct ao_mca { 181 ao_bios_cfg_t ao_mca_bios_cfg; /* Bank and NB config before our init */ 182 ao_cpu_logout_t ao_mca_logout[AO_MCA_LOGOUT_NUM]; /* save areas */ 183 kmutex_t ao_mca_poll_lock; /* keep pollers from colliding */ 184 ao_mca_poll_trace_t *ao_mca_poll_trace; /* trace buffers for this cpu */ 185 uint_t ao_mca_poll_curtrace; /* most recently-filled trace buffer */ 186 uint_t ao_mca_flags; /* AO_MCA_F_* */ 187 } ao_mca_t; 188 189 /* 190 * Per-chip state 191 */ 192 struct ao_chipshared { 193 uint32_t aos_chiprev; /* Chip revision */ 194 volatile ulong_t aos_cfgonce; /* Config performed once per chip */ 195 kmutex_t aos_nb_poll_lock; /* Keep NB pollers from colliding */ 196 uint64_t aos_nb_poll_timestamp; /* Timestamp of last NB poll */ 197 int aos_nb_poll_owner; /* The cpuid of current NB poller */ 198 uint64_t aos_bcfg_nb_ctl; /* BIOS value of MC4_CTL */ 199 uint64_t aos_bcfg_nb_mask; /* BIOS value of MC4_MASK */ 200 uint64_t aos_bcfg_nb_misc; /* BIOS value of MC4_MISC */ 201 uint32_t aos_bcfg_nb_cfg; /* BIOS value of NB MCA Config */ 202 uint32_t aos_bcfg_nb_sparectl; /* BIOS value of Online Spare Control */ 203 }; 204 205 /* Bit numbers for aos_cfgonce */ 206 enum ao_cfgonce_bitnum { 207 AO_CFGONCE_NBMCA 208 }; 209 210 211 /* 212 * Per-CPU state 213 */ 214 struct ao_data { 215 ao_mca_t ao_mca; /* MCA state for this CPU */ 216 cpu_t *ao_cpu; /* link to CPU's cpu_t */ 217 const cmi_mc_ops_t *ao_mc_ops; /* memory controller ops */ 218 void *ao_mc_data; /* argument for MC ops */ 219 struct ao_chipshared *ao_shared; /* Shared state for the chip */ 220 }; 221 222 #ifdef _KERNEL 223 224 struct regs; 225 226 extern errorq_t *ao_mca_queue; 227 extern const cmi_ops_t _cmi_ops; 228 229 extern void ao_faulted_enter(void *); 230 extern void ao_faulted_exit(void *); 231 extern int ao_scrubber_enable(void *, uint64_t, uint64_t, int); 232 233 extern void ao_mca_post_init(void *); 234 extern void ao_mca_init(void *); 235 extern int ao_mca_trap(void *, struct regs *); 236 extern int ao_mca_inject(void *, cmi_mca_regs_t *, uint_t); 237 extern void ao_mca_poke(void *); 238 extern void ao_mca_poll_init(ao_data_t *, int); 239 extern void ao_mca_poll_start(void); 240 241 extern int ao_mca_logout(ao_cpu_logout_t *, struct regs *, int *, int, 242 uint32_t); 243 extern void ao_mca_drain(void *, const void *, const errorq_elem_t *); 244 extern nvlist_t *ao_fmri_create(ao_data_t *, nv_alloc_t *); 245 246 extern void ao_mc_register(void *, const cmi_mc_ops_t *, void *); 247 extern const struct cmi_mc_ops *ao_mc_getops(void *); 248 extern int ao_mc_patounum(ao_data_t *, uint64_t, uint32_t, int, mc_unum_t *); 249 extern int ao_mc_unumtopa(ao_data_t *, mc_unum_t *, nvlist_t *, uint64_t *); 250 251 extern void ao_pcicfg_write(uint_t, uint_t, uint_t, uint32_t); 252 extern uint32_t ao_pcicfg_read(uint_t, uint_t, uint_t); 253 254 extern int ao_chip_once(ao_data_t *, enum ao_cfgonce_bitnum); 255 256 #endif /* _KERNEL */ 257 258 #ifdef __cplusplus 259 } 260 #endif 261 262 #endif /* _AO_H */ 263