xref: /titanic_41/usr/src/uts/common/xen/public/xen.h (revision e5ba14ff435beeefdaa2e6649e175c74afe02c76)
1 /******************************************************************************
2  * xen.h
3  *
4  * Guest OS interface to Xen.
5  *
6  * Permission is hereby granted, free of charge, to any person obtaining a copy
7  * of this software and associated documentation files (the "Software"), to
8  * deal in the Software without restriction, including without limitation the
9  * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
10  * sell copies of the Software, and to permit persons to whom the Software is
11  * furnished to do so, subject to the following conditions:
12  *
13  * The above copyright notice and this permission notice shall be included in
14  * all copies or substantial portions of the Software.
15  *
16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
19  * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22  * DEALINGS IN THE SOFTWARE.
23  *
24  * Copyright (c) 2004, K A Fraser
25  */
26 
27 #ifndef __XEN_PUBLIC_XEN_H__
28 #define __XEN_PUBLIC_XEN_H__
29 
30 #include "xen-compat.h"
31 
32 #if defined(__i386) && !defined(__i386__)
33 #define __i386__
34 #endif
35 
36 #if defined(__amd64) && !defined(__x86_64__)
37 #define __x86_64__
38 #endif
39 
40 #if defined(_ASM) && !defined(__ASSEMBLY__)
41 #define __ASSEMBLY__
42 #endif
43 
44 #if defined(__i386__) || defined(__x86_64__)
45 #include "arch-x86/xen.h"
46 #elif defined(__ia64__)
47 #include "arch-ia64.h"
48 #elif defined(__powerpc__)
49 #include "arch-powerpc.h"
50 #else
51 #error "Unsupported architecture"
52 #endif
53 
54 /*
55  * HYPERCALLS
56  */
57 
58 #define __HYPERVISOR_set_trap_table        0
59 #define __HYPERVISOR_mmu_update            1
60 #define __HYPERVISOR_set_gdt               2
61 #define __HYPERVISOR_stack_switch          3
62 #define __HYPERVISOR_set_callbacks         4
63 #define __HYPERVISOR_fpu_taskswitch        5
64 #define __HYPERVISOR_sched_op_compat       6 /* compat since 0x00030101 */
65 #define __HYPERVISOR_platform_op           7
66 #define __HYPERVISOR_set_debugreg          8
67 #define __HYPERVISOR_get_debugreg          9
68 #define __HYPERVISOR_update_descriptor    10
69 #define __HYPERVISOR_memory_op            12
70 #define __HYPERVISOR_multicall            13
71 #define __HYPERVISOR_update_va_mapping    14
72 #define __HYPERVISOR_set_timer_op         15
73 #define __HYPERVISOR_event_channel_op_compat 16 /* compat since 0x00030202 */
74 #define __HYPERVISOR_xen_version          17
75 #define __HYPERVISOR_console_io           18
76 #define __HYPERVISOR_physdev_op_compat    19 /* compat since 0x00030202 */
77 #define __HYPERVISOR_grant_table_op       20
78 #define __HYPERVISOR_vm_assist            21
79 #define __HYPERVISOR_update_va_mapping_otherdomain 22
80 #define __HYPERVISOR_iret                 23 /* x86 only */
81 #define __HYPERVISOR_vcpu_op              24
82 #define __HYPERVISOR_set_segment_base     25 /* x86/64 only */
83 #define __HYPERVISOR_mmuext_op            26
84 #define __HYPERVISOR_acm_op               27
85 #define __HYPERVISOR_nmi_op               28
86 #define __HYPERVISOR_sched_op             29
87 #define __HYPERVISOR_callback_op          30
88 #define __HYPERVISOR_xenoprof_op          31
89 #define __HYPERVISOR_event_channel_op     32
90 #define __HYPERVISOR_physdev_op           33
91 #define __HYPERVISOR_hvm_op               34
92 #define __HYPERVISOR_sysctl               35
93 #define __HYPERVISOR_domctl               36
94 #define __HYPERVISOR_kexec_op             37
95 
96 /* Architecture-specific hypercall definitions. */
97 #define __HYPERVISOR_arch_0               48
98 #define __HYPERVISOR_arch_1               49
99 #define __HYPERVISOR_arch_2               50
100 #define __HYPERVISOR_arch_3               51
101 #define __HYPERVISOR_arch_4               52
102 #define __HYPERVISOR_arch_5               53
103 #define __HYPERVISOR_arch_6               54
104 #define __HYPERVISOR_arch_7               55
105 
106 /*
107  * HYPERCALL COMPATIBILITY.
108  */
109 
110 /* New sched_op hypercall introduced in 0x00030101. */
111 #if __XEN_INTERFACE_VERSION__ < 0x00030101
112 #undef __HYPERVISOR_sched_op
113 #define __HYPERVISOR_sched_op __HYPERVISOR_sched_op_compat
114 #endif
115 
116 /* New event-channel and physdev hypercalls introduced in 0x00030202. */
117 #if __XEN_INTERFACE_VERSION__ < 0x00030202
118 #undef __HYPERVISOR_event_channel_op
119 #define __HYPERVISOR_event_channel_op __HYPERVISOR_event_channel_op_compat
120 #undef __HYPERVISOR_physdev_op
121 #define __HYPERVISOR_physdev_op __HYPERVISOR_physdev_op_compat
122 #endif
123 
124 /* New platform_op hypercall introduced in 0x00030204. */
125 #if __XEN_INTERFACE_VERSION__ < 0x00030204
126 #define __HYPERVISOR_dom0_op __HYPERVISOR_platform_op
127 #endif
128 
129 /*
130  * VIRTUAL INTERRUPTS
131  *
132  * Virtual interrupts that a guest OS may receive from Xen.
133  *
134  * In the side comments, 'V.' denotes a per-VCPU VIRQ while 'G.' denotes a
135  * global VIRQ. The former can be bound once per VCPU and cannot be re-bound.
136  * The latter can be allocated only once per guest: they must initially be
137  * allocated to VCPU0 but can subsequently be re-bound.
138  */
139 #define VIRQ_TIMER      0  /* V. Timebase update, and/or requested timeout.  */
140 #define VIRQ_DEBUG      1  /* V. Request guest to dump debug info.           */
141 #define VIRQ_CONSOLE    2  /* G. (DOM0) Bytes received on emergency console. */
142 #define VIRQ_DOM_EXC    3  /* G. (DOM0) Exceptional event for some domain.   */
143 #define VIRQ_TBUF       4  /* G. (DOM0) Trace buffer has records available.  */
144 #define VIRQ_DEBUGGER   6  /* G. (DOM0) A domain has paused for debugging.   */
145 #define VIRQ_XENOPROF   7  /* V. XenOprofile interrupt: new sample available */
146 
147 /* Architecture-specific VIRQ definitions. */
148 #define VIRQ_ARCH_0    16
149 #define VIRQ_ARCH_1    17
150 #define VIRQ_ARCH_2    18
151 #define VIRQ_ARCH_3    19
152 #define VIRQ_ARCH_4    20
153 #define VIRQ_ARCH_5    21
154 #define VIRQ_ARCH_6    22
155 #define VIRQ_ARCH_7    23
156 
157 #define NR_VIRQS       24
158 
159 /*
160  * MMU-UPDATE REQUESTS
161  *
162  * HYPERVISOR_mmu_update() accepts a list of (ptr, val) pairs.
163  * A foreigndom (FD) can be specified (or DOMID_SELF for none).
164  * Where the FD has some effect, it is described below.
165  * ptr[1:0] specifies the appropriate MMU_* command.
166  *
167  * ptr[1:0] == MMU_NORMAL_PT_UPDATE:
168  * Updates an entry in a page table. If updating an L1 table, and the new
169  * table entry is valid/present, the mapped frame must belong to the FD, if
170  * an FD has been specified. If attempting to map an I/O page then the
171  * caller assumes the privilege of the FD.
172  * FD == DOMID_IO: Permit /only/ I/O mappings, at the priv level of the caller.
173  * FD == DOMID_XEN: Map restricted areas of Xen's heap space.
174  * ptr[:2]  -- Machine address of the page-table entry to modify.
175  * val      -- Value to write.
176  *
177  * ptr[1:0] == MMU_MACHPHYS_UPDATE:
178  * Updates an entry in the machine->pseudo-physical mapping table.
179  * ptr[:2]  -- Machine address within the frame whose mapping to modify.
180  *             The frame must belong to the FD, if one is specified.
181  * val      -- Value to write into the mapping entry.
182  */
183 #define MMU_NORMAL_PT_UPDATE     0 /* checked '*ptr = val'. ptr is MA.       */
184 #define MMU_MACHPHYS_UPDATE      1 /* ptr = MA of frame to modify entry for  */
185 
186 /*
187  * MMU EXTENDED OPERATIONS
188  *
189  * HYPERVISOR_mmuext_op() accepts a list of mmuext_op structures.
190  * A foreigndom (FD) can be specified (or DOMID_SELF for none).
191  * Where the FD has some effect, it is described below.
192  *
193  * cmd: MMUEXT_(UN)PIN_*_TABLE
194  * mfn: Machine frame number to be (un)pinned as a p.t. page.
195  *      The frame must belong to the FD, if one is specified.
196  *
197  * cmd: MMUEXT_NEW_BASEPTR
198  * mfn: Machine frame number of new page-table base to install in MMU.
199  *
200  * cmd: MMUEXT_NEW_USER_BASEPTR [x86/64 only]
201  * mfn: Machine frame number of new page-table base to install in MMU
202  *      when in user space.
203  *
204  * cmd: MMUEXT_TLB_FLUSH_LOCAL
205  * No additional arguments. Flushes local TLB.
206  *
207  * cmd: MMUEXT_INVLPG_LOCAL
208  * linear_addr: Linear address to be flushed from the local TLB.
209  *
210  * cmd: MMUEXT_TLB_FLUSH_MULTI
211  * vcpumask: Pointer to bitmap of VCPUs to be flushed.
212  *
213  * cmd: MMUEXT_INVLPG_MULTI
214  * linear_addr: Linear address to be flushed.
215  * vcpumask: Pointer to bitmap of VCPUs to be flushed.
216  *
217  * cmd: MMUEXT_TLB_FLUSH_ALL
218  * No additional arguments. Flushes all VCPUs' TLBs.
219  *
220  * cmd: MMUEXT_INVLPG_ALL
221  * linear_addr: Linear address to be flushed from all VCPUs' TLBs.
222  *
223  * cmd: MMUEXT_FLUSH_CACHE
224  * No additional arguments. Writes back and flushes cache contents.
225  *
226  * cmd: MMUEXT_SET_LDT
227  * linear_addr: Linear address of LDT base (NB. must be page-aligned).
228  * nr_ents: Number of entries in LDT.
229  */
230 #define MMUEXT_PIN_L1_TABLE      0
231 #define MMUEXT_PIN_L2_TABLE      1
232 #define MMUEXT_PIN_L3_TABLE      2
233 #define MMUEXT_PIN_L4_TABLE      3
234 #define MMUEXT_UNPIN_TABLE       4
235 #define MMUEXT_NEW_BASEPTR       5
236 #define MMUEXT_TLB_FLUSH_LOCAL   6
237 #define MMUEXT_INVLPG_LOCAL      7
238 #define MMUEXT_TLB_FLUSH_MULTI   8
239 #define MMUEXT_INVLPG_MULTI      9
240 #define MMUEXT_TLB_FLUSH_ALL    10
241 #define MMUEXT_INVLPG_ALL       11
242 #define MMUEXT_FLUSH_CACHE      12
243 #define MMUEXT_SET_LDT          13
244 #define MMUEXT_NEW_USER_BASEPTR 15
245 
246 #ifndef __ASSEMBLY__
247 struct mmuext_op {
248     unsigned int cmd;
249     union {
250         /* [UN]PIN_TABLE, NEW_BASEPTR, NEW_USER_BASEPTR */
251         xen_pfn_t     mfn;
252         /* INVLPG_LOCAL, INVLPG_ALL, SET_LDT */
253         unsigned long linear_addr;
254     } arg1;
255     union {
256         /* SET_LDT */
257         unsigned int nr_ents;
258         /* TLB_FLUSH_MULTI, INVLPG_MULTI */
259         XEN_GUEST_HANDLE_00030205(void) vcpumask;
260     } arg2;
261 };
262 typedef struct mmuext_op mmuext_op_t;
263 DEFINE_XEN_GUEST_HANDLE(mmuext_op_t);
264 #endif
265 
266 /* These are passed as 'flags' to update_va_mapping. They can be ORed. */
267 /* When specifying UVMF_MULTI, also OR in a pointer to a CPU bitmap.   */
268 /* UVMF_LOCAL is merely UVMF_MULTI with a NULL bitmap pointer.         */
269 #define UVMF_NONE               (0UL<<0) /* No flushing at all.   */
270 #define UVMF_TLB_FLUSH          (1UL<<0) /* Flush entire TLB(s).  */
271 #define UVMF_INVLPG             (2UL<<0) /* Flush only one entry. */
272 #define UVMF_FLUSHTYPE_MASK     (3UL<<0)
273 #define UVMF_MULTI              (0UL<<2) /* Flush subset of TLBs. */
274 #define UVMF_LOCAL              (0UL<<2) /* Flush local TLB.      */
275 #define UVMF_ALL                (1UL<<2) /* Flush all TLBs.       */
276 
277 /*
278  * Commands to HYPERVISOR_console_io().
279  */
280 #define CONSOLEIO_write         0
281 #define CONSOLEIO_read          1
282 #define CONSOLEIO_get_device   32
283 
284 /*
285  * Commands to HYPERVISOR_vm_assist().
286  */
287 #define VMASST_CMD_enable                0
288 #define VMASST_CMD_disable               1
289 
290 /* x86/32 guests: simulate full 4GB segment limits. */
291 #define VMASST_TYPE_4gb_segments         0
292 
293 /* x86/32 guests: trap (vector 15) whenever above vmassist is used. */
294 #define VMASST_TYPE_4gb_segments_notify  1
295 
296 /*
297  * x86 guests: support writes to bottom-level PTEs.
298  * NB1. Page-directory entries cannot be written.
299  * NB2. Guest must continue to remove all writable mappings of PTEs.
300  */
301 #define VMASST_TYPE_writable_pagetables  2
302 
303 /* x86/PAE guests: support PDPTs above 4GB. */
304 #define VMASST_TYPE_pae_extended_cr3     3
305 
306 #define MAX_VMASST_TYPE                  3
307 
308 #ifndef __ASSEMBLY__
309 
310 typedef uint16_t domid_t;
311 
312 /* Domain ids >= DOMID_FIRST_RESERVED cannot be used for ordinary domains. */
313 #define DOMID_FIRST_RESERVED (0x7FF0U)
314 
315 /* DOMID_SELF is used in certain contexts to refer to oneself. */
316 #define DOMID_SELF (0x7FF0U)
317 
318 /*
319  * DOMID_IO is used to restrict page-table updates to mapping I/O memory.
320  * Although no Foreign Domain need be specified to map I/O pages, DOMID_IO
321  * is useful to ensure that no mappings to the OS's own heap are accidentally
322  * installed. (e.g., in Linux this could cause havoc as reference counts
323  * aren't adjusted on the I/O-mapping code path).
324  * This only makes sense in MMUEXT_SET_FOREIGNDOM, but in that context can
325  * be specified by any calling domain.
326  */
327 #define DOMID_IO   (0x7FF1U)
328 
329 /*
330  * DOMID_XEN is used to allow privileged domains to map restricted parts of
331  * Xen's heap space (e.g., the machine_to_phys table).
332  * This only makes sense in MMUEXT_SET_FOREIGNDOM, and is only permitted if
333  * the caller is privileged.
334  */
335 #define DOMID_XEN  (0x7FF2U)
336 
337 /*
338  * Send an array of these to HYPERVISOR_mmu_update().
339  * NB. The fields are natural pointer/address size for this architecture.
340  */
341 struct mmu_update {
342     uint64_t ptr;       /* Machine address of PTE. */
343     uint64_t val;       /* New contents of PTE.    */
344 };
345 typedef struct mmu_update mmu_update_t;
346 DEFINE_XEN_GUEST_HANDLE(mmu_update_t);
347 
348 /*
349  * Send an array of these to HYPERVISOR_multicall().
350  * NB. The fields are natural register size for this architecture.
351  */
352 struct multicall_entry {
353     unsigned long op, result;
354     unsigned long args[6];
355 };
356 typedef struct multicall_entry multicall_entry_t;
357 DEFINE_XEN_GUEST_HANDLE(multicall_entry_t);
358 
359 /*
360  * Event channel endpoints per domain:
361  *  1024 if a long is 32 bits; 4096 if a long is 64 bits.
362  */
363 #define NR_EVENT_CHANNELS (sizeof(unsigned long) * sizeof(unsigned long) * 64)
364 
365 struct vcpu_time_info {
366     /*
367      * Updates to the following values are preceded and followed by an
368      * increment of 'version'. The guest can therefore detect updates by
369      * looking for changes to 'version'. If the least-significant bit of
370      * the version number is set then an update is in progress and the guest
371      * must wait to read a consistent set of values.
372      * The correct way to interact with the version number is similar to
373      * Linux's seqlock: see the implementations of read_seqbegin/read_seqretry.
374      */
375     uint32_t version;
376     uint32_t pad0;
377     uint64_t tsc_timestamp;   /* TSC at last update of time vals.  */
378     uint64_t system_time;     /* Time, in nanosecs, since boot.    */
379     /*
380      * Current system time:
381      *   system_time +
382      *   ((((tsc - tsc_timestamp) << tsc_shift) * tsc_to_system_mul) >> 32)
383      * CPU frequency (Hz):
384      *   ((10^9 << 32) / tsc_to_system_mul) >> tsc_shift
385      */
386     uint32_t tsc_to_system_mul;
387     int8_t   tsc_shift;
388     int8_t   pad1[3];
389 }; /* 32 bytes */
390 typedef struct vcpu_time_info vcpu_time_info_t;
391 
392 struct vcpu_info {
393     /*
394      * 'evtchn_upcall_pending' is written non-zero by Xen to indicate
395      * a pending notification for a particular VCPU. It is then cleared
396      * by the guest OS /before/ checking for pending work, thus avoiding
397      * a set-and-check race. Note that the mask is only accessed by Xen
398      * on the CPU that is currently hosting the VCPU. This means that the
399      * pending and mask flags can be updated by the guest without special
400      * synchronisation (i.e., no need for the x86 LOCK prefix).
401      * This may seem suboptimal because if the pending flag is set by
402      * a different CPU then an IPI may be scheduled even when the mask
403      * is set. However, note:
404      *  1. The task of 'interrupt holdoff' is covered by the per-event-
405      *     channel mask bits. A 'noisy' event that is continually being
406      *     triggered can be masked at source at this very precise
407      *     granularity.
408      *  2. The main purpose of the per-VCPU mask is therefore to restrict
409      *     reentrant execution: whether for concurrency control, or to
410      *     prevent unbounded stack usage. Whatever the purpose, we expect
411      *     that the mask will be asserted only for short periods at a time,
412      *     and so the likelihood of a 'spurious' IPI is suitably small.
413      * The mask is read before making an event upcall to the guest: a
414      * non-zero mask therefore guarantees that the VCPU will not receive
415      * an upcall activation. The mask is cleared when the VCPU requests
416      * to block: this avoids wakeup-waiting races.
417      */
418     uint8_t evtchn_upcall_pending;
419     uint8_t evtchn_upcall_mask;
420     unsigned long evtchn_pending_sel;
421     struct arch_vcpu_info arch;
422     struct vcpu_time_info time;
423 }; /* 64 bytes (x86) */
424 typedef struct vcpu_info vcpu_info_t;
425 
426 /*
427  * Xen/kernel shared data -- pointer provided in start_info.
428  *
429  * This structure is defined to be both smaller than a page, and the
430  * only data on the shared page, but may vary in actual size even within
431  * compatible Xen versions; guests should not rely on the size
432  * of this structure remaining constant.
433  */
434 struct shared_info {
435     struct vcpu_info vcpu_info[MAX_VIRT_CPUS];
436 
437     /*
438      * A domain can create "event channels" on which it can send and receive
439      * asynchronous event notifications. There are three classes of event that
440      * are delivered by this mechanism:
441      *  1. Bi-directional inter- and intra-domain connections. Domains must
442      *     arrange out-of-band to set up a connection (usually by allocating
443      *     an unbound 'listener' port and avertising that via a storage service
444      *     such as xenstore).
445      *  2. Physical interrupts. A domain with suitable hardware-access
446      *     privileges can bind an event-channel port to a physical interrupt
447      *     source.
448      *  3. Virtual interrupts ('events'). A domain can bind an event-channel
449      *     port to a virtual interrupt source, such as the virtual-timer
450      *     device or the emergency console.
451      *
452      * Event channels are addressed by a "port index". Each channel is
453      * associated with two bits of information:
454      *  1. PENDING -- notifies the domain that there is a pending notification
455      *     to be processed. This bit is cleared by the guest.
456      *  2. MASK -- if this bit is clear then a 0->1 transition of PENDING
457      *     will cause an asynchronous upcall to be scheduled. This bit is only
458      *     updated by the guest. It is read-only within Xen. If a channel
459      *     becomes pending while the channel is masked then the 'edge' is lost
460      *     (i.e., when the channel is unmasked, the guest must manually handle
461      *     pending notifications as no upcall will be scheduled by Xen).
462      *
463      * To expedite scanning of pending notifications, any 0->1 pending
464      * transition on an unmasked channel causes a corresponding bit in a
465      * per-vcpu selector word to be set. Each bit in the selector covers a
466      * 'C long' in the PENDING bitfield array.
467      */
468     unsigned long evtchn_pending[sizeof(unsigned long) * 8];
469     unsigned long evtchn_mask[sizeof(unsigned long) * 8];
470 
471     /*
472      * Wallclock time: updated only by control software. Guests should base
473      * their gettimeofday() syscall on this wallclock-base value.
474      */
475     uint32_t wc_version;      /* Version counter: see vcpu_time_info_t. */
476     uint32_t wc_sec;          /* Secs  00:00:00 UTC, Jan 1, 1970.  */
477     uint32_t wc_nsec;         /* Nsecs 00:00:00 UTC, Jan 1, 1970.  */
478 
479     struct arch_shared_info arch;
480 
481 };
482 typedef struct shared_info shared_info_t;
483 
484 /*
485  * Start-of-day memory layout for the initial domain (DOM0):
486  *  1. The domain is started within contiguous virtual-memory region.
487  *  2. The contiguous region begins and ends on an aligned 4MB boundary.
488  *  3. The region start corresponds to the load address of the OS image.
489  *     If the load address is not 4MB aligned then the address is rounded down.
490  *  4. This the order of bootstrap elements in the initial virtual region:
491  *      a. relocated kernel image
492  *      b. initial ram disk              [mod_start, mod_len]
493  *      c. list of allocated page frames [mfn_list, nr_pages]
494  *      d. start_info_t structure        [register ESI (x86)]
495  *      e. bootstrap page tables         [pt_base, CR3 (x86)]
496  *      f. bootstrap stack               [register ESP (x86)]
497  *  5. Bootstrap elements are packed together, but each is 4kB-aligned.
498  *  6. The initial ram disk may be omitted.
499  *  7. The list of page frames forms a contiguous 'pseudo-physical' memory
500  *     layout for the domain. In particular, the bootstrap virtual-memory
501  *     region is a 1:1 mapping to the first section of the pseudo-physical map.
502  *  8. All bootstrap elements are mapped read-writable for the guest OS. The
503  *     only exception is the bootstrap page table, which is mapped read-only.
504  *  9. There is guaranteed to be at least 512kB padding after the final
505  *     bootstrap element. If necessary, the bootstrap virtual region is
506  *     extended by an extra 4MB to ensure this.
507  */
508 
509 #define MAX_GUEST_CMDLINE 1024
510 struct start_info {
511     /* THE FOLLOWING ARE FILLED IN BOTH ON INITIAL BOOT AND ON RESUME.    */
512     char magic[32];             /* "xen-<version>-<platform>".            */
513     unsigned long nr_pages;     /* Total pages allocated to this domain.  */
514     unsigned long shared_info;  /* MACHINE address of shared info struct. */
515     uint32_t flags;             /* SIF_xxx flags.                         */
516     xen_pfn_t store_mfn;        /* MACHINE page number of shared page.    */
517     uint32_t store_evtchn;      /* Event channel for store communication. */
518     union {
519         struct {
520             xen_pfn_t mfn;      /* MACHINE page number of console page.   */
521             uint32_t  evtchn;   /* Event channel for console page.        */
522         } domU;
523         struct {
524             uint32_t info_off;  /* Offset of console_info struct.         */
525             uint32_t info_size; /* Size of console_info struct from start.*/
526         } dom0;
527     } console;
528     /* THE FOLLOWING ARE ONLY FILLED IN ON INITIAL BOOT (NOT RESUME).     */
529     unsigned long pt_base;      /* VIRTUAL address of page directory.     */
530     unsigned long nr_pt_frames; /* Number of bootstrap p.t. frames.       */
531     unsigned long mfn_list;     /* VIRTUAL address of page-frame list.    */
532     unsigned long mod_start;    /* VIRTUAL address of pre-loaded module.  */
533     unsigned long mod_len;      /* Size (bytes) of pre-loaded module.     */
534     int8_t cmd_line[MAX_GUEST_CMDLINE];
535 };
536 typedef struct start_info start_info_t;
537 
538 /* New console union for dom0 introduced in 0x00030203. */
539 #if __XEN_INTERFACE_VERSION__ < 0x00030203
540 #define console_mfn    console.domU.mfn
541 #define console_evtchn console.domU.evtchn
542 #endif
543 
544 /* These flags are passed in the 'flags' field of start_info_t. */
545 #define SIF_PRIVILEGED    (1<<0)  /* Is the domain privileged? */
546 #define SIF_INITDOMAIN    (1<<1)  /* Is this the initial control domain? */
547 
548 #define XEN_CONSOLE_INVALID   -1
549 #define XEN_CONSOLE_COM1       0
550 #define XEN_CONSOLE_COM2       1
551 #define XEN_CONSOLE_VGA        2
552 
553 typedef struct dom0_vga_console_info {
554     uint8_t video_type; /* DOM0_VGA_CONSOLE_??? */
555 #define XEN_VGATYPE_TEXT_MODE_3 0x03
556 #define XEN_VGATYPE_VESA_LFB    0x23
557 
558     union {
559         struct {
560             /* Font height, in pixels. */
561             uint16_t font_height;
562             /* Cursor location (column, row). */
563             uint16_t cursor_x, cursor_y;
564             /* Number of rows and columns (dimensions in characters). */
565             uint16_t rows, columns;
566         } text_mode_3;
567 
568         struct {
569             /* Width and height, in pixels. */
570             uint16_t width, height;
571             /* Bytes per scan line. */
572             uint16_t bytes_per_line;
573             /* Bits per pixel. */
574             uint16_t bits_per_pixel;
575             /* LFB physical address, and size (in units of 64kB). */
576             uint32_t lfb_base;
577             uint32_t lfb_size;
578             /* RGB mask offsets and sizes, as defined by VBE 1.2+ */
579             uint8_t  red_pos, red_size;
580             uint8_t  green_pos, green_size;
581             uint8_t  blue_pos, blue_size;
582             uint8_t  rsvd_pos, rsvd_size;
583         } vesa_lfb;
584     } u;
585 } dom0_vga_console_info_t;
586 
587 typedef uint8_t xen_domain_handle_t[16];
588 
589 /* Turn a plain number into a C unsigned long constant. */
590 #define __mk_unsigned_long(x) x ## UL
591 #define mk_unsigned_long(x) __mk_unsigned_long(x)
592 
593 DEFINE_XEN_GUEST_HANDLE(uint8_t);
594 DEFINE_XEN_GUEST_HANDLE(uint16_t);
595 DEFINE_XEN_GUEST_HANDLE(uint32_t);
596 DEFINE_XEN_GUEST_HANDLE(uint64_t);
597 
598 #else /* __ASSEMBLY__ */
599 
600 /* In assembly code we cannot use C numeric constant suffixes. */
601 #define mk_unsigned_long(x) x
602 
603 #endif /* !__ASSEMBLY__ */
604 
605 #endif /* __XEN_PUBLIC_XEN_H__ */
606 
607 /*
608  * Local variables:
609  * mode: C
610  * c-set-style: "BSD"
611  * c-basic-offset: 4
612  * tab-width: 4
613  * indent-tabs-mode: nil
614  * End:
615  */
616