xref: /titanic_41/usr/src/uts/common/xen/public/trace.h (revision 17169044f903cb92234f23d0ba0ce43449614a4d)
1 /******************************************************************************
2  * include/public/trace.h
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a copy
5  * of this software and associated documentation files (the "Software"), to
6  * deal in the Software without restriction, including without limitation the
7  * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
8  * sell copies of the Software, and to permit persons to whom the Software is
9  * furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice shall be included in
12  * all copies or substantial portions of the Software.
13  *
14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
17  * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
18  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
19  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
20  * DEALINGS IN THE SOFTWARE.
21  *
22  * Mark Williamson, (C) 2004 Intel Research Cambridge
23  * Copyright (C) 2005 Bin Ren
24  */
25 
26 #ifndef __XEN_PUBLIC_TRACE_H__
27 #define __XEN_PUBLIC_TRACE_H__
28 
29 /* Trace classes */
30 #define TRC_CLS_SHIFT 16
31 #define TRC_GEN     0x0001f000    /* General trace            */
32 #define TRC_SCHED   0x0002f000    /* Xen Scheduler trace      */
33 #define TRC_DOM0OP  0x0004f000    /* Xen DOM0 operation trace */
34 #define TRC_HVM     0x0008f000    /* Xen HVM trace            */
35 #define TRC_MEM     0x0010f000    /* Xen memory trace         */
36 #define TRC_ALL     0xfffff000
37 
38 /* Trace subclasses */
39 #define TRC_SUBCLS_SHIFT 12
40 
41 /* trace subclasses for SVM */
42 #define TRC_HVM_ENTRYEXIT 0x00081000   /* VMENTRY and #VMEXIT       */
43 #define TRC_HVM_HANDLER   0x00082000   /* various HVM handlers      */
44 
45 /* Trace events per class */
46 #define TRC_LOST_RECORDS        (TRC_GEN + 1)
47 
48 #define TRC_SCHED_DOM_ADD       (TRC_SCHED +  1)
49 #define TRC_SCHED_DOM_REM       (TRC_SCHED +  2)
50 #define TRC_SCHED_SLEEP         (TRC_SCHED +  3)
51 #define TRC_SCHED_WAKE          (TRC_SCHED +  4)
52 #define TRC_SCHED_YIELD         (TRC_SCHED +  5)
53 #define TRC_SCHED_BLOCK         (TRC_SCHED +  6)
54 #define TRC_SCHED_SHUTDOWN      (TRC_SCHED +  7)
55 #define TRC_SCHED_CTL           (TRC_SCHED +  8)
56 #define TRC_SCHED_ADJDOM        (TRC_SCHED +  9)
57 #define TRC_SCHED_SWITCH        (TRC_SCHED + 10)
58 #define TRC_SCHED_S_TIMER_FN    (TRC_SCHED + 11)
59 #define TRC_SCHED_T_TIMER_FN    (TRC_SCHED + 12)
60 #define TRC_SCHED_DOM_TIMER_FN  (TRC_SCHED + 13)
61 #define TRC_SCHED_SWITCH_INFPREV (TRC_SCHED + 14)
62 #define TRC_SCHED_SWITCH_INFNEXT (TRC_SCHED + 15)
63 
64 #define TRC_MEM_PAGE_GRANT_MAP      (TRC_MEM + 1)
65 #define TRC_MEM_PAGE_GRANT_UNMAP    (TRC_MEM + 2)
66 #define TRC_MEM_PAGE_GRANT_TRANSFER (TRC_MEM + 3)
67 
68 /* trace events per subclass */
69 #define TRC_HVM_VMENTRY         (TRC_HVM_ENTRYEXIT + 0x01)
70 #define TRC_HVM_VMEXIT          (TRC_HVM_ENTRYEXIT + 0x02)
71 #define TRC_HVM_PF_XEN          (TRC_HVM_HANDLER + 0x01)
72 #define TRC_HVM_PF_INJECT       (TRC_HVM_HANDLER + 0x02)
73 #define TRC_HVM_INJ_EXC         (TRC_HVM_HANDLER + 0x03)
74 #define TRC_HVM_INJ_VIRQ        (TRC_HVM_HANDLER + 0x04)
75 #define TRC_HVM_REINJ_VIRQ      (TRC_HVM_HANDLER + 0x05)
76 #define TRC_HVM_IO_READ         (TRC_HVM_HANDLER + 0x06)
77 #define TRC_HVM_IO_WRITE        (TRC_HVM_HANDLER + 0x07)
78 #define TRC_HVM_CR_READ         (TRC_HVM_HANDLER + 0x08)
79 #define TRC_HVM_CR_WRITE        (TRC_HVM_HANDLER + 0x09)
80 #define TRC_HVM_DR_READ         (TRC_HVM_HANDLER + 0x0A)
81 #define TRC_HVM_DR_WRITE        (TRC_HVM_HANDLER + 0x0B)
82 #define TRC_HVM_MSR_READ        (TRC_HVM_HANDLER + 0x0C)
83 #define TRC_HVM_MSR_WRITE       (TRC_HVM_HANDLER + 0x0D)
84 #define TRC_HVM_CPUID           (TRC_HVM_HANDLER + 0x0E)
85 #define TRC_HVM_INTR            (TRC_HVM_HANDLER + 0x0F)
86 #define TRC_HVM_NMI             (TRC_HVM_HANDLER + 0x10)
87 #define TRC_HVM_SMI             (TRC_HVM_HANDLER + 0x11)
88 #define TRC_HVM_VMMCALL         (TRC_HVM_HANDLER + 0x12)
89 #define TRC_HVM_HLT             (TRC_HVM_HANDLER + 0x13)
90 #define TRC_HVM_INVLPG          (TRC_HVM_HANDLER + 0x14)
91 #define TRC_HVM_MCE             (TRC_HVM_HANDLER + 0x15)
92 
93 /* This structure represents a single trace buffer record. */
94 struct t_rec {
95     uint64_t cycles;          /* cycle counter timestamp */
96     uint32_t event;           /* event ID                */
97     unsigned long data[5];    /* event data items        */
98 };
99 
100 /*
101  * This structure contains the metadata for a single trace buffer.  The head
102  * field, indexes into an array of struct t_rec's.
103  */
104 struct t_buf {
105     uint32_t cons;      /* Next item to be consumed by control tools. */
106     uint32_t prod;      /* Next item to be produced by Xen.           */
107     /* 'nr_recs' records follow immediately after the meta-data header.    */
108 };
109 
110 #endif /* __XEN_PUBLIC_TRACE_H__ */
111 
112 /*
113  * Local variables:
114  * mode: C
115  * c-set-style: "BSD"
116  * c-basic-offset: 4
117  * tab-width: 4
118  * indent-tabs-mode: nil
119  * End:
120  */
121