xref: /titanic_41/usr/src/uts/common/sys/pit.h (revision 505d05c73a6e56769f263d4803b22eddd168ee24)
1 /*
2  * CDDL HEADER START
3  *
4  * The contents of this file are subject to the terms of the
5  * Common Development and Distribution License, Version 1.0 only
6  * (the "License").  You may not use this file except in compliance
7  * with the License.
8  *
9  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
10  * or http://www.opensolaris.org/os/licensing.
11  * See the License for the specific language governing permissions
12  * and limitations under the License.
13  *
14  * When distributing Covered Code, include this CDDL HEADER in each
15  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
16  * If applicable, add the following below this CDDL HEADER, with the
17  * fields enclosed by brackets "[]" replaced with your own identifying
18  * information: Portions Copyright [yyyy] [name of copyright owner]
19  *
20  * CDDL HEADER END
21  */
22 /*	Copyright (c) 1990, 1991 UNIX System Laboratories, Inc.	*/
23 /*	Copyright (c) 1984, 1986, 1987, 1988, 1989, 1990 AT&T	*/
24 /*	All Rights Reserved	*/
25 
26 /*
27  * Copyright 2003 Sun Microsystems, Inc.  All rights reserved.
28  * Use is subject to license terms.
29  */
30 
31 #ifndef _SYS_PIT_H
32 #define	_SYS_PIT_H
33 
34 #pragma ident	"%Z%%M%	%I%	%E% SMI"
35 
36 #ifdef __cplusplus
37 extern "C" {
38 #endif
39 
40 /* Definitions for 8254 Programmable Interrupt Timer ports on AT 386 */
41 #define	PITCTR0_PORT	0x40		/* counter 0 port */
42 #define	PITCTR1_PORT	0x41		/* counter 1 port */
43 #define	PITCTR2_PORT	0x42		/* counter 2 port */
44 #define	PITCTL_PORT	0x43		/* PIT control port */
45 #define	PITAUX_PORT	0x61		/* PIT auxiliary port */
46 #define	SANITY_CTR0	0x48		/* sanity timer counter */
47 #define	SANITY_CTL	0x4B		/* sanity control word */
48 #define	SANITY_CHECK	0x461		/* bit 7 set if sanity timer went off */
49 #define	FAILSAFE_NMI	0x80		/* to test if sanity timer went off */
50 #define	ENABLE_SANITY	0x04		/* Enables sanity clock NMI ints */
51 #define	RESET_SANITY	0x00		/* resets sanity NMI interrupt */
52 
53 /* PIT Status Byte */
54 
55 #define	PITSTAT_OUTPUT	7		/* OUTPUT status bit */
56 #define	PITSTAT_NULLCNT	6		/* NULL COUNT status bit */
57 
58 /* Definitions for 8254 commands */
59 
60 #define	PIT_READBACK	0xc0		/* read-back command */
61 #define	PIT_READBACKC0	0x02		/* enable read-back for counter 0 */
62 
63 /* Following are used for Timer 0 */
64 #define	PIT_C0		0x00		/* select counter 0 */
65 #define	PIT_LOADMODE	0x30		/* load least significant byte */
66 					/* followed by most significant byte */
67 #define	PIT_NDIVMODE	0x04		/* divide by N counter */
68 #define	PIT_SQUAREMODE	0x06		/* square-wave mode */
69 #define	PIT_ENDSIGMODE	0x00		/* assert OUT at end-of-count mode */
70 
71 /* Used for Timer 1. Used for delay calculations in countdown mode */
72 #define	PIT_C1		0x40		/* select counter 1 */
73 #define	PIT_READMODE	0x30		/* read or load least significant */
74 					/* byte followed by most significant */
75 #define	PIT_RATEMODE	0x06		/* square-wave mode for USART */
76 
77 
78 #define	SANITY_NUM	0xFFFF		/* Sanity timer fires every .2 secs */
79 /* bits used in auxiliary control port for timer 2 */
80 #define	PITAUX_GATE2	0x01		/* aux port, PIT gate 2 input */
81 #define	PITAUX_OUT2	0x02		/* aux port, PIT clock out 2 enable */
82 #define	PIT_HZ		1193182		/* 8254's cycles per second */
83 
84 #ifdef __cplusplus
85 }
86 #endif
87 
88 #endif	/* _SYS_PIT_H */
89