1 /* 2 * CDDL HEADER START 3 * 4 * The contents of this file are subject to the terms of the 5 * Common Development and Distribution License, Version 1.0 only 6 * (the "License"). You may not use this file except in compliance 7 * with the License. 8 * 9 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 10 * or http://www.opensolaris.org/os/licensing. 11 * See the License for the specific language governing permissions 12 * and limitations under the License. 13 * 14 * When distributing Covered Code, include this CDDL HEADER in each 15 * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 16 * If applicable, add the following below this CDDL HEADER, with the 17 * fields enclosed by brackets "[]" replaced with your own identifying 18 * information: Portions Copyright [yyyy] [name of copyright owner] 19 * 20 * CDDL HEADER END 21 */ 22 /* 23 * Copyright 2005 Sun Microsystems, Inc. All rights reserved. 24 * Use is subject to license terms. 25 */ 26 27 #ifndef _SYS_PCI_TOOLS_H 28 #define _SYS_PCI_TOOLS_H 29 30 #pragma ident "%Z%%M% %I% %E% SMI" 31 32 #include <sys/modctl.h> 33 34 #ifdef __cplusplus 35 extern "C" { 36 #endif 37 38 /* 39 * Versioning. Have different versions for userland program and drivers, so 40 * they can all stay in sync with each other. 41 */ 42 #define PCITOOL_USER_VERSION 1 43 #define PCITOOL_DRVR_VERSION 1 44 45 /* File suffixes for nexus pcitool nodes. */ 46 #define PCI_MINOR_REG "reg" 47 #define PCI_MINOR_INTR "intr" 48 49 /* 50 * Ioctls for PCI tools. 51 */ 52 #define PCITOOL_IOC (('P' << 24) | ('C' << 16) | ('T' << 8)) 53 54 /* Read/write a device on a PCI bus, in physical space. */ 55 #define PCITOOL_DEVICE_GET_REG (PCITOOL_IOC | 1) 56 #define PCITOOL_DEVICE_SET_REG (PCITOOL_IOC | 2) 57 58 /* Read/write the PCI nexus bridge, in physical space. */ 59 #define PCITOOL_NEXUS_GET_REG (PCITOOL_IOC | 3) 60 #define PCITOOL_NEXUS_SET_REG (PCITOOL_IOC | 4) 61 62 /* Get/set interrupt-CPU mapping for PCI devices. */ 63 #define PCITOOL_DEVICE_GET_INTR (PCITOOL_IOC | 5) 64 #define PCITOOL_DEVICE_SET_INTR (PCITOOL_IOC | 6) 65 66 /* Return the number of supported interrupts on a PCI bus. */ 67 #define PCITOOL_DEVICE_NUM_INTR (PCITOOL_IOC | 7) 68 69 70 /* 71 * This file contains data structures for the pci tool. 72 */ 73 #define PCITOOL_CONFIG 0 74 #define PCITOOL_BAR0 1 75 #define PCITOOL_BAR1 2 76 #define PCITOOL_BAR2 3 77 #define PCITOOL_BAR3 4 78 #define PCITOOL_BAR4 5 79 #define PCITOOL_BAR5 6 80 #define PCITOOL_ROM 7 81 82 /* 83 * BAR corresponding to space desired. 84 */ 85 typedef enum { 86 config = PCITOOL_CONFIG, 87 bar0 = PCITOOL_BAR0, 88 bar1 = PCITOOL_BAR1, 89 bar2 = PCITOOL_BAR2, 90 bar3 = PCITOOL_BAR3, 91 bar4 = PCITOOL_BAR4, 92 bar5 = PCITOOL_BAR5, 93 rom = PCITOOL_ROM 94 } pcitool_bars_t; 95 96 97 /* 98 * PCITOOL error numbers. 99 */ 100 101 typedef enum { 102 PCITOOL_SUCCESS = 0x0, 103 PCITOOL_INVALID_CPUID, 104 PCITOOL_INVALID_INO, 105 PCITOOL_PENDING_INTRTIMEOUT, 106 PCITOOL_REGPROP_NOTWELLFORMED, 107 PCITOOL_INVALID_ADDRESS, 108 PCITOOL_NOT_ALIGNED, 109 PCITOOL_OUT_OF_RANGE, 110 PCITOOL_END_OF_RANGE, 111 PCITOOL_ROM_DISABLED, 112 PCITOOL_ROM_WRITE, 113 PCITOOL_IO_ERROR, 114 PCITOOL_INVALID_SIZE 115 } pcitool_errno_t; 116 117 118 /* 119 * PCITOOL_DEVICE_SET_INTR ioctl data structure to re-assign the interrupts. 120 */ 121 typedef struct pcitool_intr_set { 122 uint16_t user_version; /* Userland program version - to krnl */ 123 uint16_t drvr_version; /* Driver version - from kernel */ 124 uint32_t ino; /* interrupt to set - to kernel */ 125 uint32_t cpu_id; /* to: cpu to set / from: old cpu returned */ 126 pcitool_errno_t status; /* from kernel */ 127 } pcitool_intr_set_t; 128 129 130 /* 131 * PCITOOL_DEVICE_GET_INTR ioctl data structure to dump out the 132 * ino mapping information. 133 */ 134 135 typedef struct pcitool_intr_dev { 136 uint32_t dev_inst; /* device instance - from kernel */ 137 char driver_name[MAXMODCONFNAME]; /* from kernel */ 138 char path[MAXPATHLEN]; /* device path - from kernel */ 139 } pcitool_intr_dev_t; 140 141 142 typedef struct pcitool_intr_get { 143 uint16_t user_version; /* Userland program version - to krnl */ 144 uint16_t drvr_version; /* Driver version - from kernel */ 145 uint32_t ino; /* interrupt number - to kernel */ 146 uint8_t num_devs_ret; /* room for this # of devs to be */ 147 /* returned - to kernel */ 148 /* # devs returned - from kernel */ 149 uint8_t num_devs; /* # devs on this ino - from kernel */ 150 /* intrs enabled for devs if > 0 */ 151 uint8_t ctlr; /* controller number - from kernel */ 152 uint32_t cpu_id; /* cpu of interrupt - from kernel */ 153 pcitool_errno_t status; /* returned status - from kernel */ 154 pcitool_intr_dev_t dev[1]; /* start of variable device list */ 155 /* from kernel */ 156 } pcitool_intr_get_t; 157 158 /* 159 * Get the size needed to return the number of devices wanted. 160 * Can't say num_devs - 1 as num_devs may be unsigned. 161 */ 162 #define PCITOOL_IGET_SIZE(num_devs) \ 163 (sizeof (pcitool_intr_get_t) - \ 164 sizeof (pcitool_intr_dev_t) + \ 165 (num_devs * sizeof (pcitool_intr_dev_t))) 166 167 /* 168 * Size and endian fields for acc_attr bitmask. 169 */ 170 #define PCITOOL_ACC_ATTR_SIZE_MASK 0x3 171 #define PCITOOL_ACC_ATTR_SIZE_1 0x0 172 #define PCITOOL_ACC_ATTR_SIZE_2 0x1 173 #define PCITOOL_ACC_ATTR_SIZE_4 0x2 174 #define PCITOOL_ACC_ATTR_SIZE_8 0x3 175 #define PCITOOL_ACC_ATTR_SIZE(x) (1 << (x & PCITOOL_ACC_ATTR_SIZE_MASK)) 176 177 #define PCITOOL_ACC_ATTR_ENDN_MASK 0x100 178 #define PCITOOL_ACC_ATTR_ENDN_LTL 0x0 179 #define PCITOOL_ACC_ATTR_ENDN_BIG 0x100 180 #define PCITOOL_ACC_IS_BIG_ENDIAN(x) (x & PCITOOL_ACC_ATTR_ENDN_BIG) 181 182 /* 183 * Data stucture to read and write to pci device registers. 184 * This is the argument to the following ioctls: 185 * PCITOOL_DEVICE_SET/GET_REG 186 * PCITOOL_NEXUS_SET/GET_REG 187 */ 188 typedef struct pcitool_reg { 189 uint16_t user_version; /* Userland program version - to krnl */ 190 uint16_t drvr_version; /* Driver version - from kernel */ 191 uint8_t bus_no; /* pci bus - to kernel */ 192 uint8_t dev_no; /* pci dev - to kernel */ 193 uint8_t func_no; /* pci function - to kernel */ 194 uint8_t barnum; /* bank (DEVCTL_NEXUS_SET/GET_REG) or */ 195 /* BAR from pcitools_bar_t */ 196 /* (DEVCTL_DEVICE_SET/GET_REG) */ 197 /* to kernel */ 198 uint64_t offset; /* to kernel */ 199 uint32_t acc_attr; /* access attributes - to kernel */ 200 uint32_t padding1; /* 8-byte align next uint64_t for X86 */ 201 uint64_t data; /* to/from kernel, 64-bit alignment */ 202 uint32_t status; /* from kernel */ 203 uint32_t padding2; /* 8-byte align next uint64_t for X86 */ 204 uint64_t phys_addr; /* from kernel, 64-bit alignment */ 205 } pcitool_reg_t; 206 207 208 #ifdef __cplusplus 209 } 210 #endif 211 212 #endif /* _SYS_PCI_TOOLS_H */ 213