xref: /titanic_41/usr/src/uts/common/sys/fm/io/pci.h (revision a2bb96e7d59f447f59bc306e53b7d00e38594667) 
1 /*
2  * CDDL HEADER START
3  *
4  * The contents of this file are subject to the terms of the
5  * Common Development and Distribution License (the "License").
6  * You may not use this file except in compliance with the License.
7  *
8  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9  * or http://www.opensolaris.org/os/licensing.
10  * See the License for the specific language governing permissions
11  * and limitations under the License.
12  *
13  * When distributing Covered Code, include this CDDL HEADER in each
14  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15  * If applicable, add the following below this CDDL HEADER, with the
16  * fields enclosed by brackets "[]" replaced with your own identifying
17  * information: Portions Copyright [yyyy] [name of copyright owner]
18  *
19  * CDDL HEADER END
20  */
21 /*
22  * Copyright 2006 Sun Microsystems, Inc.  All rights reserved.
23  * Use is subject to license terms.
24  */
25 
26 #ifndef _SYS_FM_IO_PCI_H
27 #define	_SYS_FM_IO_PCI_H
28 
29 #pragma ident	"%Z%%M%	%I%	%E% SMI"
30 
31 #ifdef	__cplusplus
32 extern "C" {
33 #endif
34 
35 #define	PCI_ERROR_SUBCLASS	"pci"
36 #define	PCI_SEC_ERROR_SUBCLASS	"sec"
37 
38 /* Common PCI ereport classes */
39 #define	PCI_DET_PERR		"dpe"
40 #define	PCI_MDPE		"mdpe"
41 #define	PCI_REC_SERR		"rserr"
42 #define	PCI_SIG_SERR		"sserr"
43 #define	PCI_MA			"ma"
44 #define	PCI_REC_TA		"rta"
45 #define	PCI_SIG_TA		"sta"
46 #define	PCI_DTO			"dto"
47 #define	PCI_TARG_MDPE		"target-mdpe"
48 #define	PCI_TARG_MA		"target-ma"
49 #define	PCI_TARG_REC_TA		"target-rta"
50 #define	PCI_NR			"nr"
51 
52 /* PCI Error payload name fields */
53 #define	PCI_CONFIG_STATUS	"pci-status"
54 #define	PCI_CONFIG_COMMAND	"pci-command"
55 #define	PCI_SEC_CONFIG_STATUS	"pci-sec-status"
56 #define	PCI_BCNTRL		"pci-bdg-ctrl"
57 #define	PCI_PA			"pci-pa"
58 
59 /*
60  * PCI-X extensions
61  */
62 #define	PCIX_ERROR_SUBCLASS	"pcix"
63 #define	PCIX_SEC_ERROR_SUBCLASS "sec-"
64 
65 /* Common PCI-X ereport classes */
66 #define	PCIX_ECC_CE_ADDR	"ecc.ce-addr"
67 #define	PCIX_ECC_CE_ATTR	"ecc.ce-attr"
68 #define	PCIX_ECC_CE_DATA	"ecc.ce-data"
69 #define	PCIX_ECC_UE_ADDR	"ecc.ue-addr"
70 #define	PCIX_ECC_UE_ATTR	"ecc.ue-attr"
71 #define	PCIX_ECC_UE_DATA	"ecc.ue-data"
72 #define	PCIX_RX_SPL_MSG		"rx-spl"
73 #define	PCIX_ECC_S_CE		"s-ce"
74 #define	PCIX_ECC_S_UE		"s-ue"
75 #define	PCIX_SPL_DIS		"spl-dis"
76 #define	PCIX_BSS_SPL_DLY	"spl-dly"
77 #define	PCIX_BSS_SPL_OR		"spl-or"
78 #define	PCIX_UNEX_SPL		"unex-spl"
79 
80 #define	PCIX_SEC_STATUS		"pcix-sec-status"
81 #define	PCIX_BDG_STAT		"pcix-bdg-stat"
82 #define	PCIX_COMMAND		"pcix-command"
83 #define	PCIX_STATUS		"pcix-status"
84 #define	PCIX_ECC_CTLSTAT	"pcix-ecc-ctlstat"
85 #define	PCIX_ECC_ATTR		"pcix-ecc-attr"
86 
87 /*
88  * PCI Express extensions
89  */
90 #define	PCIEX_ERROR_SUBCLASS		"pciex"
91 
92 /* Common PCI Express ereport classes */
93 #define	PCIEX_RE		"pl.re"
94 #define	PCIEX_TE		"pl.te"
95 
96 #define	PCIEX_SD		"dl.sd"
97 #define	PCIEX_BDP		"dl.bdllp"
98 #define	PCIEX_BTP		"dl.btlp"
99 #define	PCIEX_DLP		"dl.dllp"
100 #define	PCIEX_RNR		"dl.rnr"
101 #define	PCIEX_RTO		"dl.rto"
102 
103 #define	PCIEX_CA		"tl.ca"
104 #define	PCIEX_CTO		"tl.cto"
105 #define	PCIEX_ECRC		"tl.ecrc"
106 #define	PCIEX_FCP		"tl.fcp"
107 #define	PCIEX_MFP		"tl.mtlp"
108 #define	PCIEX_POIS		"tl.ptlp"
109 #define	PCIEX_ROF		"tl.rof"
110 #define	PCIEX_UC		"tl.uc"
111 #define	PCIEX_UR		"tl.ur"
112 
113 #define	PCIEX_INTERR		"bdg.sec-interr"
114 #define	PCIEX_S_MA_SC		"bdg.sec-ma-sc"
115 #define	PCIEX_S_PERR		"bdg.sec-perr"
116 #define	PCIEX_S_RMA		"bdg.sec-rma"
117 #define	PCIEX_S_RTA		"bdg.sec-rta"
118 #define	PCIEX_S_SERR		"bdg.sec-serr"
119 #define	PCIEX_S_TA_SC		"bdg.sec-ta-sc"
120 #define	PCIEX_S_TEX		"bdg.sec-tex"
121 #define	PCIEX_S_UADR		"bdg.sec-uadr"
122 #define	PCIEX_S_UAT		"bdg.sec-uat"
123 #define	PCIEX_S_UDE		"bdg.sec-ude"
124 #define	PCIEX_S_USC		"bdg.usc"
125 #define	PCIEX_S_USCMD		"bdg.uscmd"
126 
127 #define	PCIEX_RC_FE_MSG		"rc.fe-msg"
128 #define	PCIEX_RC_NFE_MSG	"rc.nfe-msg"
129 #define	PCIEX_RC_CE_MSG		"rc.ce-msg"
130 #define	PCIEX_RC_MCE_MSG	"rc.mce-msg"
131 #define	PCIEX_RC_MUE_MSG	"rc.mue-msg"
132 
133 #define	PCIEX_CORR		"correctable"
134 #define	PCIEX_FAT		"fatal"
135 #define	PCIEX_NONFAT		"nonfatal"
136 #define	PCIEX_NADV		"noadverr"
137 #define	PCIEX_ANFE		"a-nonfatal"
138 
139 /* PCI Express payload name fields */
140 #define	PCIEX_DEVSTS_REG	"dev-status"
141 #define	PCIEX_LINKSTS_REG	"link-status"
142 #define	PCIEX_ROOT_ERRSTS_REG	"rc-status"
143 #define	PCIEX_CE_STATUS_REG	"ce-status"
144 #define	PCIEX_UE_STATUS_REG	"ue-status"
145 #define	PCIEX_UE_SEV_REG	"ue-severity"
146 #define	PCIEX_SEC_UE_STATUS	"sue-status"
147 #define	PCIEX_SRC_ID		"source-id"
148 #define	PCIEX_SRC_VALID		"source-valid"
149 #define	PCIEX_ADV_CTL		"adv-ctl"
150 #define	PCIEX_UE_HDR0		"ue_hdr0"
151 #define	PCIEX_UE_HDR1		"ue_hdr1"
152 #define	PCIEX_UE_HDR2		"ue_hdr2"
153 #define	PCIEX_UE_HDR3		"ue_hdr3"
154 #define	PCIEX_SUE_HDR0		"sue_hdr0"
155 #define	PCIEX_SUE_HDR1		"sue_hdr1"
156 #define	PCIEX_SUE_HDR2		"sue_hdr2"
157 #define	PCIEX_SUE_HDR3		"sue_hdr3"
158 
159 #ifdef	__cplusplus
160 }
161 #endif
162 
163 #endif	/* _SYS_FM_IO_PCI_H */
164