1 /* 2 * CDDL HEADER START 3 * 4 * The contents of this file are subject to the terms of the 5 * Common Development and Distribution License, Version 1.0 only 6 * (the "License"). You may not use this file except in compliance 7 * with the License. 8 * 9 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 10 * or http://www.opensolaris.org/os/licensing. 11 * See the License for the specific language governing permissions 12 * and limitations under the License. 13 * 14 * When distributing Covered Code, include this CDDL HEADER in each 15 * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 16 * If applicable, add the following below this CDDL HEADER, with the 17 * fields enclosed by brackets "[]" replaced with your own identifying 18 * information: Portions Copyright [yyyy] [name of copyright owner] 19 * 20 * CDDL HEADER END 21 */ 22 /* 23 * Copyright 2005 Sun Microsystems, Inc. All rights reserved. 24 * Use is subject to license terms. 25 */ 26 27 #ifndef _SYS_DDI_INTR_IMPL_H 28 #define _SYS_DDI_INTR_IMPL_H 29 30 #pragma ident "%Z%%M% %I% %E% SMI" 31 32 /* 33 * Sun DDI interrupt implementation specific definitions 34 */ 35 36 #ifdef __cplusplus 37 extern "C" { 38 #endif 39 40 #ifdef _KERNEL 41 42 /* 43 * Typedef for interrupt ops 44 */ 45 typedef enum { 46 DDI_INTROP_SUPPORTED_TYPES = 1, /* 1 get supported interrupts types */ 47 DDI_INTROP_NINTRS, /* 2 get num of interrupts supported */ 48 DDI_INTROP_ALLOC, /* 3 allocate interrupt handle */ 49 DDI_INTROP_GETPRI, /* 4 get priority */ 50 DDI_INTROP_SETPRI, /* 5 set priority */ 51 DDI_INTROP_ADDISR, /* 6 add interrupt handler */ 52 DDI_INTROP_DUPVEC, /* 7 duplicate interrupt handler */ 53 DDI_INTROP_ENABLE, /* 8 enable interrupt */ 54 DDI_INTROP_BLOCKENABLE, /* 9 block enable interrupts */ 55 DDI_INTROP_BLOCKDISABLE, /* 10 block disable interrupts */ 56 DDI_INTROP_DISABLE, /* 11 disable interrupt */ 57 DDI_INTROP_REMISR, /* 12 remove interrupt handler */ 58 DDI_INTROP_FREE, /* 13 free interrupt handle */ 59 DDI_INTROP_GETCAP, /* 14 get capacity */ 60 DDI_INTROP_SETCAP, /* 15 set capacity */ 61 DDI_INTROP_SETMASK, /* 16 set mask */ 62 DDI_INTROP_CLRMASK, /* 17 clear mask */ 63 DDI_INTROP_GETPENDING, /* 18 get pending interrupt */ 64 DDI_INTROP_NAVAIL /* 19 get num of available interrupts */ 65 } ddi_intr_op_t; 66 67 /* Version number used in the handles */ 68 #define DDI_INTR_VERSION_1 1 69 #define DDI_INTR_VERSION DDI_INTR_VERSION_1 70 71 /* 72 * One such data structure is allocated per ddi_intr_handle_t 73 * This is the incore copy of the regular interrupt info. 74 */ 75 typedef struct ddi_intr_handle_impl { 76 dev_info_t *ih_dip; /* dip associated with handle */ 77 uint16_t ih_type; /* interrupt type being used */ 78 ushort_t ih_inum; /* interrupt number */ 79 ushort_t ih_vector; /* vector number */ 80 uint16_t ih_ver; /* Version */ 81 uint_t ih_state; /* interrupt handle state */ 82 uint_t ih_cap; /* interrupt capabilities */ 83 uint_t ih_pri; /* priority - bus dependent */ 84 krwlock_t ih_rwlock; /* read/write lock per handle */ 85 86 uint_t (*ih_cb_func)(caddr_t, caddr_t); 87 void *ih_cb_arg1; 88 void *ih_cb_arg2; 89 90 /* 91 * The next set of members are for 'scratch' purpose only. 92 * The DDI interrupt framework uses them internally and their 93 * interpretation is left to the framework. For now, 94 * scratch1 - used to send NINTRs information 95 * to various nexus drivers. 96 * scratch2 - used to send 'behavior' flag 97 * information to the nexus drivers 98 * from ddi_intr_alloc() 99 * private - used by the DDI framework to 100 * pass back and forth 'vector' information 101 * It is extensively used on the SPARC side 102 * to temporarily hold the 'ddi_ispec_t' 103 */ 104 void *ih_private; /* Platform specific data */ 105 uint_t ih_scratch1; /* Scratch1: #interrupts */ 106 uint_t ih_scratch2; /* Scratch2: flag */ 107 } ddi_intr_handle_impl_t; 108 109 /* values for ih_state (strictly for interrupt handle) */ 110 #define DDI_IHDL_STATE_ALLOC 0x01 /* Allocated. ddi_intr_alloc() called */ 111 #define DDI_IHDL_STATE_ADDED 0x02 /* Added interrupt handler */ 112 /* ddi_intr_add_handler() called */ 113 #define DDI_IHDL_STATE_ENABLE 0x04 /* Enabled. ddi_intr_enable() called */ 114 115 #define DDI_INTR_IS_MSI_OR_MSIX(type) \ 116 ((type) == DDI_INTR_TYPE_MSI || (type) == DDI_INTR_TYPE_MSIX) 117 118 /* 119 * One such data structure is allocated per ddi_soft_intr_handle 120 * This is the incore copy of the softint info. 121 */ 122 typedef struct ddi_softint_hdl_impl { 123 dev_info_t *ih_dip; /* dip associated with handle */ 124 uint_t ih_pri; /* priority - bus dependent */ 125 krwlock_t ih_rwlock; /* read/write lock per handle */ 126 uint_t ih_pending; /* whether softint is pending */ 127 128 uint_t (*ih_cb_func)(caddr_t, caddr_t); 129 /* cb function for soft ints */ 130 void *ih_cb_arg1; /* arg1 of callback function */ 131 void *ih_cb_arg2; /* arg2 passed to "trigger" */ 132 133 /* 134 * The next member is for 'scratch' purpose only. 135 * The DDI interrupt framework uses it internally and its 136 * interpretation is left to the framework. 137 * private - used by the DDI framework to pass back 138 * and forth 'softid' information on SPARC 139 * side only. Not used on X86 platform. 140 */ 141 void *ih_private; /* Platform specific data */ 142 } ddi_softint_hdl_impl_t; 143 144 /* Softint internal implementation defines */ 145 #define DDI_SOFT_INTR_PRI_M 4 146 #define DDI_SOFT_INTR_PRI_H 6 147 148 /* 149 * One such data structure is allocated for MSI-X enabled 150 * device. If no MSI-X is enabled then it is NULL 151 */ 152 typedef struct ddi_intr_msix { 153 uint_t msix_intrs_in_use; /* MSI-X intrs in use */ 154 155 /* MSI-X Table related information */ 156 ddi_acc_handle_t msix_tbl_hdl; /* MSI-X table handle */ 157 caddr_t msix_tbl_addr; /* MSI-X table addr */ 158 offset_t msix_tbl_offset; /* MSI-X table offset */ 159 160 /* MSI-X PBA Table related information */ 161 ddi_acc_handle_t msix_pba_hdl; /* MSI-X PBA handle */ 162 caddr_t msix_pba_addr; /* MSI-X PBA addr */ 163 offset_t msix_pba_offset; /* MSI-X PBA offset */ 164 165 ddi_device_acc_attr_t msix_dev_attr; /* MSI-X device attr */ 166 } ddi_intr_msix_t; 167 168 169 /* 170 * One such data structure is allocated for each dip. 171 * It has interrupt related information that can be 172 * stored/retrieved for convenience. 173 */ 174 typedef struct devinfo_intr { 175 /* These three fields show what the device is capable of */ 176 uint_t devi_intr_sup_types; /* Intrs supported by device */ 177 178 ddi_intr_msix_t *devi_msix_p; /* MSI-X info, if supported */ 179 180 /* Next three fields show current status for the device */ 181 uint_t devi_intr_curr_type; /* Interrupt type being used */ 182 uint_t devi_intr_sup_nintrs; /* #intr supported */ 183 uint_t devi_intr_curr_nintrs; /* #intr currently being used */ 184 185 ddi_intr_handle_t **devi_intr_handle_p; /* Hdl for legacy intr APIs */ 186 } devinfo_intr_t; 187 188 #define NEXUS_HAS_INTR_OP(dip) \ 189 ((DEVI(dip)->devi_ops->devo_bus_ops) && \ 190 (DEVI(dip)->devi_ops->devo_bus_ops->busops_rev >= BUSO_REV_9) && \ 191 (DEVI(dip)->devi_ops->devo_bus_ops->bus_intr_op)) 192 193 int i_ddi_handle_intr_ops(dev_info_t *dip, dev_info_t *rdip, 194 ddi_intr_op_t op, ddi_intr_handle_impl_t *hdlp, void *result); 195 int i_ddi_intr_ops(dev_info_t *dip, dev_info_t *rdip, ddi_intr_op_t op, 196 ddi_intr_handle_impl_t *hdlp, void *result); 197 198 int i_ddi_add_softint(ddi_softint_hdl_impl_t *); 199 void i_ddi_remove_softint(ddi_softint_hdl_impl_t *); 200 int i_ddi_trigger_softint(ddi_softint_hdl_impl_t *, void *); 201 int i_ddi_set_softint_pri(ddi_softint_hdl_impl_t *, uint_t); 202 203 void i_ddi_intr_devi_init(dev_info_t *dip); 204 void i_ddi_intr_devi_fini(dev_info_t *dip); 205 206 uint_t i_ddi_intr_get_supported_types(dev_info_t *dip); 207 void i_ddi_intr_set_supported_types(dev_info_t *dip, int sup_type); 208 uint_t i_ddi_intr_get_current_type(dev_info_t *dip); 209 void i_ddi_intr_set_current_type(dev_info_t *dip, int intr_type); 210 uint_t i_ddi_intr_get_supported_nintrs(dev_info_t *dip, int intr_type); 211 void i_ddi_intr_set_supported_nintrs(dev_info_t *dip, int nintrs); 212 uint_t i_ddi_intr_get_current_nintrs(dev_info_t *dip); 213 void i_ddi_intr_set_current_nintrs(dev_info_t *dip, int nintrs); 214 215 void i_ddi_set_intr_handle(dev_info_t *dip, int inum, 216 ddi_intr_handle_t *hdlp); 217 ddi_intr_handle_t *i_ddi_get_intr_handle(dev_info_t *dip, int inum); 218 219 ddi_intr_msix_t *i_ddi_get_msix(dev_info_t *dip); 220 void i_ddi_set_msix(dev_info_t *dip, ddi_intr_msix_t *msix_p); 221 222 int32_t i_ddi_get_intr_weight(dev_info_t *); 223 int32_t i_ddi_set_intr_weight(dev_info_t *, int32_t); 224 225 int i_ddi_get_nintrs(dev_info_t *dip); 226 227 #define DDI_INTR_ASSIGN_HDLR_N_ARGS(hdlp, func, arg1, arg2) \ 228 hdlp->ih_cb_func = func; \ 229 hdlp->ih_cb_arg1 = arg1; \ 230 hdlp->ih_cb_arg2 = arg2; 231 232 #else /* _KERNEL */ 233 234 typedef struct devinfo_intr devinfo_intr_t; 235 236 #endif /* _KERNEL */ 237 238 /* 239 * Used only by old DDI interrupt interfaces. 240 */ 241 242 /* 243 * This structure represents one interrupt possible from the given 244 * device. It is used in an array for devices with multiple interrupts. 245 */ 246 struct intrspec { 247 uint_t intrspec_pri; /* interrupt priority */ 248 uint_t intrspec_vec; /* vector # (0 if none) */ 249 uint_t (*intrspec_func)(); /* function to call for interrupt, */ 250 /* If (uint_t (*)()) 0, none. */ 251 /* If (uint_t (*)()) 1, then */ 252 }; 253 254 #ifdef _KERNEL 255 /* 256 * This structure is allocated by i_ddi_add_softintr and its address is used 257 * as a cookie passed back to the caller to be used later by 258 * i_ddi_remove_softintr 259 */ 260 struct soft_intrspec { 261 struct dev_info *si_devi; /* records dev_info of caller */ 262 struct intrspec si_intrspec; /* and the intrspec */ 263 }; 264 265 /* 266 * NOTE: 267 * The following 4 busops entry points are obsoleted with version 268 * 9 or greater. Use i_ddi_intr_op interface in place of these 269 * obsolete interfaces. 270 * 271 * Remove these busops entry points and all related data structures 272 * in future minor/major solaris release. 273 */ 274 typedef enum {DDI_INTR_CTLOPS_NONE} ddi_intr_ctlop_t; 275 276 /* The following are the obsolete interfaces */ 277 ddi_intrspec_t i_ddi_get_intrspec(dev_info_t *dip, dev_info_t *rdip, 278 uint_t inumber); 279 280 int i_ddi_add_intrspec(dev_info_t *dip, dev_info_t *rdip, 281 ddi_intrspec_t intrspec, ddi_iblock_cookie_t *iblock_cookiep, 282 ddi_idevice_cookie_t *idevice_cookiep, 283 uint_t (*int_handler)(caddr_t int_handler_arg), 284 caddr_t int_handler_arg, int kind); 285 286 void i_ddi_remove_intrspec(dev_info_t *dip, dev_info_t *rdip, 287 ddi_intrspec_t intrspec, ddi_iblock_cookie_t iblock_cookie); 288 289 int i_ddi_intr_ctlops(dev_info_t *dip, dev_info_t *rdip, 290 ddi_intr_ctlop_t op, void *arg, void *val); 291 292 #endif /* _KERNEL */ 293 294 #ifdef __cplusplus 295 } 296 #endif 297 298 #endif /* _SYS_DDI_INTR_IMPL_H */ 299