1 /* 2 * CDDL HEADER START 3 * 4 * The contents of this file are subject to the terms of the 5 * Common Development and Distribution License (the "License"). 6 * You may not use this file except in compliance with the License. 7 * 8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 9 * or http://www.opensolaris.org/os/licensing. 10 * See the License for the specific language governing permissions 11 * and limitations under the License. 12 * 13 * When distributing Covered Code, include this CDDL HEADER in each 14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 15 * If applicable, add the following below this CDDL HEADER, with the 16 * fields enclosed by brackets "[]" replaced with your own identifying 17 * information: Portions Copyright [yyyy] [name of copyright owner] 18 * 19 * CDDL HEADER END 20 */ 21 /* 22 * Copyright 2006 Sun Microsystems, Inc. All rights reserved. 23 * Use is subject to license terms. 24 */ 25 26 #ifndef _SYS_DDI_INTR_IMPL_H 27 #define _SYS_DDI_INTR_IMPL_H 28 29 #pragma ident "%Z%%M% %I% %E% SMI" 30 31 /* 32 * Sun DDI interrupt implementation specific definitions 33 */ 34 35 #ifdef __cplusplus 36 extern "C" { 37 #endif 38 39 #ifdef _KERNEL 40 41 /* 42 * Typedef for interrupt ops 43 */ 44 typedef enum { 45 DDI_INTROP_SUPPORTED_TYPES = 1, /* 1 get supported interrupts types */ 46 DDI_INTROP_NINTRS, /* 2 get num of interrupts supported */ 47 DDI_INTROP_ALLOC, /* 3 allocate interrupt handle */ 48 DDI_INTROP_GETPRI, /* 4 get priority */ 49 DDI_INTROP_SETPRI, /* 5 set priority */ 50 DDI_INTROP_ADDISR, /* 6 add interrupt handler */ 51 DDI_INTROP_DUPVEC, /* 7 duplicate interrupt handler */ 52 DDI_INTROP_ENABLE, /* 8 enable interrupt */ 53 DDI_INTROP_BLOCKENABLE, /* 9 block enable interrupts */ 54 DDI_INTROP_BLOCKDISABLE, /* 10 block disable interrupts */ 55 DDI_INTROP_DISABLE, /* 11 disable interrupt */ 56 DDI_INTROP_REMISR, /* 12 remove interrupt handler */ 57 DDI_INTROP_FREE, /* 13 free interrupt handle */ 58 DDI_INTROP_GETCAP, /* 14 get capacity */ 59 DDI_INTROP_SETCAP, /* 15 set capacity */ 60 DDI_INTROP_SETMASK, /* 16 set mask */ 61 DDI_INTROP_CLRMASK, /* 17 clear mask */ 62 DDI_INTROP_GETPENDING, /* 18 get pending interrupt */ 63 DDI_INTROP_NAVAIL /* 19 get num of available interrupts */ 64 } ddi_intr_op_t; 65 66 /* Version number used in the handles */ 67 #define DDI_INTR_VERSION_1 1 68 #define DDI_INTR_VERSION DDI_INTR_VERSION_1 69 70 /* 71 * One such data structure is allocated per ddi_intr_handle_t 72 * This is the incore copy of the regular interrupt info. 73 */ 74 typedef struct ddi_intr_handle_impl { 75 dev_info_t *ih_dip; /* dip associated with handle */ 76 uint16_t ih_type; /* interrupt type being used */ 77 ushort_t ih_inum; /* interrupt number */ 78 uint32_t ih_vector; /* vector number */ 79 uint16_t ih_ver; /* Version */ 80 uint_t ih_state; /* interrupt handle state */ 81 uint_t ih_cap; /* interrupt capabilities */ 82 uint_t ih_pri; /* priority - bus dependent */ 83 krwlock_t ih_rwlock; /* read/write lock per handle */ 84 85 uint_t (*ih_cb_func)(caddr_t, caddr_t); 86 void *ih_cb_arg1; 87 void *ih_cb_arg2; 88 89 /* 90 * The next set of members are for 'scratch' purpose only. 91 * The DDI interrupt framework uses them internally and their 92 * interpretation is left to the framework. For now, 93 * scratch1 - used to send NINTRs information 94 * to various nexus drivers. 95 * scratch2 - used to send 'behavior' flag 96 * information to the nexus drivers 97 * from ddi_intr_alloc(). It is also 98 * used to send 'h_array' to the nexus drivers 99 * for ddi_intr_block_enable/disable() on x86. 100 * private - On X86 it usually carries a pointer to 101 * ihdl_plat_t. Not used on SPARC platforms. 102 */ 103 void *ih_private; /* Platform specific data */ 104 uint_t ih_scratch1; /* Scratch1: #interrupts */ 105 void *ih_scratch2; /* Scratch2: flag/h_array */ 106 } ddi_intr_handle_impl_t; 107 108 /* values for ih_state (strictly for interrupt handle) */ 109 #define DDI_IHDL_STATE_ALLOC 0x01 /* Allocated. ddi_intr_alloc() called */ 110 #define DDI_IHDL_STATE_ADDED 0x02 /* Added interrupt handler */ 111 /* ddi_intr_add_handler() called */ 112 #define DDI_IHDL_STATE_ENABLE 0x04 /* Enabled. ddi_intr_enable() called */ 113 114 #define DDI_INTR_IS_MSI_OR_MSIX(type) \ 115 ((type) == DDI_INTR_TYPE_MSI || (type) == DDI_INTR_TYPE_MSIX) 116 117 #define DDI_INTR_SUP_TYPES DDI_INTR_TYPE_FIXED|DDI_INTR_TYPE_MSI|\ 118 DDI_INTR_TYPE_MSIX 119 120 struct av_softinfo; 121 122 /* 123 * One such data structure is allocated per ddi_soft_intr_handle 124 * This is the incore copy of the softint info. 125 */ 126 typedef struct ddi_softint_hdl_impl { 127 dev_info_t *ih_dip; /* dip associated with handle */ 128 uint_t ih_pri; /* priority - bus dependent */ 129 krwlock_t ih_rwlock; /* read/write lock per handle */ 130 struct av_softinfo *ih_pending; /* whether softint is pending */ 131 132 uint_t (*ih_cb_func)(caddr_t, caddr_t); 133 /* cb function for soft ints */ 134 void *ih_cb_arg1; /* arg1 of callback function */ 135 void *ih_cb_arg2; /* arg2 passed to "trigger" */ 136 137 /* 138 * The next member is for 'scratch' purpose only. 139 * The DDI interrupt framework uses it internally and its 140 * interpretation is left to the framework. 141 * private - used by the DDI framework to pass back 142 * and forth 'softid' information on SPARC 143 * side only. Not used on X86 platform. 144 */ 145 void *ih_private; /* Platform specific data */ 146 } ddi_softint_hdl_impl_t; 147 148 /* Softint internal implementation defines */ 149 #define DDI_SOFT_INTR_PRI_M 4 150 #define DDI_SOFT_INTR_PRI_H 6 151 152 /* 153 * One such data structure is allocated for MSI-X enabled 154 * device. If no MSI-X is enabled then it is NULL 155 */ 156 typedef struct ddi_intr_msix { 157 uint_t msix_intrs_in_use; /* MSI-X intrs in use */ 158 159 /* MSI-X Table related information */ 160 ddi_acc_handle_t msix_tbl_hdl; /* MSI-X table handle */ 161 uint32_t *msix_tbl_addr; /* MSI-X table addr */ 162 uint32_t msix_tbl_offset; /* MSI-X table offset */ 163 164 /* MSI-X PBA Table related information */ 165 ddi_acc_handle_t msix_pba_hdl; /* MSI-X PBA handle */ 166 uint32_t *msix_pba_addr; /* MSI-X PBA addr */ 167 uint32_t msix_pba_offset; /* MSI-X PBA offset */ 168 169 ddi_device_acc_attr_t msix_dev_attr; /* MSI-X device attr */ 170 } ddi_intr_msix_t; 171 172 173 /* 174 * One such data structure is allocated for each dip. 175 * It has interrupt related information that can be 176 * stored/retrieved for convenience. 177 */ 178 typedef struct devinfo_intr { 179 /* These three fields show what the device is capable of */ 180 uint_t devi_intr_sup_types; /* Intrs supported by device */ 181 182 ddi_intr_msix_t *devi_msix_p; /* MSI-X info, if supported */ 183 184 /* Next three fields show current status for the device */ 185 uint_t devi_intr_curr_type; /* Interrupt type being used */ 186 uint_t devi_intr_sup_nintrs; /* #intr supported */ 187 uint_t devi_intr_curr_nintrs; /* #intr currently being used */ 188 189 ddi_intr_handle_t **devi_intr_handle_p; /* Hdl for legacy intr APIs */ 190 } devinfo_intr_t; 191 192 #define NEXUS_HAS_INTR_OP(dip) \ 193 ((DEVI(dip)->devi_ops->devo_bus_ops) && \ 194 (DEVI(dip)->devi_ops->devo_bus_ops->busops_rev >= BUSO_REV_9) && \ 195 (DEVI(dip)->devi_ops->devo_bus_ops->bus_intr_op)) 196 197 int i_ddi_intr_ops(dev_info_t *dip, dev_info_t *rdip, ddi_intr_op_t op, 198 ddi_intr_handle_impl_t *hdlp, void *result); 199 200 int i_ddi_add_softint(ddi_softint_hdl_impl_t *); 201 void i_ddi_remove_softint(ddi_softint_hdl_impl_t *); 202 int i_ddi_trigger_softint(ddi_softint_hdl_impl_t *, void *); 203 int i_ddi_set_softint_pri(ddi_softint_hdl_impl_t *, uint_t); 204 205 void i_ddi_intr_devi_init(dev_info_t *dip); 206 void i_ddi_intr_devi_fini(dev_info_t *dip); 207 208 uint_t i_ddi_intr_get_supported_types(dev_info_t *dip); 209 void i_ddi_intr_set_supported_types(dev_info_t *dip, int sup_type); 210 uint_t i_ddi_intr_get_current_type(dev_info_t *dip); 211 void i_ddi_intr_set_current_type(dev_info_t *dip, int intr_type); 212 uint_t i_ddi_intr_get_supported_nintrs(dev_info_t *dip, int intr_type); 213 void i_ddi_intr_set_supported_nintrs(dev_info_t *dip, int nintrs); 214 uint_t i_ddi_intr_get_current_nintrs(dev_info_t *dip); 215 void i_ddi_intr_set_current_nintrs(dev_info_t *dip, int nintrs); 216 217 ddi_intr_handle_t *i_ddi_get_intr_handle(dev_info_t *dip, int inum); 218 void i_ddi_set_intr_handle(dev_info_t *dip, int inum, 219 ddi_intr_handle_t *hdlp); 220 221 ddi_intr_msix_t *i_ddi_get_msix(dev_info_t *dip); 222 void i_ddi_set_msix(dev_info_t *dip, ddi_intr_msix_t *msix_p); 223 224 int32_t i_ddi_get_intr_weight(dev_info_t *); 225 int32_t i_ddi_set_intr_weight(dev_info_t *, int32_t); 226 227 void i_ddi_alloc_intr_phdl(ddi_intr_handle_impl_t *); 228 void i_ddi_free_intr_phdl(ddi_intr_handle_impl_t *); 229 230 #define DDI_INTR_ASSIGN_HDLR_N_ARGS(hdlp, func, arg1, arg2) \ 231 hdlp->ih_cb_func = func; \ 232 hdlp->ih_cb_arg1 = arg1; \ 233 hdlp->ih_cb_arg2 = arg2; 234 235 #else /* _KERNEL */ 236 237 typedef struct devinfo_intr devinfo_intr_t; 238 239 #endif /* _KERNEL */ 240 241 /* 242 * Used only by old DDI interrupt interfaces. 243 */ 244 245 /* 246 * This structure represents one interrupt possible from the given 247 * device. It is used in an array for devices with multiple interrupts. 248 */ 249 struct intrspec { 250 uint_t intrspec_pri; /* interrupt priority */ 251 uint_t intrspec_vec; /* vector # (0 if none) */ 252 uint_t (*intrspec_func)(); /* function to call for interrupt, */ 253 /* If (uint_t (*)()) 0, none. */ 254 /* If (uint_t (*)()) 1, then */ 255 }; 256 257 #ifdef _KERNEL 258 259 /* 260 * NOTE: 261 * The following 4 busops entry points are obsoleted with version 262 * 9 or greater. Use i_ddi_intr_op interface in place of these 263 * obsolete interfaces. 264 * 265 * Remove these busops entry points and all related data structures 266 * in future minor/major solaris release. 267 */ 268 typedef enum {DDI_INTR_CTLOPS_NONE} ddi_intr_ctlop_t; 269 270 /* The following are the obsolete interfaces */ 271 ddi_intrspec_t i_ddi_get_intrspec(dev_info_t *dip, dev_info_t *rdip, 272 uint_t inumber); 273 274 int i_ddi_add_intrspec(dev_info_t *dip, dev_info_t *rdip, 275 ddi_intrspec_t intrspec, ddi_iblock_cookie_t *iblock_cookiep, 276 ddi_idevice_cookie_t *idevice_cookiep, 277 uint_t (*int_handler)(caddr_t int_handler_arg), 278 caddr_t int_handler_arg, int kind); 279 280 void i_ddi_remove_intrspec(dev_info_t *dip, dev_info_t *rdip, 281 ddi_intrspec_t intrspec, ddi_iblock_cookie_t iblock_cookie); 282 283 int i_ddi_intr_ctlops(dev_info_t *dip, dev_info_t *rdip, 284 ddi_intr_ctlop_t op, void *arg, void *val); 285 286 #endif /* _KERNEL */ 287 288 #ifdef __cplusplus 289 } 290 #endif 291 292 #endif /* _SYS_DDI_INTR_IMPL_H */ 293