xref: /titanic_41/usr/src/uts/common/io/zyd/zyd_reg.h (revision 989f28072d20c73ae0955d6a1e3e2fc74831cb39)
1 /*
2  * Copyright 2009 Sun Microsystems, Inc.  All rights reserved.
3  * Use is subject to license terms.
4  */
5 
6 /*
7  * Copyright (c) 2006 by Damien Bergamini <damien.bergamini@free.fr>
8  * Copyright (c) 2006 by Florian Stoehr <ich@florian-stoehr.de>
9  *
10  * Permission to use, copy, modify, and distribute this software for any
11  * purpose with or without fee is hereby granted, provided that the above
12  * copyright notice and this permission notice appear in all copies.
13  *
14  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
15  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
16  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
17  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
18  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
19  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
20  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
21  */
22 
23 /*
24  * ZyDAS ZD1211/ZD1211B USB WLAN driver.
25  */
26 
27 #ifndef _ZYD_REG_H
28 #define	_ZYD_REG_H
29 
30 #ifdef __cplusplus
31 extern "C"
32 {
33 #endif
34 
35 #define	ZYD_CR_GPI_EN		0x9418
36 #define	ZYD_CR_RADIO_PD		0x942c
37 #define	ZYD_CR_RF2948_PD	0x942c
38 #define	ZYD_CR_EN_PS_MANUAL_AGC	0x943c
39 #define	ZYD_CR_CONFIG_PHILIPS	0x9440
40 #define	ZYD_CR_I2C_WRITE	0x9444
41 #define	ZYD_CR_SA2400_SER_RP	0x9448
42 #define	ZYD_CR_RADIO_PE		0x9458
43 #define	ZYD_CR_RST_BUS_MASTER	0x945c
44 #define	ZYD_CR_RFCFG		0x9464
45 #define	ZYD_CR_HSTSCHG		0x946c
46 #define	ZYD_CR_PHY_ON		0x9474
47 #define	ZYD_CR_RX_DELAY		0x9478
48 #define	ZYD_CR_RX_PE_DELAY	0x947c
49 #define	ZYD_CR_GPIO_1		0x9490
50 #define	ZYD_CR_GPIO_2		0x9494
51 #define	ZYD_CR_EnZYD_CRyBufMux	0x94a8
52 #define	ZYD_CR_PS_CTRL		0x9500
53 #define	ZYD_CR_ADDA_PWR_DWN	0x9504
54 #define	ZYD_CR_ADDA_MBIAS_WT	0x9508
55 #define	ZYD_CR_INTERRUPT	0x9510
56 #define	ZYD_CR_MAC_PS_STATE	0x950c
57 #define	ZYD_CR_ATIM_WND_PERIOD	0x951c
58 #define	ZYD_CR_BCN_INTERVAL	0x9520
59 #define	ZYD_CR_PRE_TBTT		0x9524
60 
61 /*
62  * MAC registers.
63  */
64 #define	ZYD_MAC_MACADRL		0x9610	/* MAC address (low) */
65 #define	ZYD_MAC_MACADRH		0x9614	/* MAC address (high) */
66 #define	ZYD_MAC_BSSADRL		0x9618	/* BSS address (low) */
67 #define	ZYD_MAC_BSSADRH		0x961c	/* BSS address (high) */
68 #define	ZYD_MAC_BCNCFG		0x9620	/* BCN configuration */
69 #define	ZYD_MAC_GHTBL		0x9624	/* Group hash table (low) */
70 #define	ZYD_MAC_GHTBH		0x9628	/* Group hash table (high) */
71 #define	ZYD_MAC_RX_TIMEOUT	0x962c	/* Rx timeout value */
72 #define	ZYD_MAC_BAS_RATE	0x9630	/* Basic rate setting */
73 #define	ZYD_MAC_MAN_RATE	0x9634	/* Mandatory rate setting */
74 #define	ZYD_MAC_RTSCTSRATE	0x9638	/* RTS CTS rate */
75 #define	ZYD_MAC_BACKOFF_PROTECT	0x963c	/* Backoff protection */
76 #define	ZYD_MAC_RX_THRESHOLD	0x9640	/* Rx threshold */
77 #define	ZYD_MAC_TX_PE_CONTROL	0x9644	/* Tx_PE control */
78 #define	ZYD_MAC_AFTER_PNP	0x9648	/* After PnP */
79 #define	ZYD_MAC_RX_PE_DELAY	0x964c	/* Rx_pe delay */
80 #define	ZYD_MAC_RX_ADDR2_L	0x9650	/* RX address2 (low)    */
81 #define	ZYD_MAC_RX_ADDR2_H	0x9654	/* RX address2 (high) */
82 #define	ZYD_MAC_SIFS_ACK_TIME	0x9658	/* Dynamic SIFS ack time */
83 #define	ZYD_MAC_PHY_DELAY	0x9660	/* PHY delay */
84 #define	ZYD_MAC_PHY_DELAY2	0x966c	/* PHY delay */
85 #define	ZYD_MAC_BCNFIFO		0x9670	/* Beacon FIFO I/O port */
86 #define	ZYD_MAC_SNIFFER		0x9674	/* Sniffer on/off */
87 #define	ZYD_MAC_ENCRYPTION_TYPE 0x9678	/* Encryption type */
88 #define	ZYD_MAC_RETRY		0x967c	/* Retry time */
89 #define	ZYD_MAC_MISC		0x9680	/* Misc */
90 #define	ZYD_MAC_STMACHINESTAT	0x9684	/* State machine status */
91 #define	ZYD_MAC_TX_UNDERRUN_CNT	0x9688	/* TX underrun counter */
92 #define	ZYD_MAC_RXFILTER	0x968c	/* Send to host settings */
93 #define	ZYD_MAC_ACK_EXT		0x9690	/* Acknowledge extension */
94 #define	ZYD_MAC_BCNFIFOST	0x9694	/* BCN FIFO set and status */
95 #define	ZYD_MAC_DIFS_EIFS_SIFS	0x9698	/* DIFS, EIFS & SIFS settings */
96 #define	ZYD_MAC_RX_TIMEOUT_CNT	0x969c	/* RX timeout count */
97 #define	ZYD_MAC_RX_TOTAL_FRAME	0x96a0	/* RX total frame count */
98 #define	ZYD_MAC_RX_CRC32_CNT	0x96a4	/* RX CRC32 frame count */
99 #define	ZYD_MAC_RX_CRC16_CNT	0x96a8	/* RX CRC16 frame count */
100 #define	ZYD_MAC_RX_UDEC		0x96ac	/* RX unicast decr. error count */
101 #define	ZYD_MAC_RX_OVERRUN_CNT	0x96b0	/* RX FIFO overrun count */
102 #define	ZYD_MAC_RX_MDEC		0x96bc	/* RX multicast decr. err. cnt. */
103 #define	ZYD_MAC_NAV_TCR		0x96c4	/* NAV timer count read */
104 #define	ZYD_MAC_BACKOFF_ST_RD	0x96c8	/* Backoff status read */
105 #define	ZYD_MAC_DM_RETRY_CNT_RD	0x96cc	/* DM retry count read */
106 #define	ZYD_MAC_RX_ACR		0x96d0	/* RX arbitration count read    */
107 #define	ZYD_MAC_TX_CCR		0x96d4	/* Tx complete count read */
108 #define	ZYD_MAC_TCB_ADDR	0x96e8	/* Current PCI process TCP addr */
109 #define	ZYD_MAC_RCB_ADDR	0x96ec	/* Next RCB address */
110 #define	ZYD_MAC_CONT_WIN_LIMIT	0x96f0	/* Contention window limit */
111 #define	ZYD_MAC_TX_PKT		0x96f4	/* Tx total packet count read */
112 #define	ZYD_MAC_DL_CTRL		0x96f8	/* Download control */
113 #define	ZYD_MACB_TXPWR_CTL1	0x9b00
114 #define	ZYD_MACB_TXPWR_CTL2	0x9b04
115 #define	ZYD_MACB_TXPWR_CTL3	0x9b08
116 #define	ZYD_MACB_TXPWR_CTL4	0x9b0c
117 #define	ZYD_MACB_AIFS_CTL1	0x9b10
118 #define	ZYD_MACB_AIFS_CTL2	0x9b14
119 #define	ZYD_MACB_TXOP		0x9b20
120 #define	ZYD_MACB_MAX_RETRY	0x9b28
121 
122 /*
123  * Miscellanous registers.
124  */
125 #define	ZYD_FIRMWARE_START_ADDR	0xee00
126 #define	ZYD_FIRMWARE_BASE_ADDR	0xee1d	/* Firmware base address */
127 
128 /*
129  * EEPROM registers.
130  */
131 #define	ZYD_EEPROM_START_HEAD	0xf800	/* EEPROM start */
132 #define	ZYD_EEPROM_SUBID	0xf817
133 #define	ZYD_EEPROM_POD		0xf819
134 #define	ZYD_EEPROM_MAC_ADDR_P1	0xf81b	/* Part 1 of the MAC address */
135 #define	ZYD_EEPROM_MAC_ADDR_P2	0xf81d	/* Part 2 of the MAC address */
136 #define	ZYD_EEPROM_PWR_CAL	0xf81f	/* Calibration */
137 #define	ZYD_EEPROM_PWR_INT	0xf827	/* Calibration */
138 #define	ZYD_EEPROM_ALLOWEDCHAN	0xf82f	/* Allowed CH mask, 1 bit each */
139 #define	ZYD_EEPROM_PHY_REG	0xf831	/* PHY registers */
140 #define	ZYD_EEPROM_DEVICE_VER	0xf837	/* Device version */
141 #define	ZYD_EEPROM_36M_CAL	0xf83f	/* Calibration */
142 #define	ZYD_EEPROM_11A_INT	0xf847	/* Interpolation */
143 #define	ZYD_EEPROM_48M_CAL	0xf84f	/* Calibration */
144 #define	ZYD_EEPROM_48M_INT	0xf857	/* Interpolation */
145 #define	ZYD_EEPROM_54M_CAL	0xf85f	/* Calibration */
146 #define	ZYD_EEPROM_54M_INT	0xf867	/* Interpolation */
147 
148 /*
149  * Firmware registers offsets (relative to fwbase).
150  */
151 #define	ZYD_FW_FIRMWARE_REV	0x0000	/* Firmware version */
152 #define	ZYD_FW_USB_SPEED	0x0001	/* USB speed (!=0 if highspeed) */
153 #define	ZYD_FW_FIX_TX_RATE	0x0002	/* Fixed TX rate */
154 #define	ZYD_FW_LINK_STATUS	0x0003
155 #define	ZYD_FW_SOFT_RESET	0x0004
156 #define	ZYD_FW_FLASH_CHK	0x0005
157 
158 /* possible flags for register ZYD_FW_LINK_STATUS */
159 #define	ZYD_LED1	(1 << 8)
160 #define	ZYD_LED2	(1 << 9)
161 
162 /*
163  * RF IDs.
164  */
165 #define	ZYD_RF_UW2451		0x2	/* not supported yet */
166 #define	ZYD_RF_UCHIP		0x3	/* not supported yet */
167 #define	ZYD_RF_AL2230		0x4
168 #define	ZYD_RF_AL7230B		0x5
169 #define	ZYD_RF_THETA		0x6	/* not supported yet */
170 #define	ZYD_RF_AL2210		0x7
171 #define	ZYD_RF_MAXIM_NEW	0x8
172 #define	ZYD_RF_GCT		0x9
173 #define	ZYD_RF_PV2000		0xa	/* not supported yet */
174 #define	ZYD_RF_RALINK		0xb	/* not supported yet */
175 #define	ZYD_RF_INTERSIL		0xc	/* not supported yet */
176 #define	ZYD_RF_RFMD		0xd
177 #define	ZYD_RF_MAXIM_NEW2	0xe
178 #define	ZYD_RF_PHILIPS		0xf	/* not supported yet */
179 
180 /*
181  * PHY registers (8 bits, not documented).
182  */
183 #define	ZYD_CR0		0x9000
184 #define	ZYD_CR1		0x9004
185 #define	ZYD_CR2		0x9008
186 #define	ZYD_CR3		0x900c
187 #define	ZYD_CR5		0x9010
188 #define	ZYD_CR6		0x9014
189 #define	ZYD_CR7		0x9018
190 #define	ZYD_CR8		0x901c
191 #define	ZYD_CR4		0x9020
192 #define	ZYD_CR9		0x9024
193 #define	ZYD_CR10	0x9028
194 #define	ZYD_CR11	0x902c
195 #define	ZYD_CR12	0x9030
196 #define	ZYD_CR13	0x9034
197 #define	ZYD_CR14	0x9038
198 #define	ZYD_CR15	0x903c
199 #define	ZYD_CR16	0x9040
200 #define	ZYD_CR17	0x9044
201 #define	ZYD_CR18	0x9048
202 #define	ZYD_CR19	0x904c
203 #define	ZYD_CR20	0x9050
204 #define	ZYD_CR21	0x9054
205 #define	ZYD_CR22	0x9058
206 #define	ZYD_CR23	0x905c
207 #define	ZYD_CR24	0x9060
208 #define	ZYD_CR25	0x9064
209 #define	ZYD_CR26	0x9068
210 #define	ZYD_CR27	0x906c
211 #define	ZYD_CR28	0x9070
212 #define	ZYD_CR29	0x9074
213 #define	ZYD_CR30	0x9078
214 #define	ZYD_CR31	0x907c
215 #define	ZYD_CR32	0x9080
216 #define	ZYD_CR33	0x9084
217 #define	ZYD_CR34	0x9088
218 #define	ZYD_CR35	0x908c
219 #define	ZYD_CR36	0x9090
220 #define	ZYD_CR37	0x9094
221 #define	ZYD_CR38	0x9098
222 #define	ZYD_CR39	0x909c
223 #define	ZYD_CR40	0x90a0
224 #define	ZYD_CR41	0x90a4
225 #define	ZYD_CR42	0x90a8
226 #define	ZYD_CR43	0x90ac
227 #define	ZYD_CR44	0x90b0
228 #define	ZYD_CR45	0x90b4
229 #define	ZYD_CR46	0x90b8
230 #define	ZYD_CR47	0x90bc
231 #define	ZYD_CR48	0x90c0
232 #define	ZYD_CR49	0x90c4
233 #define	ZYD_CR50	0x90c8
234 #define	ZYD_CR51	0x90cc
235 #define	ZYD_CR52	0x90d0
236 #define	ZYD_CR53	0x90d4
237 #define	ZYD_CR54	0x90d8
238 #define	ZYD_CR55	0x90dc
239 #define	ZYD_CR56	0x90e0
240 #define	ZYD_CR57	0x90e4
241 #define	ZYD_CR58	0x90e8
242 #define	ZYD_CR59	0x90ec
243 #define	ZYD_CR60	0x90f0
244 #define	ZYD_CR61	0x90f4
245 #define	ZYD_CR62	0x90f8
246 #define	ZYD_CR63	0x90fc
247 #define	ZYD_CR64	0x9100
248 #define	ZYD_CR65	0x9104
249 #define	ZYD_CR66	0x9108
250 #define	ZYD_CR67	0x910c
251 #define	ZYD_CR68	0x9110
252 #define	ZYD_CR69	0x9114
253 #define	ZYD_CR70	0x9118
254 #define	ZYD_CR71	0x911c
255 #define	ZYD_CR72	0x9120
256 #define	ZYD_CR73	0x9124
257 #define	ZYD_CR74	0x9128
258 #define	ZYD_CR75	0x912c
259 #define	ZYD_CR76	0x9130
260 #define	ZYD_CR77	0x9134
261 #define	ZYD_CR78	0x9138
262 #define	ZYD_CR79	0x913c
263 #define	ZYD_CR80	0x9140
264 #define	ZYD_CR81	0x9144
265 #define	ZYD_CR82	0x9148
266 #define	ZYD_CR83	0x914c
267 #define	ZYD_CR84	0x9150
268 #define	ZYD_CR85	0x9154
269 #define	ZYD_CR86	0x9158
270 #define	ZYD_CR87	0x915c
271 #define	ZYD_CR88	0x9160
272 #define	ZYD_CR89	0x9164
273 #define	ZYD_CR90	0x9168
274 #define	ZYD_CR91	0x916c
275 #define	ZYD_CR92	0x9170
276 #define	ZYD_CR93	0x9174
277 #define	ZYD_CR94	0x9178
278 #define	ZYD_CR95	0x917c
279 #define	ZYD_CR96	0x9180
280 #define	ZYD_CR97	0x9184
281 #define	ZYD_CR98	0x9188
282 #define	ZYD_CR99	0x918c
283 #define	ZYD_CR100	0x9190
284 #define	ZYD_CR101	0x9194
285 #define	ZYD_CR102	0x9198
286 #define	ZYD_CR103	0x919c
287 #define	ZYD_CR104	0x91a0
288 #define	ZYD_CR105	0x91a4
289 #define	ZYD_CR106	0x91a8
290 #define	ZYD_CR107	0x91ac
291 #define	ZYD_CR108	0x91b0
292 #define	ZYD_CR109	0x91b4
293 #define	ZYD_CR110	0x91b8
294 #define	ZYD_CR111	0x91bc
295 #define	ZYD_CR112	0x91c0
296 #define	ZYD_CR113	0x91c4
297 #define	ZYD_CR114	0x91c8
298 #define	ZYD_CR115	0x91cc
299 #define	ZYD_CR116	0x91d0
300 #define	ZYD_CR117	0x91d4
301 #define	ZYD_CR118	0x91d8
302 #define	ZYD_CR119	0x91dc
303 #define	ZYD_CR120	0x91e0
304 #define	ZYD_CR121	0x91e4
305 #define	ZYD_CR122	0x91e8
306 #define	ZYD_CR123	0x91ec
307 #define	ZYD_CR124	0x91f0
308 #define	ZYD_CR125	0x91f4
309 #define	ZYD_CR126	0x91f8
310 #define	ZYD_CR127	0x91fc
311 #define	ZYD_CR128	0x9200
312 #define	ZYD_CR129	0x9204
313 #define	ZYD_CR130	0x9208
314 #define	ZYD_CR131	0x920c
315 #define	ZYD_CR132	0x9210
316 #define	ZYD_CR133	0x9214
317 #define	ZYD_CR134	0x9218
318 #define	ZYD_CR135	0x921c
319 #define	ZYD_CR136	0x9220
320 #define	ZYD_CR137	0x9224
321 #define	ZYD_CR138	0x9228
322 #define	ZYD_CR139	0x922c
323 #define	ZYD_CR140	0x9230
324 #define	ZYD_CR141	0x9234
325 #define	ZYD_CR142	0x9238
326 #define	ZYD_CR143	0x923c
327 #define	ZYD_CR144	0x9240
328 #define	ZYD_CR145	0x9244
329 #define	ZYD_CR146	0x9248
330 #define	ZYD_CR147	0x924c
331 #define	ZYD_CR148	0x9250
332 #define	ZYD_CR149	0x9254
333 #define	ZYD_CR150	0x9258
334 #define	ZYD_CR151	0x925c
335 #define	ZYD_CR152	0x9260
336 #define	ZYD_CR153	0x9264
337 #define	ZYD_CR154	0x9268
338 #define	ZYD_CR155	0x926c
339 #define	ZYD_CR156	0x9270
340 #define	ZYD_CR157	0x9274
341 #define	ZYD_CR158	0x9278
342 #define	ZYD_CR159	0x927c
343 #define	ZYD_CR160	0x9280
344 #define	ZYD_CR161	0x9284
345 #define	ZYD_CR162	0x9288
346 #define	ZYD_CR163	0x928c
347 #define	ZYD_CR164	0x9290
348 #define	ZYD_CR165	0x9294
349 #define	ZYD_CR166	0x9298
350 #define	ZYD_CR167	0x929c
351 #define	ZYD_CR168	0x92a0
352 #define	ZYD_CR169	0x92a4
353 #define	ZYD_CR170	0x92a8
354 #define	ZYD_CR171	0x92ac
355 #define	ZYD_CR172	0x92b0
356 #define	ZYD_CR173	0x92b4
357 #define	ZYD_CR174	0x92b8
358 #define	ZYD_CR175	0x92bc
359 #define	ZYD_CR176	0x92c0
360 #define	ZYD_CR177	0x92c4
361 #define	ZYD_CR178	0x92c8
362 #define	ZYD_CR179	0x92cc
363 #define	ZYD_CR180	0x92d0
364 #define	ZYD_CR181	0x92d4
365 #define	ZYD_CR182	0x92d8
366 #define	ZYD_CR183	0x92dc
367 #define	ZYD_CR184	0x92e0
368 #define	ZYD_CR185	0x92e4
369 #define	ZYD_CR186	0x92e8
370 #define	ZYD_CR187	0x92ec
371 #define	ZYD_CR188	0x92f0
372 #define	ZYD_CR189	0x92f4
373 #define	ZYD_CR190	0x92f8
374 #define	ZYD_CR191	0x92fc
375 #define	ZYD_CR192	0x9300
376 #define	ZYD_CR193	0x9304
377 #define	ZYD_CR194	0x9308
378 #define	ZYD_CR195	0x930c
379 #define	ZYD_CR196	0x9310
380 #define	ZYD_CR197	0x9314
381 #define	ZYD_CR198	0x9318
382 #define	ZYD_CR199	0x931c
383 #define	ZYD_CR200	0x9320
384 #define	ZYD_CR201	0x9324
385 #define	ZYD_CR202	0x9328
386 #define	ZYD_CR203	0x932c
387 #define	ZYD_CR204	0x9330
388 #define	ZYD_CR205	0x9334
389 #define	ZYD_CR206	0x9338
390 #define	ZYD_CR207	0x933c
391 #define	ZYD_CR208	0x9340
392 #define	ZYD_CR209	0x9344
393 #define	ZYD_CR210	0x9348
394 #define	ZYD_CR211	0x934c
395 #define	ZYD_CR212	0x9350
396 #define	ZYD_CR213	0x9354
397 #define	ZYD_CR214	0x9358
398 #define	ZYD_CR215	0x935c
399 #define	ZYD_CR216	0x9360
400 #define	ZYD_CR217	0x9364
401 #define	ZYD_CR218	0x9368
402 #define	ZYD_CR219	0x936c
403 #define	ZYD_CR220	0x9370
404 #define	ZYD_CR221	0x9374
405 #define	ZYD_CR222	0x9378
406 #define	ZYD_CR223	0x937c
407 #define	ZYD_CR224	0x9380
408 #define	ZYD_CR225	0x9384
409 #define	ZYD_CR226	0x9388
410 #define	ZYD_CR227	0x938c
411 #define	ZYD_CR228	0x9390
412 #define	ZYD_CR229	0x9394
413 #define	ZYD_CR230	0x9398
414 #define	ZYD_CR231	0x939c
415 #define	ZYD_CR232	0x93a0
416 #define	ZYD_CR233	0x93a4
417 #define	ZYD_CR234	0x93a8
418 #define	ZYD_CR235	0x93ac
419 #define	ZYD_CR236	0x93b0
420 #define	ZYD_CR240	0x93c0
421 #define	ZYD_CR241	0x93c4
422 #define	ZYD_CR242	0x93c8
423 #define	ZYD_CR243	0x93cc
424 #define	ZYD_CR244	0x93d0
425 #define	ZYD_CR245	0x93d4
426 #define	ZYD_CR251	0x93ec
427 #define	ZYD_CR252	0x93f0
428 #define	ZYD_CR253	0x93f4
429 #define	ZYD_CR254	0x93f8
430 #define	ZYD_CR255	0x93fc
431 
432 /* copied nearly verbatim from the Linux driver rewrite */
433 #define	ZYD_DEF_PHY							\
434 {									\
435 	{ ZYD_CR0,   0x0a }, { ZYD_CR1,   0x06 }, { ZYD_CR2,   0x26 },	\
436 	{ ZYD_CR3,   0x38 }, { ZYD_CR4,   0x80 }, { ZYD_CR9,   0xa0 },	\
437 	{ ZYD_CR10,  0x81 }, { ZYD_CR11,  0x00 }, { ZYD_CR12,  0x7f },	\
438 	{ ZYD_CR13,  0x8c }, { ZYD_CR14,  0x80 }, { ZYD_CR15,  0x3d },	\
439 	{ ZYD_CR16,  0x20 }, { ZYD_CR17,  0x1e }, { ZYD_CR18,  0x0a },	\
440 	{ ZYD_CR19,  0x48 }, { ZYD_CR20,  0x0c }, { ZYD_CR21,  0x0c },	\
441 	{ ZYD_CR22,  0x23 }, { ZYD_CR23,  0x90 }, { ZYD_CR24,  0x14 },	\
442 	{ ZYD_CR25,  0x40 }, { ZYD_CR26,  0x10 }, { ZYD_CR27,  0x19 },	\
443 	{ ZYD_CR28,  0x7f }, { ZYD_CR29,  0x80 }, { ZYD_CR30,  0x4b },	\
444 	{ ZYD_CR31,  0x60 }, { ZYD_CR32,  0x43 }, { ZYD_CR33,  0x08 },	\
445 	{ ZYD_CR34,  0x06 }, { ZYD_CR35,  0x0a }, { ZYD_CR36,  0x00 },	\
446 	{ ZYD_CR37,  0x00 }, { ZYD_CR38,  0x38 }, { ZYD_CR39,  0x0c },	\
447 	{ ZYD_CR40,  0x84 }, { ZYD_CR41,  0x2a }, { ZYD_CR42,  0x80 },	\
448 	{ ZYD_CR43,  0x10 }, { ZYD_CR44,  0x12 }, { ZYD_CR46,  0xff },	\
449 	{ ZYD_CR47,  0x08 }, { ZYD_CR48,  0x26 }, { ZYD_CR49,  0x5b },	\
450 	{ ZYD_CR64,  0xd0 }, { ZYD_CR65,  0x04 }, { ZYD_CR66,  0x58 },	\
451 	{ ZYD_CR67,  0xc9 }, { ZYD_CR68,  0x88 }, { ZYD_CR69,  0x41 },	\
452 	{ ZYD_CR70,  0x23 }, { ZYD_CR71,  0x10 }, { ZYD_CR72,  0xff },	\
453 	{ ZYD_CR73,  0x32 }, { ZYD_CR74,  0x30 }, { ZYD_CR75,  0x65 },	\
454 	{ ZYD_CR76,  0x41 }, { ZYD_CR77,  0x1b }, { ZYD_CR78,  0x30 },	\
455 	{ ZYD_CR79,  0x68 }, { ZYD_CR80,  0x64 }, { ZYD_CR81,  0x64 },	\
456 	{ ZYD_CR82,  0x00 }, { ZYD_CR83,  0x00 }, { ZYD_CR84,  0x00 },	\
457 	{ ZYD_CR85,  0x02 }, { ZYD_CR86,  0x00 }, { ZYD_CR87,  0x00 },	\
458 	{ ZYD_CR88,  0xff }, { ZYD_CR89,  0xfc }, { ZYD_CR90,  0x00 },	\
459 	{ ZYD_CR91,  0x00 }, { ZYD_CR92,  0x00 }, { ZYD_CR93,  0x08 },	\
460 	{ ZYD_CR94,  0x00 }, { ZYD_CR95,  0x00 }, { ZYD_CR96,  0xff },	\
461 	{ ZYD_CR97,  0xe7 }, { ZYD_CR98,  0x00 }, { ZYD_CR99,  0x00 },	\
462 	{ ZYD_CR100, 0x00 }, { ZYD_CR101, 0xae }, { ZYD_CR102, 0x02 },	\
463 	{ ZYD_CR103, 0x00 }, { ZYD_CR104, 0x03 }, { ZYD_CR105, 0x65 },	\
464 	{ ZYD_CR106, 0x04 }, { ZYD_CR107, 0x00 }, { ZYD_CR108, 0x0a },	\
465 	{ ZYD_CR109, 0xaa }, { ZYD_CR110, 0xaa }, { ZYD_CR111, 0x25 },	\
466 	{ ZYD_CR112, 0x25 }, { ZYD_CR113, 0x00 }, { ZYD_CR119, 0x1e },	\
467 	{ ZYD_CR125, 0x90 }, { ZYD_CR126, 0x00 }, { ZYD_CR127, 0x00 },	\
468 	{ ZYD_CR5,   0x00 }, { ZYD_CR6,   0x00 }, { ZYD_CR7,   0x00 },	\
469 	{ ZYD_CR8,   0x00 }, { ZYD_CR9,   0x20 }, { ZYD_CR12,  0xf0 },	\
470 	{ ZYD_CR20,  0x0e }, { ZYD_CR21,  0x0e }, { ZYD_CR27,  0x10 },	\
471 	{ ZYD_CR44,  0x33 }, { ZYD_CR47,  0x30 }, { ZYD_CR83,  0x24 },	\
472 	{ ZYD_CR84,  0x04 }, { ZYD_CR85,  0x00 }, { ZYD_CR86,  0x0C },	\
473 	{ ZYD_CR87,  0x12 }, { ZYD_CR88,  0x0C }, { ZYD_CR89,  0x00 },	\
474 	{ ZYD_CR90,  0x10 }, { ZYD_CR91,  0x08 }, { ZYD_CR93,  0x00 },	\
475 	{ ZYD_CR94,  0x01 }, { ZYD_CR95,  0x00 }, { ZYD_CR96,  0x50 },	\
476 	{ ZYD_CR97,  0x37 }, { ZYD_CR98,  0x35 }, { ZYD_CR101, 0x13 },	\
477 	{ ZYD_CR102, 0x27 }, { ZYD_CR103, 0x27 }, { ZYD_CR104, 0x18 },	\
478 	{ ZYD_CR105, 0x12 }, { ZYD_CR109, 0x27 }, { ZYD_CR110, 0x27 },	\
479 	{ ZYD_CR111, 0x27 }, { ZYD_CR112, 0x27 }, { ZYD_CR113, 0x27 },	\
480 	{ ZYD_CR114, 0x27 }, { ZYD_CR115, 0x26 }, { ZYD_CR116, 0x24 },	\
481 	{ ZYD_CR117, 0xfc }, { ZYD_CR118, 0xfa }, { ZYD_CR120, 0x4f },	\
482 	{ ZYD_CR123, 0x27 }, { ZYD_CR125, 0xaa }, { ZYD_CR127, 0x03 },	\
483 	{ ZYD_CR128, 0x14 }, { ZYD_CR129, 0x12 }, { ZYD_CR130, 0x10 },	\
484 	{ ZYD_CR131, 0x0C }, { ZYD_CR136, 0xdf }, { ZYD_CR137, 0x40 },	\
485 	{ ZYD_CR138, 0xa0 }, { ZYD_CR139, 0xb0 }, { ZYD_CR140, 0x99 },	\
486 	{ ZYD_CR141, 0x82 }, { ZYD_CR142, 0x54 }, { ZYD_CR143, 0x1c },	\
487 	{ ZYD_CR144, 0x6c }, { ZYD_CR147, 0x07 }, { ZYD_CR148, 0x4c },	\
488 	{ ZYD_CR149, 0x50 }, { ZYD_CR150, 0x0e }, { ZYD_CR151, 0x18 },	\
489 	{ ZYD_CR160, 0xfe }, { ZYD_CR161, 0xee }, { ZYD_CR162, 0xaa },	\
490 	{ ZYD_CR163, 0xfa }, { ZYD_CR164, 0xfa }, { ZYD_CR165, 0xea },	\
491 	{ ZYD_CR166, 0xbe }, { ZYD_CR167, 0xbe }, { ZYD_CR168, 0x6a },	\
492 	{ ZYD_CR169, 0xba }, { ZYD_CR170, 0xba }, { ZYD_CR171, 0xba },	\
493 	{ ZYD_CR204, 0x7d }, { ZYD_CR203, 0x30 }, 			\
494 	{ 0, 0 }							\
495 }
496 
497 #define	ZYD_DEF_PHYB							\
498 {									\
499 	{ ZYD_CR0,   0x14 }, { ZYD_CR1,   0x06 }, { ZYD_CR2,   0x26 },	\
500 	{ ZYD_CR3,   0x38 }, { ZYD_CR4,   0x80 }, { ZYD_CR9,   0xe0 },	\
501 	{ ZYD_CR10,  0x81 }, { ZYD_CR11,  0x00 }, { ZYD_CR12,  0xf0 },	\
502 	{ ZYD_CR13,  0x8c }, { ZYD_CR14,  0x80 }, { ZYD_CR15,  0x3d },	\
503 	{ ZYD_CR16,  0x20 }, { ZYD_CR17,  0x1e }, { ZYD_CR18,  0x0a },	\
504 	{ ZYD_CR19,  0x48 }, { ZYD_CR20,  0x10 }, { ZYD_CR21,  0x0e },	\
505 	{ ZYD_CR22,  0x23 }, { ZYD_CR23,  0x90 }, { ZYD_CR24,  0x14 },	\
506 	{ ZYD_CR25,  0x40 }, { ZYD_CR26,  0x10 }, { ZYD_CR27,  0x10 },	\
507 	{ ZYD_CR28,  0x7f }, { ZYD_CR29,  0x80 }, { ZYD_CR30,  0x4b },	\
508 	{ ZYD_CR31,  0x60 }, { ZYD_CR32,  0x43 }, { ZYD_CR33,  0x08 },	\
509 	{ ZYD_CR34,  0x06 }, { ZYD_CR35,  0x0a }, { ZYD_CR36,  0x00 },	\
510 	{ ZYD_CR37,  0x00 }, { ZYD_CR38,  0x38 }, { ZYD_CR39,  0x0c },	\
511 	{ ZYD_CR40,  0x84 }, { ZYD_CR41,  0x2a }, { ZYD_CR42,  0x80 },	\
512 	{ ZYD_CR43,  0x10 }, { ZYD_CR44,  0x33 }, { ZYD_CR46,  0xff },	\
513 	{ ZYD_CR47,  0x1E }, { ZYD_CR48,  0x26 }, { ZYD_CR49,  0x5b },	\
514 	{ ZYD_CR64,  0xd0 }, { ZYD_CR65,  0x04 }, { ZYD_CR66,  0x58 },	\
515 	{ ZYD_CR67,  0xc9 }, { ZYD_CR68,  0x88 }, { ZYD_CR69,  0x41 },	\
516 	{ ZYD_CR70,  0x23 }, { ZYD_CR71,  0x10 }, { ZYD_CR72,  0xff },	\
517 	{ ZYD_CR73,  0x32 }, { ZYD_CR74,  0x30 }, { ZYD_CR75,  0x65 },	\
518 	{ ZYD_CR76,  0x41 }, { ZYD_CR77,  0x1b }, { ZYD_CR78,  0x30 },	\
519 	{ ZYD_CR79,  0xf0 }, { ZYD_CR80,  0x64 }, { ZYD_CR81,  0x64 },	\
520 	{ ZYD_CR82,  0x00 }, { ZYD_CR83,  0x24 }, { ZYD_CR84,  0x04 },	\
521 	{ ZYD_CR85,  0x00 }, { ZYD_CR86,  0x0c }, { ZYD_CR87,  0x12 },	\
522 	{ ZYD_CR88,  0x0c }, { ZYD_CR89,  0x00 }, { ZYD_CR90,  0x58 },	\
523 	{ ZYD_CR91,  0x04 }, { ZYD_CR92,  0x00 }, { ZYD_CR93,  0x00 },	\
524 	{ ZYD_CR94,  0x01 }, { ZYD_CR95,  0x20 }, { ZYD_CR96,  0x50 },	\
525 	{ ZYD_CR97,  0x37 }, { ZYD_CR98,  0x35 }, { ZYD_CR99,  0x00 },	\
526 	{ ZYD_CR100, 0x01 }, { ZYD_CR101, 0x13 }, { ZYD_CR102, 0x27 },	\
527 	{ ZYD_CR103, 0x27 }, { ZYD_CR104, 0x18 }, { ZYD_CR105, 0x12 },	\
528 	{ ZYD_CR106, 0x04 }, { ZYD_CR107, 0x00 }, { ZYD_CR108, 0x0a },	\
529 	{ ZYD_CR109, 0x27 }, { ZYD_CR110, 0x27 }, { ZYD_CR111, 0x27 },	\
530 	{ ZYD_CR112, 0x27 }, { ZYD_CR113, 0x27 }, { ZYD_CR114, 0x27 },	\
531 	{ ZYD_CR115, 0x26 }, { ZYD_CR116, 0x24 }, { ZYD_CR117, 0xfc },	\
532 	{ ZYD_CR118, 0xfa }, { ZYD_CR119, 0x1e }, { ZYD_CR125, 0x90 },	\
533 	{ ZYD_CR126, 0x00 }, { ZYD_CR127, 0x00 }, { ZYD_CR128, 0x14 },	\
534 	{ ZYD_CR129, 0x12 }, { ZYD_CR130, 0x10 }, { ZYD_CR131, 0x0c },	\
535 	{ ZYD_CR136, 0xdf }, { ZYD_CR137, 0xa0 }, { ZYD_CR138, 0xa8 },	\
536 	{ ZYD_CR139, 0xb4 }, { ZYD_CR140, 0x98 }, { ZYD_CR141, 0x82 },	\
537 	{ ZYD_CR142, 0x53 }, { ZYD_CR143, 0x1c }, { ZYD_CR144, 0x6c },	\
538 	{ ZYD_CR147, 0x07 }, { ZYD_CR148, 0x40 }, { ZYD_CR149, 0x40 },	\
539 	{ ZYD_CR150, 0x14 }, { ZYD_CR151, 0x18 }, { ZYD_CR159, 0x70 },	\
540 	{ ZYD_CR160, 0xfe }, { ZYD_CR161, 0xee }, { ZYD_CR162, 0xaa },	\
541 	{ ZYD_CR163, 0xfa }, { ZYD_CR164, 0xfa }, { ZYD_CR165, 0xea },	\
542 	{ ZYD_CR166, 0xbe }, { ZYD_CR167, 0xbe }, { ZYD_CR168, 0x6a },	\
543 	{ ZYD_CR169, 0xba }, { ZYD_CR170, 0xba }, { ZYD_CR171, 0xba },	\
544 	{ ZYD_CR204, 0x7d }, { ZYD_CR203, 0x30 },			\
545 	{ 0, 0 }							\
546 }
547 
548 #define	ZYD_RFMD_PHY							\
549 {									\
550 	{ ZYD_CR2,   0x1e }, { ZYD_CR9,   0x20 }, { ZYD_CR10,  0x89 },	\
551 	{ ZYD_CR11,  0x00 }, { ZYD_CR15,  0xd0 }, { ZYD_CR17,  0x68 },	\
552 	{ ZYD_CR19,  0x4a }, { ZYD_CR20,  0x0c }, { ZYD_CR21,  0x0e },	\
553 	{ ZYD_CR23,  0x48 }, { ZYD_CR24,  0x14 }, { ZYD_CR26,  0x90 },	\
554 	{ ZYD_CR27,  0x30 }, { ZYD_CR29,  0x20 }, { ZYD_CR31,  0xb2 },	\
555 	{ ZYD_CR32,  0x43 }, { ZYD_CR33,  0x28 }, { ZYD_CR38,  0x30 },	\
556 	{ ZYD_CR34,  0x0f }, { ZYD_CR35,  0xf0 }, { ZYD_CR41,  0x2a },	\
557 	{ ZYD_CR46,  0x7f }, { ZYD_CR47,  0x1e }, { ZYD_CR51,  0xc5 },	\
558 	{ ZYD_CR52,  0xc5 }, { ZYD_CR53,  0xc5 }, { ZYD_CR79,  0x58 },	\
559 	{ ZYD_CR80,  0x30 }, { ZYD_CR81,  0x30 }, { ZYD_CR82,  0x00 },	\
560 	{ ZYD_CR83,  0x24 }, { ZYD_CR84,  0x04 }, { ZYD_CR85,  0x00 },	\
561 	{ ZYD_CR86,  0x10 }, { ZYD_CR87,  0x2a }, { ZYD_CR88,  0x10 },	\
562 	{ ZYD_CR89,  0x24 }, { ZYD_CR90,  0x18 }, { ZYD_CR91,  0x00 },	\
563 	{ ZYD_CR92,  0x0a }, { ZYD_CR93,  0x00 }, { ZYD_CR94,  0x01 },	\
564 	{ ZYD_CR95,  0x00 }, { ZYD_CR96,  0x40 }, { ZYD_CR97,  0x37 },	\
565 	{ ZYD_CR98,  0x05 }, { ZYD_CR99,  0x28 }, { ZYD_CR100, 0x00 },	\
566 	{ ZYD_CR101, 0x13 }, { ZYD_CR102, 0x27 }, { ZYD_CR103, 0x27 },	\
567 	{ ZYD_CR104, 0x18 }, { ZYD_CR105, 0x12 }, { ZYD_CR106, 0x1a },	\
568 	{ ZYD_CR107, 0x24 }, { ZYD_CR108, 0x0a }, { ZYD_CR109, 0x13 },	\
569 	{ ZYD_CR110, 0x2f }, { ZYD_CR111, 0x27 }, { ZYD_CR112, 0x27 },	\
570 	{ ZYD_CR113, 0x27 }, { ZYD_CR114, 0x27 }, { ZYD_CR115, 0x40 },	\
571 	{ ZYD_CR116, 0x40 }, { ZYD_CR117, 0xf0 }, { ZYD_CR118, 0xf0 },	\
572 	{ ZYD_CR119, 0x16 }, { ZYD_CR122, 0x00 }, { ZYD_CR127, 0x03 },	\
573 	{ ZYD_CR131, 0x08 }, { ZYD_CR138, 0x28 }, { ZYD_CR148, 0x44 },	\
574 	{ ZYD_CR150, 0x10 }, { ZYD_CR169, 0xbb }, { ZYD_CR170, 0xbb }	\
575 }
576 
577 #define	ZYD_RFMD_RF							\
578 {									\
579 	0x000007, 0x07dd43, 0x080959, 0x0e6666, 0x116a57, 0x17dd43,	\
580 	0x1819f9, 0x1e6666, 0x214554, 0x25e7fa, 0x27fffa, 0x294128,	\
581 	0x2c0000, 0x300000, 0x340000, 0x381e0f, 0x6c180f		\
582 }
583 
584 #define	ZYD_RFMD_CHANTABLE	\
585 {				\
586 	{ 0x181979, 0x1e6666 },	\
587 	{ 0x181989, 0x1e6666 },	\
588 	{ 0x181999, 0x1e6666 },	\
589 	{ 0x1819a9, 0x1e6666 },	\
590 	{ 0x1819b9, 0x1e6666 },	\
591 	{ 0x1819c9, 0x1e6666 },	\
592 	{ 0x1819d9, 0x1e6666 },	\
593 	{ 0x1819e9, 0x1e6666 },	\
594 	{ 0x1819f9, 0x1e6666 },	\
595 	{ 0x181a09, 0x1e6666 },	\
596 	{ 0x181a19, 0x1e6666 },	\
597 	{ 0x181a29, 0x1e6666 },	\
598 	{ 0x181a39, 0x1e6666 },	\
599 	{ 0x181a60, 0x1c0000 }	\
600 }
601 
602 
603 
604 #define	ZYD_AL2230_PHY							\
605 {									\
606 	{ ZYD_CR15,  0x20 }, { ZYD_CR23,  0x40 }, { ZYD_CR24,  0x20 },	\
607 	{ ZYD_CR26,  0x11 }, { ZYD_CR28,  0x3e }, { ZYD_CR29,  0x00 },	\
608 	{ ZYD_CR44,  0x33 }, { ZYD_CR106, 0x2a }, { ZYD_CR107, 0x1a },	\
609 	{ ZYD_CR109, 0x09 }, { ZYD_CR110, 0x27 }, { ZYD_CR111, 0x2b },	\
610 	{ ZYD_CR112, 0x2b }, { ZYD_CR119, 0x0a }, { ZYD_CR10,  0x89 },	\
611 	{ ZYD_CR17,  0x28 }, { ZYD_CR26,  0x93 }, { ZYD_CR34,  0x30 },	\
612 	{ ZYD_CR35,  0x3e }, { ZYD_CR41,  0x24 }, { ZYD_CR44,  0x32 },	\
613 	{ ZYD_CR46,  0x96 }, { ZYD_CR47,  0x1e }, { ZYD_CR79,  0x58 },	\
614 	{ ZYD_CR80,  0x30 }, { ZYD_CR81,  0x30 }, { ZYD_CR87,  0x0a },	\
615 	{ ZYD_CR89,  0x04 }, { ZYD_CR92,  0x0a }, { ZYD_CR99,  0x28 },	\
616 	{ ZYD_CR100, 0x00 }, { ZYD_CR101, 0x13 }, { ZYD_CR102, 0x27 },	\
617 	{ ZYD_CR106, 0x24 }, { ZYD_CR107, 0x2a }, { ZYD_CR109, 0x09 },	\
618 	{ ZYD_CR110, 0x13 }, { ZYD_CR111, 0x1f }, { ZYD_CR112, 0x1f },	\
619 	{ ZYD_CR113, 0x27 }, { ZYD_CR114, 0x27 }, { ZYD_CR115, 0x24 },	\
620 	{ ZYD_CR116, 0x24 }, { ZYD_CR117, 0xf4 }, { ZYD_CR118, 0xfc },	\
621 	{ ZYD_CR119, 0x10 }, { ZYD_CR120, 0x4f }, { ZYD_CR121, 0x77 },	\
622 	{ ZYD_CR122, 0xe0 }, { ZYD_CR137, 0x88 }, { ZYD_CR252, 0xff },	\
623 	{ ZYD_CR253, 0xff }, { ZYD_CR251, 0x2f }, { ZYD_CR251, 0x3f },	\
624 	{ ZYD_CR138, 0x28 }, { ZYD_CR203, 0x06 } 			\
625 }
626 
627 #define	ZYD_AL2230_PHY_B						\
628 {									\
629 	{ ZYD_CR10,  0x89 }, { ZYD_CR15,  0x20 }, { ZYD_CR17,  0x2b },	\
630 	{ ZYD_CR23,  0x40 }, { ZYD_CR24,  0x20 }, { ZYD_CR26,  0x93 },	\
631 	{ ZYD_CR28,  0x3e }, { ZYD_CR29,  0x00 }, { ZYD_CR33,  0x28 },	\
632 	{ ZYD_CR34,  0x30 }, { ZYD_CR35,  0x3e }, { ZYD_CR41,  0x24 },	\
633 	{ ZYD_CR44,  0x32 }, { ZYD_CR46,  0x99 }, { ZYD_CR47,  0x1e },	\
634 	{ ZYD_CR48,  0x00 }, { ZYD_CR49,  0x00 }, { ZYD_CR51,  0x01 },	\
635 	{ ZYD_CR52,  0x80 }, { ZYD_CR53,  0x7e }, { ZYD_CR65,  0x00 },	\
636 	{ ZYD_CR66,  0x00 }, { ZYD_CR67,  0x00 }, { ZYD_CR68,  0x00 },	\
637 	{ ZYD_CR69,  0x28 }, { ZYD_CR79,  0x58 }, { ZYD_CR80,  0x30 },	\
638 	{ ZYD_CR81,  0x30 }, { ZYD_CR87,  0x0a }, { ZYD_CR89,  0x04 },	\
639 	{ ZYD_CR91,  0x00 }, { ZYD_CR92,  0x0a }, { ZYD_CR98,  0x8d },	\
640 	{ ZYD_CR99,  0x00 }, { ZYD_CR101, 0x13 }, { ZYD_CR106, 0x24 },	\
641 	{ ZYD_CR107, 0x2a }, { ZYD_CR109, 0x13 }, { ZYD_CR110, 0x1f },	\
642 	{ ZYD_CR111, 0x1f }, { ZYD_CR114, 0x27 }, { ZYD_CR115, 0x26 },	\
643 	{ ZYD_CR116, 0x24 }, { ZYD_CR117, 0xfa }, { ZYD_CR118, 0xfa },	\
644 	{ ZYD_CR119, 0x10 }, { ZYD_CR120, 0x4f }, { ZYD_CR121, 0x6c },	\
645 	{ ZYD_CR122, 0xfc }, { ZYD_CR123, 0x57 }, { ZYD_CR125, 0xad },	\
646 	{ ZYD_CR126, 0x6c }, { ZYD_CR127, 0x03 }, { ZYD_CR137, 0x50 },	\
647 	{ ZYD_CR138, 0xa8 }, { ZYD_CR144, 0xac }, { ZYD_CR150, 0x0d },	\
648 	{ ZYD_CR252, 0x00 }, { ZYD_CR253, 0x00 }			\
649 }
650 
651 #define	ZYD_AL2230_RF							\
652 {									\
653 	0x03f790, 0x033331, 0x00000d, 0x0b3331, 0x03b812, 0x00fff3,	\
654 	0x000da4, 0x0f4dc5, 0x0805b6, 0x011687, 0x000688, 0x0403b9,	\
655 	0x00dbba, 0x00099b, 0x0bdffc, 0x00000d, 0x00500f, 0x00d00f,	\
656 	0x004c0f, 0x00540f, 0x00700f, 0x00500f				\
657 }
658 
659 #define	ZYD_AL2230_RF_B							\
660 {									\
661 	0x03f790, 0x033331, 0x00000d, 0x0b3331, 0x03b812, 0x00fff3,	\
662 	0x0005a4, 0x0f4dc5, 0x0805b6, 0x0146c7, 0x000688, 0x0403b9,	\
663 	0x00dbba, 0x00099b, 0x0bdffc, 0x00000d, 0x00580f		\
664 }
665 
666 #define	ZYD_AL2230_CHANTABLE			\
667 {						\
668 	{ 0x03f790, 0x033331, 0x00000d },	\
669 	{ 0x03f790, 0x0b3331, 0x00000d },	\
670 	{ 0x03e790, 0x033331, 0x00000d },	\
671 	{ 0x03e790, 0x0b3331, 0x00000d },	\
672 	{ 0x03f7a0, 0x033331, 0x00000d },	\
673 	{ 0x03f7a0, 0x0b3331, 0x00000d },	\
674 	{ 0x03e7a0, 0x033331, 0x00000d },	\
675 	{ 0x03e7a0, 0x0b3331, 0x00000d },	\
676 	{ 0x03f7b0, 0x033331, 0x00000d },	\
677 	{ 0x03f7b0, 0x0b3331, 0x00000d },	\
678 	{ 0x03e7b0, 0x033331, 0x00000d },	\
679 	{ 0x03e7b0, 0x0b3331, 0x00000d },	\
680 	{ 0x03f7c0, 0x033331, 0x00000d },	\
681 	{ 0x03e7c0, 0x066661, 0x00000d }	\
682 }
683 
684 
685 
686 #define	ZYD_AL7230B_PHY_1						\
687 {									\
688 	{ ZYD_CR240, 0x57 }, { ZYD_CR15,  0x20 }, { ZYD_CR23,  0x40 },	\
689 	{ ZYD_CR24,  0x20 }, { ZYD_CR26,  0x11 }, { ZYD_CR28,  0x3e },	\
690 	{ ZYD_CR29,  0x00 }, { ZYD_CR44,  0x33 }, { ZYD_CR106, 0x22 },	\
691 	{ ZYD_CR107, 0x1a }, { ZYD_CR109, 0x09 }, { ZYD_CR110, 0x27 },	\
692 	{ ZYD_CR111, 0x2b }, { ZYD_CR112, 0x2b }, { ZYD_CR119, 0x0a },	\
693 	{ ZYD_CR122, 0xfc }, { ZYD_CR10,  0x89 }, { ZYD_CR17,  0x28 },	\
694 	{ ZYD_CR26,  0x93 }, { ZYD_CR34,  0x30 }, { ZYD_CR35,  0x3e },	\
695 	{ ZYD_CR41,  0x24 }, { ZYD_CR44,  0x32 }, { ZYD_CR46,  0x96 },	\
696 	{ ZYD_CR47,  0x1e }, { ZYD_CR79,  0x58 }, { ZYD_CR80,  0x30 },	\
697 	{ ZYD_CR81,  0x30 }, { ZYD_CR87,  0x0a }, { ZYD_CR89,  0x04 },	\
698 	{ ZYD_CR92,  0x0a }, { ZYD_CR99,  0x28 }, { ZYD_CR100, 0x02 },	\
699 	{ ZYD_CR101, 0x13 }, { ZYD_CR102, 0x27 }, { ZYD_CR106, 0x22 },	\
700 	{ ZYD_CR107, 0x3f }, { ZYD_CR109, 0x09 }, { ZYD_CR110, 0x1f },	\
701 	{ ZYD_CR111, 0x1f }, { ZYD_CR112, 0x1f }, { ZYD_CR113, 0x27 },	\
702 	{ ZYD_CR114, 0x27 }, { ZYD_CR115, 0x24 }, { ZYD_CR116, 0x3f },	\
703 	{ ZYD_CR117, 0xfa }, { ZYD_CR118, 0xfc }, { ZYD_CR119, 0x10 },	\
704 	{ ZYD_CR120, 0x4f }, { ZYD_CR121, 0x77 }, { ZYD_CR137, 0x88 },	\
705 	{ ZYD_CR138, 0xa8 }, { ZYD_CR252, 0x34 }, { ZYD_CR253, 0x34 },	\
706 	{ ZYD_CR251, 0x2f }						\
707 }
708 
709 #define	ZYD_AL7230B_PHY_2						\
710 {									\
711 	{ ZYD_CR251, 0x3f }, { ZYD_CR128, 0x14 }, { ZYD_CR129, 0x12 },	\
712 	{ ZYD_CR130, 0x10 }, { ZYD_CR38,  0x38 }, { ZYD_CR136, 0xdf }	\
713 }
714 
715 #define	ZYD_AL7230B_PHY_3						\
716 {									\
717 	{ ZYD_CR203, 0x06 }, { ZYD_CR240, 0x80 }			\
718 }
719 
720 #define	ZYD_AL7230B_RF_1						\
721 {									\
722 	0x09ec04, 0x8cccc8, 0x4ff821, 0xc5fbfc, 0x21ebfe, 0xafd401,	\
723 	0x6cf56a, 0xe04073, 0x193d76, 0x9dd844, 0x500007, 0xd8c010,	\
724 	0x3c9000, 0xbfffff, 0x700000, 0xf15d58				\
725 }
726 
727 #define	ZYD_AL7230B_RF_2						\
728 {									\
729 	0xf15d59, 0xf15d5c, 0xf15d58					\
730 }
731 
732 #define	ZYD_AL7230B_RF_SETCHANNEL					\
733 {									\
734 	0x4ff821, 0xc5fbfc, 0x21ebfe, 0xafd401, 0x6cf56a, 0xe04073,	\
735 	0x193d76, 0x9dd844, 0x500007, 0xd8c010, 0x3c9000, 0xf15d58	\
736 }
737 
738 #define	ZYD_AL7230B_CHANTABLE	\
739 {				\
740 	{ 0x09ec00, 0x8cccc8 },	\
741 	{ 0x09ec00, 0x8cccd8 },	\
742 	{ 0x09ec00, 0x8cccc0 },	\
743 	{ 0x09ec00, 0x8cccd0 },	\
744 	{ 0x05ec00, 0x8cccc8 },	\
745 	{ 0x05ec00, 0x8cccd8 },	\
746 	{ 0x05ec00, 0x8cccc0 },	\
747 	{ 0x05ec00, 0x8cccd0 },	\
748 	{ 0x0dec00, 0x8cccc8 },	\
749 	{ 0x0dec00, 0x8cccd8 },	\
750 	{ 0x0dec00, 0x8cccc0 },	\
751 	{ 0x0dec00, 0x8cccd0 },	\
752 	{ 0x03ec00, 0x8cccc8 },	\
753 	{ 0x03ec00, 0x866660 }	\
754 }
755 
756 
757 
758 #define	ZYD_AL2210_PHY							\
759 {									\
760 	{ ZYD_CR9,   0xe0 }, { ZYD_CR10, 0x91 }, { ZYD_CR12,  0x90 },	\
761 	{ ZYD_CR15,  0xd0 }, { ZYD_CR16, 0x40 }, { ZYD_CR17,  0x58 },	\
762 	{ ZYD_CR18,  0x04 }, { ZYD_CR23, 0x66 }, { ZYD_CR24,  0x14 },	\
763 	{ ZYD_CR26,  0x90 }, { ZYD_CR31, 0x80 }, { ZYD_CR34,  0x06 },	\
764 	{ ZYD_CR35,  0x3e }, { ZYD_CR38, 0x38 }, { ZYD_CR46,  0x90 },	\
765 	{ ZYD_CR47,  0x1e }, { ZYD_CR64, 0x64 }, { ZYD_CR79,  0xb5 },	\
766 	{ ZYD_CR80,  0x38 }, { ZYD_CR81, 0x30 }, { ZYD_CR113, 0xc0 },	\
767 	{ ZYD_CR127, 0x03 }						\
768 }
769 
770 #define	ZYD_AL2210_RF							\
771 {									\
772 	0x2396c0, 0x00fcb1, 0x358132, 0x0108b3, 0xc77804, 0x456415,	\
773 	0xff2226, 0x806667, 0x7860f8, 0xbb01c9, 0x00000a, 0x00000b	\
774 }
775 
776 #define	ZYD_AL2210_CHANTABLE						\
777 {									\
778 	0x0196c0, 0x019710, 0x019760, 0x0197b0,	0x019800, 0x019850,	\
779 	0x0198a0, 0x0198f0, 0x019940, 0x019990, 0x0199e0, 0x019a30,	\
780 	0x019a80, 0x019b40 						\
781 }
782 
783 
784 
785 #define	ZYD_GCT_PHY							\
786 {									\
787 	{ ZYD_CR47,  0x1e }, { ZYD_CR15, 0xdc }, { ZYD_CR113, 0xc0 },	\
788 	{ ZYD_CR20,  0x0c }, { ZYD_CR17, 0x65 }, { ZYD_CR34,  0x04 },	\
789 	{ ZYD_CR35,  0x35 }, { ZYD_CR24, 0x20 }, { ZYD_CR9,   0xe0 },	\
790 	{ ZYD_CR127, 0x02 }, { ZYD_CR10, 0x91 }, { ZYD_CR23,  0x7f },	\
791 	{ ZYD_CR27,  0x10 }, { ZYD_CR28, 0x7a }, { ZYD_CR79,  0xb5 },	\
792 	{ ZYD_CR64,  0x80 }, { ZYD_CR33, 0x28 }, { ZYD_CR38,  0x30 }	\
793 }
794 
795 #define	ZYD_GCT_RF							\
796 {									\
797 	0x1f0000, 0x1f0000, 0x1f0200, 0x1f0600, 0x1f8600, 0x1f8600,	\
798 	0x002050, 0x1f8000, 0x1f8200, 0x1f8600, 0x1c0000, 0x10c458,	\
799 	0x088e92, 0x187b82, 0x0401b4, 0x140816, 0x0c7000, 0x1c0000,	\
800 	0x02ccae, 0x128023, 0x0a0000, 0x1a0000, 0x06e380, 0x16cb94,	\
801 	0x0e1740, 0x014980, 0x116240, 0x090000, 0x192304, 0x05112f,	\
802 	0x0d54a8, 0x0f8000, 0x1c0008, 0x1c0000, 0x1a0000, 0x1c0008,	\
803 	0x150000, 0x0c7000, 0x150800, 0x150000				\
804 }
805 
806 #define	ZYD_GCT_CHANTABLE						\
807 {									\
808 	0x1a0000, 0x1a8000, 0x1a4000, 0x1ac000,	0x1a2000, 0x1aa000,	\
809 	0x1a6000, 0x1ae000, 0x1a1000, 0x1a9000, 0x1a5000, 0x1ad000,	\
810 	0x1a3000, 0x1ab000						\
811 }
812 
813 
814 
815 #define	ZYD_MAXIM_PHY							\
816 {									\
817 	{ ZYD_CR23,  0x40 }, { ZYD_CR15,  0x20 }, { ZYD_CR28,  0x3e },	\
818 	{ ZYD_CR29,  0x00 }, { ZYD_CR26,  0x11 }, { ZYD_CR44,  0x33 },	\
819 	{ ZYD_CR106, 0x2a }, { ZYD_CR107, 0x1a }, { ZYD_CR109, 0x2b },	\
820 	{ ZYD_CR110, 0x2b }, { ZYD_CR111, 0x2b }, { ZYD_CR112, 0x2b },	\
821 	{ ZYD_CR10,  0x89 }, { ZYD_CR17,  0x20 }, { ZYD_CR26,  0x93 },	\
822 	{ ZYD_CR34,  0x30 }, { ZYD_CR35,  0x40 }, { ZYD_CR41,  0x24 },	\
823 	{ ZYD_CR44,  0x32 }, { ZYD_CR46,  0x90 }, { ZYD_CR89,  0x18 },	\
824 	{ ZYD_CR92,  0x0a }, { ZYD_CR101, 0x13 }, { ZYD_CR102, 0x27 },	\
825 	{ ZYD_CR106, 0x20 }, { ZYD_CR107, 0x24 }, { ZYD_CR109, 0x09 },	\
826 	{ ZYD_CR110, 0x13 }, { ZYD_CR111, 0x13 }, { ZYD_CR112, 0x13 },	\
827 	{ ZYD_CR113, 0x27 }, { ZYD_CR114, 0x27 }, { ZYD_CR115, 0x24 },	\
828 	{ ZYD_CR116, 0x24 }, { ZYD_CR117, 0xf4 }, { ZYD_CR118, 0xfa },	\
829 	{ ZYD_CR120, 0x4f }, { ZYD_CR121, 0x77 }, { ZYD_CR122, 0xfe },	\
830 	{ ZYD_CR10,  0x89 }, { ZYD_CR17,  0x20 }, { ZYD_CR26,  0x93 },	\
831 	{ ZYD_CR34,  0x30 }, { ZYD_CR35,  0x40 }, { ZYD_CR41,  0x24 },	\
832 	{ ZYD_CR44,  0x32 }, { ZYD_CR46,  0x90 }, { ZYD_CR89,  0x18 },	\
833 	{ ZYD_CR92,  0x0a }, { ZYD_CR101, 0x13 }, { ZYD_CR102, 0x27 },	\
834 	{ ZYD_CR106, 0x20 }, { ZYD_CR107, 0x24 }, { ZYD_CR109, 0x13 },	\
835 	{ ZYD_CR110, 0x27 }, { ZYD_CR111, 0x27 }, { ZYD_CR112, 0x13 },	\
836 	{ ZYD_CR113, 0x27 }, { ZYD_CR114, 0x27 }, { ZYD_CR115, 0x24 },	\
837 	{ ZYD_CR116, 0x24 }, { ZYD_CR117, 0xf4 }, { ZYD_CR118, 0x00 },	\
838 	{ ZYD_CR120, 0x4f }, { ZYD_CR121, 0x06 }, { ZYD_CR122, 0xfe },	\
839 	{ ZYD_CR150, 0x0d }						\
840 }
841 
842 #define	ZYD_MAXIM_RF							\
843 {									\
844 	0x00ccd4, 0x030a03, 0x000400, 0x000ca1, 0x010072, 0x018645,	\
845 	0x004006, 0x0000a7, 0x008258, 0x003fc9, 0x00040a, 0x00000b,	\
846 	0x00026c							\
847 }
848 
849 #define	ZYD_MAXIM_CHANTABLE	\
850 {				\
851 	{ 0x0ccd4, 0x30a03 },	\
852 	{ 0x22224, 0x00a13 },	\
853 	{ 0x37774, 0x10a13 },	\
854 	{ 0x0ccd4, 0x30a13 },	\
855 	{ 0x22224, 0x00a23 },	\
856 	{ 0x37774, 0x10a23 },	\
857 	{ 0x0ccd4, 0x30a23 },	\
858 	{ 0x22224, 0x00a33 },	\
859 	{ 0x37774, 0x10a33 },	\
860 	{ 0x0ccd4, 0x30a33 },	\
861 	{ 0x22224, 0x00a43 },	\
862 	{ 0x37774, 0x10a43 },	\
863 	{ 0x0ccd4, 0x30a43 },	\
864 	{ 0x199a4, 0x20a53 }	\
865 }
866 
867 
868 
869 #define	ZYD_MAXIM2_PHY							\
870 {									\
871 	{ ZYD_CR23,  0x40 }, { ZYD_CR15,  0x20 }, { ZYD_CR28,  0x3e },	\
872 	{ ZYD_CR29,  0x00 }, { ZYD_CR26,  0x11 }, { ZYD_CR44,  0x33 },	\
873 	{ ZYD_CR106, 0x2a }, { ZYD_CR107, 0x1a }, { ZYD_CR109, 0x2b },	\
874 	{ ZYD_CR110, 0x2b }, { ZYD_CR111, 0x2b }, { ZYD_CR112, 0x2b },	\
875 	{ ZYD_CR10,  0x89 }, { ZYD_CR17,  0x20 }, { ZYD_CR26,  0x93 },	\
876 	{ ZYD_CR34,  0x30 }, { ZYD_CR35,  0x40 }, { ZYD_CR41,  0x24 },	\
877 	{ ZYD_CR44,  0x32 }, { ZYD_CR46,  0x90 }, { ZYD_CR89,  0x18 },	\
878 	{ ZYD_CR92,  0x0a }, { ZYD_CR101, 0x13 }, { ZYD_CR102, 0x27 },	\
879 	{ ZYD_CR106, 0x20 }, { ZYD_CR107, 0x24 }, { ZYD_CR109, 0x09 },	\
880 	{ ZYD_CR110, 0x13 }, { ZYD_CR111, 0x13 }, { ZYD_CR112, 0x13 },	\
881 	{ ZYD_CR113, 0x27 }, { ZYD_CR114, 0x27 }, { ZYD_CR115, 0x24 },	\
882 	{ ZYD_CR116, 0x24 }, { ZYD_CR117, 0xf4 }, { ZYD_CR118, 0xfa },	\
883 	{ ZYD_CR120, 0x4f }, { ZYD_CR121, 0x77 }, { ZYD_CR122, 0xfe },	\
884 	{ ZYD_CR10,  0x89 }, { ZYD_CR17,  0x20 }, { ZYD_CR26,  0x93 },	\
885 	{ ZYD_CR34,  0x30 }, { ZYD_CR35,  0x40 }, { ZYD_CR41,  0x24 },	\
886 	{ ZYD_CR44,  0x32 }, { ZYD_CR46,  0x90 }, { ZYD_CR79,  0x58 },	\
887 	{ ZYD_CR80,  0x30 }, { ZYD_CR81,  0x30 }, { ZYD_CR89,  0x18 },	\
888 	{ ZYD_CR92,  0x0a }, { ZYD_CR101, 0x13 }, { ZYD_CR102, 0x27 },	\
889 	{ ZYD_CR106, 0x20 }, { ZYD_CR107, 0x24 }, { ZYD_CR109, 0x09 },	\
890 	{ ZYD_CR110, 0x13 }, { ZYD_CR111, 0x13 }, { ZYD_CR112, 0x13 },	\
891 	{ ZYD_CR113, 0x27 }, { ZYD_CR114, 0x27 }, { ZYD_CR115, 0x24 },	\
892 	{ ZYD_CR116, 0x24 }, { ZYD_CR117, 0xf4 }, { ZYD_CR118, 0x00 },	\
893 	{ ZYD_CR120, 0x4f }, { ZYD_CR121, 0x06 }, { ZYD_CR122, 0xfe }	\
894 }
895 
896 #define	ZYD_MAXIM2_RF							\
897 {									\
898 	0x33334, 0x10a03, 0x00400, 0x00ca1, 0x10072, 0x18645, 0x04006,	\
899 	0x000a7, 0x08258, 0x03fc9, 0x0040a, 0x0000b, 0x0026c		\
900 }
901 
902 #define	ZYD_MAXIM2_CHANTABLE_F						\
903 {									\
904 	0x33334, 0x08884, 0x1ddd4, 0x33334, 0x08884, 0x1ddd4, 0x33334,	\
905 	0x08884, 0x1ddd4, 0x33334, 0x08884, 0x1ddd4, 0x33334, 0x26664	\
906 }
907 
908 #define	ZYD_MAXIM2_CHANTABLE	\
909 {				\
910 	{ 0x33334, 0x10a03 },	\
911 	{ 0x08884, 0x20a13 },	\
912 	{ 0x1ddd4, 0x30a13 },	\
913 	{ 0x33334, 0x10a13 },	\
914 	{ 0x08884, 0x20a23 },	\
915 	{ 0x1ddd4, 0x30a23 },	\
916 	{ 0x33334, 0x10a23 },	\
917 	{ 0x08884, 0x20a33 },	\
918 	{ 0x1ddd4, 0x30a33 },	\
919 	{ 0x33334, 0x10a33 },	\
920 	{ 0x08884, 0x20a43 },	\
921 	{ 0x1ddd4, 0x30a43 },	\
922 	{ 0x33334, 0x10a43 },	\
923 	{ 0x26664, 0x20a53 }	\
924 }
925 
926 /*
927  * Control pipe requests.
928  */
929 #define	ZYD_DOWNLOADREQ	0x30
930 #define	ZYD_DOWNLOADSTS	0x31
931 
932 /* possible values for register ZYD_CR_INTERRUPT */
933 #define	ZYD_HWINT_MASK	0x004f0000
934 
935 /* possible values for register ZYD_MAC_MISC */
936 #define	ZYD_UNLOCK_PHY_REGS	0x80
937 
938 /* possible values for register ZYD_MAC_ENCRYPTION_TYPE */
939 #define	ZYD_ENC_SNIFFER	8
940 
941 /* flags for register ZYD_MAC_RXFILTER */
942 #define	ZYD_FILTER_ASS_REQ	(1 << 0)
943 #define	ZYD_FILTER_ASS_RSP	(1 << 1)
944 #define	ZYD_FILTER_REASS_REQ	(1 << 2)
945 #define	ZYD_FILTER_REASS_RSP	(1 << 3)
946 #define	ZYD_FILTER_PRB_REQ	(1 << 4)
947 #define	ZYD_FILTER_PRB_RSP	(1 << 5)
948 #define	ZYD_FILTER_BCN		(1 << 8)
949 #define	ZYD_FILTER_ATIM		(1 << 9)
950 #define	ZYD_FILTER_DEASS	(1 << 10)
951 #define	ZYD_FILTER_AUTH		(1 << 11)
952 #define	ZYD_FILTER_DEAUTH	(1 << 12)
953 #define	ZYD_FILTER_PS_POLL	(1 << 26)
954 #define	ZYD_FILTER_RTS		(1 << 27)
955 #define	ZYD_FILTER_CTS		(1 << 28)
956 #define	ZYD_FILTER_ACK		(1 << 29)
957 #define	ZYD_FILTER_CFE		(1 << 30)
958 #define	ZYD_FILTER_CFE_A	(1 << 31)
959 
960 /* helpers for register ZYD_MAC_RXFILTER */
961 #define	ZYD_FILTER_MONITOR	0xffffffff
962 #define	ZYD_FILTER_BSS							\
963 	(ZYD_FILTER_ASS_RSP | ZYD_FILTER_REASS_RSP |			\
964     ZYD_FILTER_PRB_RSP | ZYD_FILTER_BCN | ZYD_FILTER_DEASS |	\
965     ZYD_FILTER_AUTH | ZYD_FILTER_DEAUTH)
966 #define	ZYD_FILTER_HOSTAP						\
967 	(ZYD_FILTER_ASS_REQ | ZYD_FILTER_REASS_REQ |			\
968     ZYD_FILTER_PRB_REQ | ZYD_FILTER_DEASS | ZYD_FILTER_AUTH |	\
969     ZYD_FILTER_DEAUTH | ZYD_FILTER_PS_POLL)
970 
971 /*
972  * RF configuration defs
973  */
974 /* FIXME: this should be 1 for the 3683-A rf chip */
975 #define	ZYD_RFCFG_VALUE 2
976 #define	ZYD_RF_DATA	0x0008	/* value of the bit used for sending data */
977 
978 #define	ZYD_RF_IF_LE	(1 << 1)
979 #define	ZYD_RF_CLK	(1 << 2)
980 
981 
982 /*
983  * Control registers use byte-addressing, other registers
984  * use word adressing. FIXME: Do this properly.
985  */
986 #define	ZYD_REG32_LO(x) (x)
987 #define	ZYD_REG32_HI(x) ((x) + ((((x) & 0xf000) == 0x9000) ? 2 : 1))
988 
989 #define	ZYD_MIN_FRAGSZ							\
990 	(sizeof (struct zyd_plcphdr) + IEEE80211_MIN_LEN + 		\
991     sizeof (struct zyd_rx_stat))
992 
993 #define	ZYD_RX_CIPHER_WEP64	1
994 #define	ZYD_RX_CIPHER_TKIP	2
995 #define	ZYD_RX_CIPHER_AES	4
996 #define	ZYD_RX_CIPHER_WEP128	5
997 #define	ZYD_RX_CIPHER_WEP256	6
998 #define	ZYD_RX_CIPHER_WEP	\
999 	(ZYD_RX_CIPHER_WEP64 | ZYD_RX_CIPHER_WEP128 | ZYD_RX_CIPHER_WEP256)
1000 
1001 #define	ZYD_RX_OFDM		(1 << 0)
1002 #define	ZYD_RX_TIMEOUT		(1 << 1)
1003 #define	ZYD_RX_OVERRUN		(1 << 2)
1004 #define	ZYD_RX_DECRYPTERR	(1 << 3)
1005 #define	ZYD_RX_BADCRC32		(1 << 4)
1006 #define	ZYD_RX_NOT2ME		(1 << 5)
1007 #define	ZYD_RX_BADCRC16		(1 << 6)
1008 #define	ZYD_RX_ERROR		(1 << 7)
1009 
1010 /*
1011  * USB cmd_out pipe command codes
1012  */
1013 #define	ZYD_CMD_IORD	0x0022	/* i/o register read */
1014 #define	ZYD_CMD_IOWR	0x0021	/* i/o register write */
1015 #define	ZYD_CMD_RFCFG	0x0023	/* RF configuration register write */
1016 
1017 /*
1018  * USB cmd_in pipe response codes
1019  */
1020 #define	ZYD_RESPONSE_IOREAD	0x9001	/* i/o read response */
1021 
1022 /*
1023  * Number of bits used for different radio setups
1024  */
1025 #define	ZYD_AL2230_RF_BITS	24
1026 #define	ZYD_RFMD_RF_BITS	24
1027 
1028 #ifdef __cplusplus
1029 }
1030 #endif
1031 
1032 #endif /* _ZYD_REG_H */
1033