1 /* 2 * Copyright 2009 Sun Microsystems, Inc. All rights reserved. 3 * Use is subject to license terms. 4 */ 5 6 /* 7 * Copyright (c) 2008 Weongyo Jeong 8 * All rights reserved. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer, 15 * without modification. 16 * 2. Redistributions in binary form must reproduce at minimum a disclaimer 17 * similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any 18 * redistribution must be conditioned upon including a substantially 19 * similar Disclaimer requirement for further binary redistribution. 20 * 21 * NO WARRANTY 22 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 23 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 24 * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY 25 * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL 26 * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, 27 * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 28 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 29 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 30 * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 31 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 32 * THE POSSIBILITY OF SUCH DAMAGES. 33 */ 34 #include <sys/sysmacros.h> 35 #include <sys/strsubr.h> 36 #include <sys/strsun.h> 37 #include <sys/mac_provider.h> 38 #include <sys/mac_wifi.h> 39 #include <sys/net80211.h> 40 #define USBDRV_MAJOR_VER 2 41 #define USBDRV_MINOR_VER 0 42 #include <sys/usb/usba.h> 43 #include <sys/usb/usba/usba_types.h> 44 45 #include "urtw_reg.h" 46 #include "urtw_var.h" 47 48 static void *urtw_soft_state_p = NULL; 49 50 #define URTW_TXBUF_SIZE (IEEE80211_MAX_LEN) 51 #define URTW_RXBUF_SIZE (URTW_TXBUF_SIZE) 52 /* 53 * device operations 54 */ 55 static int urtw_attach(dev_info_t *, ddi_attach_cmd_t); 56 static int urtw_detach(dev_info_t *, ddi_detach_cmd_t); 57 58 /* 59 * Module Loading Data & Entry Points 60 */ 61 DDI_DEFINE_STREAM_OPS(urtw_dev_ops, nulldev, nulldev, urtw_attach, 62 urtw_detach, nodev, NULL, D_MP, NULL, ddi_quiesce_not_needed); 63 64 static struct modldrv urtw_modldrv = { 65 &mod_driverops, /* Type of module. This one is a driver */ 66 "RTL8187L driver v1.1", /* short description */ 67 &urtw_dev_ops /* driver specific ops */ 68 }; 69 70 static struct modlinkage modlinkage = { 71 MODREV_1, 72 (void *)&urtw_modldrv, 73 NULL 74 }; 75 76 static int urtw_m_stat(void *, uint_t, uint64_t *); 77 static int urtw_m_start(void *); 78 static void urtw_m_stop(void *); 79 static int urtw_m_promisc(void *, boolean_t); 80 static int urtw_m_multicst(void *, boolean_t, const uint8_t *); 81 static int urtw_m_unicst(void *, const uint8_t *); 82 static mblk_t *urtw_m_tx(void *, mblk_t *); 83 static void urtw_m_ioctl(void *, queue_t *, mblk_t *); 84 static int urtw_m_setprop(void *, const char *, mac_prop_id_t, 85 uint_t, const void *); 86 87 static mac_callbacks_t urtw_m_callbacks = { 88 MC_IOCTL | MC_SETPROP | MC_GETPROP, 89 urtw_m_stat, 90 urtw_m_start, 91 urtw_m_stop, 92 urtw_m_promisc, 93 urtw_m_multicst, 94 urtw_m_unicst, 95 urtw_m_tx, 96 urtw_m_ioctl, 97 NULL, 98 NULL, 99 NULL, 100 urtw_m_setprop, 101 ieee80211_getprop 102 }; 103 104 static int urtw_tx_start(struct urtw_softc *, mblk_t *, int); 105 static int urtw_rx_start(struct urtw_softc *); 106 107 108 /* 109 * Supported rates for 802.11a/b/g modes (in 500Kbps unit). 110 */ 111 static const struct ieee80211_rateset urtw_rateset_11b = 112 { 4, { 2, 4, 11, 22 } }; 113 114 static const struct ieee80211_rateset urtw_rateset_11g = 115 { 12, { 2, 4, 11, 22, 12, 18, 24, 36, 48, 72, 96, 108 } }; 116 117 118 struct urtw_pair { 119 uint32_t reg; 120 uint32_t val; 121 }; 122 123 static uint8_t urtw_8225_agc[] = { 124 0x9e, 0x9e, 0x9e, 0x9e, 0x9e, 0x9e, 0x9e, 0x9e, 0x9d, 0x9c, 0x9b, 125 0x9a, 0x99, 0x98, 0x97, 0x96, 0x95, 0x94, 0x93, 0x92, 0x91, 0x90, 126 0x8f, 0x8e, 0x8d, 0x8c, 0x8b, 0x8a, 0x89, 0x88, 0x87, 0x86, 0x85, 127 0x84, 0x83, 0x82, 0x81, 0x80, 0x3f, 0x3e, 0x3d, 0x3c, 0x3b, 0x3a, 128 0x39, 0x38, 0x37, 0x36, 0x35, 0x34, 0x33, 0x32, 0x31, 0x30, 0x2f, 129 0x2e, 0x2d, 0x2c, 0x2b, 0x2a, 0x29, 0x28, 0x27, 0x26, 0x25, 0x24, 130 0x23, 0x22, 0x21, 0x20, 0x1f, 0x1e, 0x1d, 0x1c, 0x1b, 0x1a, 0x19, 131 0x18, 0x17, 0x16, 0x15, 0x14, 0x13, 0x12, 0x11, 0x10, 0x0f, 0x0e, 132 0x0d, 0x0c, 0x0b, 0x0a, 0x09, 0x08, 0x07, 0x06, 0x05, 0x04, 0x03, 133 0x02, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 134 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 135 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01 136 }; 137 138 static uint32_t urtw_8225_channel[] = { 139 0x0000, /* dummy channel 0 */ 140 0x085c, /* 1 */ 141 0x08dc, /* 2 */ 142 0x095c, /* 3 */ 143 0x09dc, /* 4 */ 144 0x0a5c, /* 5 */ 145 0x0adc, /* 6 */ 146 0x0b5c, /* 7 */ 147 0x0bdc, /* 8 */ 148 0x0c5c, /* 9 */ 149 0x0cdc, /* 10 */ 150 0x0d5c, /* 11 */ 151 0x0ddc, /* 12 */ 152 0x0e5c, /* 13 */ 153 0x0f72, /* 14 */ 154 }; 155 156 static uint8_t urtw_8225_gain[] = { 157 0x23, 0x88, 0x7c, 0xa5, /* -82dbm */ 158 0x23, 0x88, 0x7c, 0xb5, /* -82dbm */ 159 0x23, 0x88, 0x7c, 0xc5, /* -82dbm */ 160 0x33, 0x80, 0x79, 0xc5, /* -78dbm */ 161 0x43, 0x78, 0x76, 0xc5, /* -74dbm */ 162 0x53, 0x60, 0x73, 0xc5, /* -70dbm */ 163 0x63, 0x58, 0x70, 0xc5, /* -66dbm */ 164 }; 165 166 static struct urtw_pair urtw_8225_rf_part1[] = { 167 { 0x00, 0x0067 }, { 0x01, 0x0fe0 }, { 0x02, 0x044d }, { 0x03, 0x0441 }, 168 { 0x04, 0x0486 }, { 0x05, 0x0bc0 }, { 0x06, 0x0ae6 }, { 0x07, 0x082a }, 169 { 0x08, 0x001f }, { 0x09, 0x0334 }, { 0x0a, 0x0fd4 }, { 0x0b, 0x0391 }, 170 { 0x0c, 0x0050 }, { 0x0d, 0x06db }, { 0x0e, 0x0029 }, { 0x0f, 0x0914 }, 171 }; 172 173 static struct urtw_pair urtw_8225_rf_part2[] = { 174 { 0x00, 0x01 }, { 0x01, 0x02 }, { 0x02, 0x42 }, { 0x03, 0x00 }, 175 { 0x04, 0x00 }, { 0x05, 0x00 }, { 0x06, 0x40 }, { 0x07, 0x00 }, 176 { 0x08, 0x40 }, { 0x09, 0xfe }, { 0x0a, 0x09 }, { 0x0b, 0x80 }, 177 { 0x0c, 0x01 }, { 0x0e, 0xd3 }, { 0x0f, 0x38 }, { 0x10, 0x84 }, 178 { 0x11, 0x06 }, { 0x12, 0x20 }, { 0x13, 0x20 }, { 0x14, 0x00 }, 179 { 0x15, 0x40 }, { 0x16, 0x00 }, { 0x17, 0x40 }, { 0x18, 0xef }, 180 { 0x19, 0x19 }, { 0x1a, 0x20 }, { 0x1b, 0x76 }, { 0x1c, 0x04 }, 181 { 0x1e, 0x95 }, { 0x1f, 0x75 }, { 0x20, 0x1f }, { 0x21, 0x27 }, 182 { 0x22, 0x16 }, { 0x24, 0x46 }, { 0x25, 0x20 }, { 0x26, 0x90 }, 183 { 0x27, 0x88 } 184 }; 185 186 static struct urtw_pair urtw_8225_rf_part3[] = { 187 { 0x00, 0x98 }, { 0x03, 0x20 }, { 0x04, 0x7e }, { 0x05, 0x12 }, 188 { 0x06, 0xfc }, { 0x07, 0x78 }, { 0x08, 0x2e }, { 0x10, 0x9b }, 189 { 0x11, 0x88 }, { 0x12, 0x47 }, { 0x13, 0xd0 }, { 0x19, 0x00 }, 190 { 0x1a, 0xa0 }, { 0x1b, 0x08 }, { 0x40, 0x86 }, { 0x41, 0x8d }, 191 { 0x42, 0x15 }, { 0x43, 0x18 }, { 0x44, 0x1f }, { 0x45, 0x1e }, 192 { 0x46, 0x1a }, { 0x47, 0x15 }, { 0x48, 0x10 }, { 0x49, 0x0a }, 193 { 0x4a, 0x05 }, { 0x4b, 0x02 }, { 0x4c, 0x05 } 194 }; 195 196 static uint16_t urtw_8225_rxgain[] = { 197 0x0400, 0x0401, 0x0402, 0x0403, 0x0404, 0x0405, 0x0408, 0x0409, 198 0x040a, 0x040b, 0x0502, 0x0503, 0x0504, 0x0505, 0x0540, 0x0541, 199 0x0542, 0x0543, 0x0544, 0x0545, 0x0580, 0x0581, 0x0582, 0x0583, 200 0x0584, 0x0585, 0x0588, 0x0589, 0x058a, 0x058b, 0x0643, 0x0644, 201 0x0645, 0x0680, 0x0681, 0x0682, 0x0683, 0x0684, 0x0685, 0x0688, 202 0x0689, 0x068a, 0x068b, 0x068c, 0x0742, 0x0743, 0x0744, 0x0745, 203 0x0780, 0x0781, 0x0782, 0x0783, 0x0784, 0x0785, 0x0788, 0x0789, 204 0x078a, 0x078b, 0x078c, 0x078d, 0x0790, 0x0791, 0x0792, 0x0793, 205 0x0794, 0x0795, 0x0798, 0x0799, 0x079a, 0x079b, 0x079c, 0x079d, 206 0x07a0, 0x07a1, 0x07a2, 0x07a3, 0x07a4, 0x07a5, 0x07a8, 0x07a9, 207 0x07aa, 0x07ab, 0x07ac, 0x07ad, 0x07b0, 0x07b1, 0x07b2, 0x07b3, 208 0x07b4, 0x07b5, 0x07b8, 0x07b9, 0x07ba, 0x07bb, 0x07bb 209 }; 210 211 static uint8_t urtw_8225_threshold[] = { 212 0x8d, 0x8d, 0x8d, 0x8d, 0x9d, 0xad, 0xbd, 213 }; 214 215 static uint8_t urtw_8225_tx_gain_cck_ofdm[] = { 216 0x02, 0x06, 0x0e, 0x1e, 0x3e, 0x7e 217 }; 218 219 static uint8_t urtw_8225_txpwr_cck[] = { 220 0x18, 0x17, 0x15, 0x11, 0x0c, 0x08, 0x04, 0x02, 221 0x1b, 0x1a, 0x17, 0x13, 0x0e, 0x09, 0x04, 0x02, 222 0x1f, 0x1e, 0x1a, 0x15, 0x10, 0x0a, 0x05, 0x02, 223 0x22, 0x21, 0x1d, 0x18, 0x11, 0x0b, 0x06, 0x02, 224 0x26, 0x25, 0x21, 0x1b, 0x14, 0x0d, 0x06, 0x03, 225 0x2b, 0x2a, 0x25, 0x1e, 0x16, 0x0e, 0x07, 0x03 226 }; 227 228 static uint8_t urtw_8225_txpwr_cck_ch14[] = { 229 0x18, 0x17, 0x15, 0x0c, 0x00, 0x00, 0x00, 0x00, 230 0x1b, 0x1a, 0x17, 0x0e, 0x00, 0x00, 0x00, 0x00, 231 0x1f, 0x1e, 0x1a, 0x0f, 0x00, 0x00, 0x00, 0x00, 232 0x22, 0x21, 0x1d, 0x11, 0x00, 0x00, 0x00, 0x00, 233 0x26, 0x25, 0x21, 0x13, 0x00, 0x00, 0x00, 0x00, 234 0x2b, 0x2a, 0x25, 0x15, 0x00, 0x00, 0x00, 0x00 235 }; 236 237 static uint8_t urtw_8225_txpwr_ofdm[] = { 238 0x80, 0x90, 0xa2, 0xb5, 0xcb, 0xe4 239 }; 240 241 static uint8_t urtw_8225v2_gain_bg[] = { 242 0x23, 0x15, 0xa5, /* -82-1dbm */ 243 0x23, 0x15, 0xb5, /* -82-2dbm */ 244 0x23, 0x15, 0xc5, /* -82-3dbm */ 245 0x33, 0x15, 0xc5, /* -78dbm */ 246 0x43, 0x15, 0xc5, /* -74dbm */ 247 0x53, 0x15, 0xc5, /* -70dbm */ 248 0x63, 0x15, 0xc5, /* -66dbm */ 249 }; 250 251 static struct urtw_pair urtw_8225v2_rf_part1[] = { 252 { 0x00, 0x02bf }, { 0x01, 0x0ee0 }, { 0x02, 0x044d }, { 0x03, 0x0441 }, 253 { 0x04, 0x08c3 }, { 0x05, 0x0c72 }, { 0x06, 0x00e6 }, { 0x07, 0x082a }, 254 { 0x08, 0x003f }, { 0x09, 0x0335 }, { 0x0a, 0x09d4 }, { 0x0b, 0x07bb }, 255 { 0x0c, 0x0850 }, { 0x0d, 0x0cdf }, { 0x0e, 0x002b }, { 0x0f, 0x0114 } 256 }; 257 258 static struct urtw_pair urtw_8225v2_rf_part2[] = { 259 { 0x00, 0x01 }, { 0x01, 0x02 }, { 0x02, 0x42 }, { 0x03, 0x00 }, 260 { 0x04, 0x00 }, { 0x05, 0x00 }, { 0x06, 0x40 }, { 0x07, 0x00 }, 261 { 0x08, 0x40 }, { 0x09, 0xfe }, { 0x0a, 0x08 }, { 0x0b, 0x80 }, 262 { 0x0c, 0x01 }, { 0x0d, 0x43 }, { 0x0e, 0xd3 }, { 0x0f, 0x38 }, 263 { 0x10, 0x84 }, { 0x11, 0x07 }, { 0x12, 0x20 }, { 0x13, 0x20 }, 264 { 0x14, 0x00 }, { 0x15, 0x40 }, { 0x16, 0x00 }, { 0x17, 0x40 }, 265 { 0x18, 0xef }, { 0x19, 0x19 }, { 0x1a, 0x20 }, { 0x1b, 0x15 }, 266 { 0x1c, 0x04 }, { 0x1d, 0xc5 }, { 0x1e, 0x95 }, { 0x1f, 0x75 }, 267 { 0x20, 0x1f }, { 0x21, 0x17 }, { 0x22, 0x16 }, { 0x23, 0x80 }, 268 { 0x24, 0x46 }, { 0x25, 0x00 }, { 0x26, 0x90 }, { 0x27, 0x88 } 269 }; 270 271 static struct urtw_pair urtw_8225v2_rf_part3[] = { 272 { 0x00, 0x98 }, { 0x03, 0x20 }, { 0x04, 0x7e }, { 0x05, 0x12 }, 273 { 0x06, 0xfc }, { 0x07, 0x78 }, { 0x08, 0x2e }, { 0x09, 0x11 }, 274 { 0x0a, 0x17 }, { 0x0b, 0x11 }, { 0x10, 0x9b }, { 0x11, 0x88 }, 275 { 0x12, 0x47 }, { 0x13, 0xd0 }, { 0x19, 0x00 }, { 0x1a, 0xa0 }, 276 { 0x1b, 0x08 }, { 0x1d, 0x00 }, { 0x40, 0x86 }, { 0x41, 0x9d }, 277 { 0x42, 0x15 }, { 0x43, 0x18 }, { 0x44, 0x36 }, { 0x45, 0x35 }, 278 { 0x46, 0x2e }, { 0x47, 0x25 }, { 0x48, 0x1c }, { 0x49, 0x12 }, 279 { 0x4a, 0x09 }, { 0x4b, 0x04 }, { 0x4c, 0x05 } 280 }; 281 282 static uint16_t urtw_8225v2_rxgain[] = { 283 0x0000, 0x0001, 0x0002, 0x0003, 0x0004, 0x0005, 0x0008, 0x0009, 284 0x000a, 0x000b, 0x0102, 0x0103, 0x0104, 0x0105, 0x0140, 0x0141, 285 0x0142, 0x0143, 0x0144, 0x0145, 0x0180, 0x0181, 0x0182, 0x0183, 286 0x0184, 0x0185, 0x0188, 0x0189, 0x018a, 0x018b, 0x0243, 0x0244, 287 0x0245, 0x0280, 0x0281, 0x0282, 0x0283, 0x0284, 0x0285, 0x0288, 288 0x0289, 0x028a, 0x028b, 0x028c, 0x0342, 0x0343, 0x0344, 0x0345, 289 0x0380, 0x0381, 0x0382, 0x0383, 0x0384, 0x0385, 0x0388, 0x0389, 290 0x038a, 0x038b, 0x038c, 0x038d, 0x0390, 0x0391, 0x0392, 0x0393, 291 0x0394, 0x0395, 0x0398, 0x0399, 0x039a, 0x039b, 0x039c, 0x039d, 292 0x03a0, 0x03a1, 0x03a2, 0x03a3, 0x03a4, 0x03a5, 0x03a8, 0x03a9, 293 0x03aa, 0x03ab, 0x03ac, 0x03ad, 0x03b0, 0x03b1, 0x03b2, 0x03b3, 294 0x03b4, 0x03b5, 0x03b8, 0x03b9, 0x03ba, 0x03bb, 0x03bb 295 }; 296 297 static uint8_t urtw_8225v2_tx_gain_cck_ofdm[] = { 298 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 299 0x06, 0x07, 0x08, 0x09, 0x0a, 0x0b, 300 0x0c, 0x0d, 0x0e, 0x0f, 0x10, 0x11, 301 0x12, 0x13, 0x14, 0x15, 0x16, 0x17, 302 0x18, 0x19, 0x1a, 0x1b, 0x1c, 0x1d, 303 0x1e, 0x1f, 0x20, 0x21, 0x22, 0x23, 304 }; 305 306 static uint8_t urtw_8225v2_txpwr_cck[] = { 307 0x36, 0x35, 0x2e, 0x25, 0x1c, 0x12, 0x09, 0x04 308 }; 309 310 static uint8_t urtw_8225v2_txpwr_cck_ch14[] = { 311 0x36, 0x35, 0x2e, 0x1b, 0x00, 0x00, 0x00, 0x00 312 }; 313 314 static struct urtw_pair urtw_ratetable[] = { 315 { 2, 0 }, { 4, 1 }, { 11, 2 }, { 12, 4 }, { 18, 5 }, 316 { 22, 3 }, { 24, 6 }, { 36, 7 }, { 48, 8 }, { 72, 9 }, 317 { 96, 10 }, { 108, 11 } 318 }; 319 320 static int urtw_init(void *); 321 static void urtw_stop(struct urtw_softc *); 322 static int urtw_set_channel(struct urtw_softc *); 323 static void 324 urtw_rxeof(usb_pipe_handle_t, usb_bulk_req_t *); 325 static int 326 urtw_newstate(struct ieee80211com *, enum ieee80211_state, int); 327 static usbd_status urtw_read8_c(struct urtw_softc *, int, uint8_t *); 328 static usbd_status urtw_read16_c(struct urtw_softc *, int, uint16_t *); 329 static usbd_status urtw_read32_c(struct urtw_softc *, int, uint32_t *); 330 static usbd_status urtw_write8_c(struct urtw_softc *, int, uint8_t); 331 static usbd_status urtw_write16_c(struct urtw_softc *, int, uint16_t); 332 static usbd_status urtw_write32_c(struct urtw_softc *, int, uint32_t); 333 static usbd_status urtw_eprom_cs(struct urtw_softc *, int); 334 static usbd_status urtw_eprom_ck(struct urtw_softc *); 335 static usbd_status urtw_eprom_sendbits(struct urtw_softc *, int16_t *, 336 int); 337 static usbd_status urtw_eprom_read32(struct urtw_softc *, uint32_t, 338 uint32_t *); 339 static usbd_status urtw_eprom_readbit(struct urtw_softc *, int16_t *); 340 static usbd_status urtw_eprom_writebit(struct urtw_softc *, int16_t); 341 static usbd_status urtw_get_macaddr(struct urtw_softc *); 342 static usbd_status urtw_get_txpwr(struct urtw_softc *); 343 static usbd_status urtw_get_rfchip(struct urtw_softc *); 344 static usbd_status urtw_led_init(struct urtw_softc *); 345 static usbd_status 346 urtw_8225_read(struct urtw_softc *, uint8_t, uint32_t *); 347 static usbd_status urtw_8225_rf_init(struct urtw_softc *); 348 static usbd_status urtw_8225_rf_set_chan(struct urtw_softc *, int); 349 static usbd_status urtw_8225_rf_set_sens(struct urtw_softc *, int); 350 static usbd_status urtw_8225v2_rf_init(struct urtw_softc *); 351 static usbd_status urtw_8225v2_rf_set_chan(struct urtw_softc *, int); 352 static usbd_status urtw_open_pipes(struct urtw_softc *); 353 static void urtw_close_pipes(struct urtw_softc *); 354 static void urtw_led_launch(void *); 355 356 #ifdef DEBUG 357 358 #define URTW_DEBUG_XMIT 0x00000001 359 #define URTW_DEBUG_RECV 0x00000002 360 #define URTW_DEBUG_LED 0x00000004 361 #define URTW_DEBUG_GLD 0x00000008 362 #define URTW_DEBUG_RF 0x00000010 363 #define URTW_DEBUG_ATTACH 0x00000020 364 #define URTW_DEBUG_ACTIVE 0x00000040 365 #define URTW_DEBUG_HWTYPE 0x00000080 366 #define URTW_DEBUG_STATE 0x00000100 367 #define URTW_DEBUG_HOTPLUG 0x00000200 368 #define URTW_DEBUG_STAT 0x00000400 369 #define URTW_DEBUG_TX_PROC 0x00000800 370 #define URTW_DEBUG_RX_PROC 0x00001000 371 #define URTW_DEBUG_EEPROM 0x00002000 372 #define URTW_DEBUG_RESET 0x00004000 373 #define URTW_DEBUG_DEVREQ 0x00010000 374 #define URTW_DEBUG_ANY 0xffffffff 375 376 uint32_t urtw8187_dbg_flags = 0; 377 static void 378 urtw8187_dbg(dev_info_t *dip, int level, const char *fmt, ...) 379 { 380 char msg_buffer[255]; 381 va_list ap; 382 383 if (dip == NULL) { 384 return; 385 } 386 387 va_start(ap, fmt); 388 (void) vsprintf(msg_buffer, fmt, ap); 389 cmn_err(level, "%s%d: %s", ddi_get_name(dip), 390 ddi_get_instance(dip), msg_buffer); 391 va_end(ap); 392 } 393 394 #define URTW8187_DBG(l, x) do {\ 395 _NOTE(CONSTANTCONDITION) \ 396 if ((l) & urtw8187_dbg_flags) \ 397 urtw8187_dbg x;\ 398 _NOTE(CONSTANTCONDITION) \ 399 } while (0) 400 #else 401 #define URTW8187_DBG(l, x) 402 #endif 403 404 static usbd_status 405 urtw_led_init(struct urtw_softc *sc) 406 { 407 uint32_t rev; 408 usbd_status error; 409 410 if (error = urtw_read8_c(sc, URTW_PSR, &sc->sc_psr)) 411 goto fail; 412 error = urtw_eprom_read32(sc, URTW_EPROM_SWREV, &rev); 413 if (error != 0) 414 goto fail; 415 416 switch (rev & URTW_EPROM_CID_MASK) { 417 case URTW_EPROM_CID_ALPHA0: 418 sc->sc_strategy = URTW_SW_LED_MODE1; 419 break; 420 case URTW_EPROM_CID_SERCOMM_PS: 421 sc->sc_strategy = URTW_SW_LED_MODE3; 422 break; 423 case URTW_EPROM_CID_HW_LED: 424 sc->sc_strategy = URTW_HW_LED; 425 break; 426 case URTW_EPROM_CID_RSVD0: 427 case URTW_EPROM_CID_RSVD1: 428 default: 429 sc->sc_strategy = URTW_SW_LED_MODE0; 430 break; 431 } 432 433 sc->sc_gpio_ledpin = URTW_LED_PIN_GPIO0; 434 435 fail: 436 return (error); 437 } 438 439 static usbd_status 440 urtw_8225_write_s16(struct urtw_softc *sc, uint8_t addr, int index, 441 uint16_t *data) 442 { 443 usb_ctrl_setup_t req; 444 usb_cr_t cr; 445 usb_cb_flags_t cf; 446 mblk_t *mp = 0; 447 uint16_t data16; 448 usbd_status error; 449 450 data16 = *data; 451 bzero(&req, sizeof (req)); 452 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 453 req.bRequest = URTW_8187_SETREGS_REQ; 454 req.wValue = addr; 455 req.wIndex = (uint16_t)index; 456 req.wLength = sizeof (uint16_t); 457 req.attrs = USB_ATTRS_NONE; 458 459 mp = allocb(sizeof (uint16_t), BPRI_MED); 460 if (mp == 0) { 461 cmn_err(CE_WARN, "urtw_8225_write_s16: allocb failed\n"); 462 return (-1); 463 } 464 *(mp->b_rptr) = (data16 & 0x00ff); 465 *(mp->b_rptr + 1) = (data16 & 0xff00) >> 8; 466 mp->b_wptr += sizeof (uint16_t); 467 error = usb_pipe_ctrl_xfer_wait(sc->sc_udev->dev_default_ph, &req, &mp, 468 &cr, &cf, 0); 469 if (error != USB_SUCCESS) { 470 URTW8187_DBG(URTW_DEBUG_DEVREQ, (sc->sc_dev, CE_CONT, 471 "urtw_8225_write_s16: could not set regs:" 472 "cr:%s(%d), cf:(%x)\n", usb_str_cr(cr), cr, cf)); 473 } 474 if (mp) 475 freemsg(mp); 476 return (error); 477 478 } 479 480 static usbd_status 481 urtw_8225_read(struct urtw_softc *sc, uint8_t addr, uint32_t *data) 482 { 483 int i; 484 int16_t bit; 485 uint8_t rlen = 12, wlen = 6; 486 uint16_t o1, o2, o3, tmp; 487 uint32_t d2w = ((uint32_t)(addr & 0x1f)) << 27; 488 uint32_t mask = 0x80000000, value = 0; 489 usbd_status error; 490 491 if (error = urtw_read16_c(sc, URTW_RF_PINS_OUTPUT, &o1)) 492 goto fail; 493 if (error = urtw_read16_c(sc, URTW_RF_PINS_ENABLE, &o2)) 494 goto fail; 495 if (error = urtw_read16_c(sc, URTW_RF_PINS_SELECT, &o3)) 496 goto fail; 497 if (error = urtw_write16_c(sc, URTW_RF_PINS_ENABLE, o2 | 0xf)) 498 goto fail; 499 if (error = urtw_write16_c(sc, URTW_RF_PINS_SELECT, o3 | 0xf)) 500 goto fail; 501 o1 &= ~0xf; 502 if (error = urtw_write16_c(sc, URTW_RF_PINS_OUTPUT, 503 o1 | URTW_BB_HOST_BANG_EN)) 504 goto fail; 505 DELAY(5); 506 if (error = urtw_write16_c(sc, URTW_RF_PINS_OUTPUT, o1)) 507 goto fail; 508 DELAY(5); 509 510 for (i = 0; i < (wlen / 2); i++, mask = mask >> 1) { 511 bit = ((d2w & mask) != 0) ? 1 : 0; 512 513 if (error = urtw_write16_c(sc, URTW_RF_PINS_OUTPUT, bit | o1)) 514 goto fail; 515 DELAY(2); 516 if (error = urtw_write16_c(sc, URTW_RF_PINS_OUTPUT, bit | o1 | 517 URTW_BB_HOST_BANG_CLK)) 518 goto fail; 519 DELAY(2); 520 if (error = urtw_write16_c(sc, URTW_RF_PINS_OUTPUT, bit | o1 | 521 URTW_BB_HOST_BANG_CLK)) 522 goto fail; 523 DELAY(2); 524 mask = mask >> 1; 525 if (i == 2) 526 break; 527 bit = ((d2w & mask) != 0) ? 1 : 0; 528 if (error = urtw_write16_c(sc, URTW_RF_PINS_OUTPUT, bit | o1 | 529 URTW_BB_HOST_BANG_CLK)) 530 goto fail; 531 DELAY(2); 532 if (error = urtw_write16_c(sc, URTW_RF_PINS_OUTPUT, bit | o1 | 533 URTW_BB_HOST_BANG_CLK)) 534 goto fail; 535 DELAY(2); 536 if (error = urtw_write16_c(sc, URTW_RF_PINS_OUTPUT, bit | o1)) 537 goto fail; 538 DELAY(1); 539 } 540 if (error = urtw_write16_c(sc, URTW_RF_PINS_OUTPUT, 541 bit | o1 | URTW_BB_HOST_BANG_RW | URTW_BB_HOST_BANG_CLK)) 542 goto fail; 543 DELAY(2); 544 if (error = urtw_write16_c(sc, URTW_RF_PINS_OUTPUT, 545 bit | o1 | URTW_BB_HOST_BANG_RW)) 546 goto fail; 547 DELAY(2); 548 if (error = urtw_write16_c(sc, URTW_RF_PINS_OUTPUT, 549 o1 | URTW_BB_HOST_BANG_RW)) 550 goto fail; 551 DELAY(2); 552 553 mask = 0x800; 554 for (i = 0; i < rlen; i++, mask = mask >> 1) { 555 if (error = urtw_write16_c(sc, URTW_RF_PINS_OUTPUT, 556 o1 | URTW_BB_HOST_BANG_RW)) 557 goto fail; 558 DELAY(2); 559 if (error = urtw_write16_c(sc, URTW_RF_PINS_OUTPUT, 560 o1 | URTW_BB_HOST_BANG_RW | URTW_BB_HOST_BANG_CLK)) 561 goto fail; 562 DELAY(2); 563 if (error = urtw_write16_c(sc, URTW_RF_PINS_OUTPUT, 564 o1 | URTW_BB_HOST_BANG_RW | URTW_BB_HOST_BANG_CLK)) 565 goto fail; 566 DELAY(2); 567 if (error = urtw_write16_c(sc, URTW_RF_PINS_OUTPUT, 568 o1 | URTW_BB_HOST_BANG_RW | URTW_BB_HOST_BANG_CLK)) 569 goto fail; 570 DELAY(2); 571 572 if (error = urtw_read16_c(sc, URTW_RF_PINS_INPUT, &tmp)) 573 goto fail; 574 value |= ((tmp & URTW_BB_HOST_BANG_CLK) ? mask : 0); 575 if (error = urtw_write16_c(sc, URTW_RF_PINS_OUTPUT, 576 o1 | URTW_BB_HOST_BANG_RW)) 577 goto fail; 578 DELAY(2); 579 } 580 581 if (error = urtw_write16_c(sc, URTW_RF_PINS_OUTPUT, 582 o1 | URTW_BB_HOST_BANG_EN | 583 URTW_BB_HOST_BANG_RW)) 584 goto fail; 585 DELAY(2); 586 587 if (error = urtw_write16_c(sc, URTW_RF_PINS_ENABLE, o2)) 588 goto fail; 589 if (error = urtw_write16_c(sc, URTW_RF_PINS_SELECT, o3)) 590 goto fail; 591 error = urtw_write16_c(sc, URTW_RF_PINS_OUTPUT, 0x3a0); 592 593 if (data != NULL) 594 *data = value; 595 fail: 596 return (error); 597 } 598 599 static void 600 urtw_delay_ms(int t) 601 { 602 DELAY(t * 1000); 603 } 604 605 static usbd_status 606 urtw_8225_write_c(struct urtw_softc *sc, uint8_t addr, uint16_t data) 607 { 608 uint16_t d80, d82, d84; 609 usbd_status error; 610 611 if (error = urtw_read16_c(sc, URTW_RF_PINS_OUTPUT, &d80)) 612 goto fail; 613 d80 &= 0xfff3; 614 if (error = urtw_read16_c(sc, URTW_RF_PINS_ENABLE, &d82)) 615 goto fail; 616 if (error = urtw_read16_c(sc, URTW_RF_PINS_SELECT, &d84)) 617 goto fail; 618 d84 &= 0xfff0; 619 if (error = urtw_write16_c(sc, URTW_RF_PINS_ENABLE, 620 d82 | 0x0007)) 621 goto fail; 622 if (error = urtw_write16_c(sc, URTW_RF_PINS_SELECT, 623 d84 | 0x0007)) 624 goto fail; 625 DELAY(10); 626 627 if (error = urtw_write16_c(sc, URTW_RF_PINS_OUTPUT, 628 d80 | URTW_BB_HOST_BANG_EN)) 629 goto fail; 630 DELAY(2); 631 if (error = urtw_write16_c(sc, URTW_RF_PINS_OUTPUT, d80)) 632 goto fail; 633 DELAY(10); 634 635 error = urtw_8225_write_s16(sc, addr, 0x8225, &data); 636 if (error != 0) 637 goto fail; 638 639 if (error = urtw_write16_c(sc, URTW_RF_PINS_OUTPUT, 640 d80 | URTW_BB_HOST_BANG_EN)) 641 goto fail; 642 DELAY(10); 643 if (error = urtw_write16_c(sc, URTW_RF_PINS_OUTPUT, 644 d80 | URTW_BB_HOST_BANG_EN)) 645 goto fail; 646 error = urtw_write16_c(sc, URTW_RF_PINS_SELECT, d84); 647 urtw_delay_ms(2); 648 fail: 649 return (error); 650 } 651 652 static usbd_status 653 urtw_8225_isv2(struct urtw_softc *sc, int *ret) 654 { 655 uint32_t data; 656 usbd_status error; 657 658 *ret = 1; 659 660 if (error = urtw_write16_c(sc, URTW_RF_PINS_OUTPUT, 0x0080)) 661 goto fail; 662 if (error = urtw_write16_c(sc, URTW_RF_PINS_SELECT, 0x0080)) 663 goto fail; 664 if (error = urtw_write16_c(sc, URTW_RF_PINS_ENABLE, 0x0080)) 665 goto fail; 666 urtw_delay_ms(300); 667 668 if (error = urtw_8225_write_c(sc, 0x0, 0x1b7)) 669 goto fail; 670 671 error = urtw_8225_read(sc, 0x8, &data); 672 if (error != 0) 673 goto fail; 674 if (data != 0x588) 675 *ret = 0; 676 else { 677 error = urtw_8225_read(sc, 0x9, &data); 678 if (error != 0) 679 goto fail; 680 if (data != 0x700) 681 *ret = 0; 682 } 683 684 error = urtw_8225_write_c(sc, 0x0, 0xb7); 685 fail: 686 return (error); 687 } 688 689 static usbd_status 690 urtw_get_rfchip(struct urtw_softc *sc) 691 { 692 int ret; 693 uint32_t data; 694 usbd_status error; 695 696 error = urtw_eprom_read32(sc, URTW_EPROM_RFCHIPID, &data); 697 if (error != 0) 698 goto fail; 699 switch (data & 0xff) { 700 case URTW_EPROM_RFCHIPID_RTL8225U: 701 error = urtw_8225_isv2(sc, &ret); 702 if (error != 0) 703 goto fail; 704 if (ret == 0) { 705 URTW8187_DBG(URTW_DEBUG_HWTYPE, 706 (sc->sc_dev, CE_CONT, "8225 RF chip detected\n")); 707 sc->sc_rf_init = urtw_8225_rf_init; 708 sc->sc_rf_set_sens = urtw_8225_rf_set_sens; 709 sc->sc_rf_set_chan = urtw_8225_rf_set_chan; 710 } else { 711 URTW8187_DBG(URTW_DEBUG_HWTYPE, 712 (sc->sc_dev, CE_CONT, 713 "8225 v2 RF chip detected\n")); 714 sc->sc_rf_init = urtw_8225v2_rf_init; 715 sc->sc_rf_set_chan = urtw_8225v2_rf_set_chan; 716 } 717 sc->sc_max_sens = URTW_8225_RF_MAX_SENS; 718 sc->sc_sens = URTW_8225_RF_DEF_SENS; 719 break; 720 default: 721 cmn_err(CE_WARN, "unsupported RF chip %d\n", data & 0xff); 722 error = -1; 723 } 724 725 fail: 726 return (error); 727 } 728 729 static usbd_status 730 urtw_get_txpwr(struct urtw_softc *sc) 731 { 732 int i, j; 733 uint32_t data; 734 usbd_status error; 735 736 error = urtw_eprom_read32(sc, URTW_EPROM_TXPW_BASE, &data); 737 if (error != 0) 738 goto fail; 739 sc->sc_txpwr_cck_base = data & 0xf; 740 sc->sc_txpwr_ofdm_base = (data >> 4) & 0xf; 741 742 for (i = 1, j = 0; i < 6; i += 2, j++) { 743 error = urtw_eprom_read32(sc, URTW_EPROM_TXPW0 + j, &data); 744 if (error != 0) 745 goto fail; 746 sc->sc_txpwr_cck[i] = data & 0xf; 747 sc->sc_txpwr_cck[i + 1] = (data & 0xf00) >> 8; 748 sc->sc_txpwr_ofdm[i] = (data & 0xf0) >> 4; 749 sc->sc_txpwr_ofdm[i + 1] = (data & 0xf000) >> 12; 750 } 751 for (i = 1, j = 0; i < 4; i += 2, j++) { 752 error = urtw_eprom_read32(sc, URTW_EPROM_TXPW1 + j, &data); 753 if (error != 0) 754 goto fail; 755 sc->sc_txpwr_cck[i + 6] = data & 0xf; 756 sc->sc_txpwr_cck[i + 6 + 1] = (data & 0xf00) >> 8; 757 sc->sc_txpwr_ofdm[i + 6] = (data & 0xf0) >> 4; 758 sc->sc_txpwr_ofdm[i + 6 + 1] = (data & 0xf000) >> 12; 759 } 760 for (i = 1, j = 0; i < 4; i += 2, j++) { 761 error = urtw_eprom_read32(sc, URTW_EPROM_TXPW2 + j, &data); 762 if (error != 0) 763 goto fail; 764 sc->sc_txpwr_cck[i + 6 + 4] = data & 0xf; 765 sc->sc_txpwr_cck[i + 6 + 4 + 1] = (data & 0xf00) >> 8; 766 sc->sc_txpwr_ofdm[i + 6 + 4] = (data & 0xf0) >> 4; 767 sc->sc_txpwr_ofdm[i + 6 + 4 + 1] = (data & 0xf000) >> 12; 768 } 769 fail: 770 return (error); 771 } 772 773 static usbd_status 774 urtw_get_macaddr(struct urtw_softc *sc) 775 { 776 uint32_t data; 777 usbd_status error; 778 uint8_t *m = 0; 779 780 error = urtw_eprom_read32(sc, URTW_EPROM_MACADDR, &data); 781 if (error != 0) 782 goto fail; 783 sc->sc_bssid[0] = data & 0xff; 784 sc->sc_bssid[1] = (data & 0xff00) >> 8; 785 error = urtw_eprom_read32(sc, URTW_EPROM_MACADDR + 1, &data); 786 if (error != 0) 787 goto fail; 788 sc->sc_bssid[2] = data & 0xff; 789 sc->sc_bssid[3] = (data & 0xff00) >> 8; 790 error = urtw_eprom_read32(sc, URTW_EPROM_MACADDR + 2, &data); 791 if (error != 0) 792 goto fail; 793 sc->sc_bssid[4] = data & 0xff; 794 sc->sc_bssid[5] = (data & 0xff00) >> 8; 795 bcopy(sc->sc_bssid, sc->sc_ic.ic_macaddr, IEEE80211_ADDR_LEN); 796 m = sc->sc_bssid; 797 URTW8187_DBG(URTW_DEBUG_HWTYPE, (sc->sc_dev, CE_CONT, 798 "MAC: %x:%x:%x:%x:%x:%x\n", 799 m[0], m[1], m[2], m[3], m[4], m[5])); 800 fail: 801 return (error); 802 } 803 804 static usbd_status 805 urtw_eprom_read32(struct urtw_softc *sc, uint32_t addr, uint32_t *data) 806 { 807 #define URTW_READCMD_LEN 3 808 int addrlen, i; 809 int16_t addrstr[8], data16, readcmd[] = { 1, 1, 0 }; 810 usbd_status error; 811 812 /* NB: make sure the buffer is initialized */ 813 *data = 0; 814 815 /* enable EPROM programming */ 816 if (error = urtw_write8_c(sc, URTW_EPROM_CMD, 817 URTW_EPROM_CMD_PROGRAM_MODE)) 818 goto fail; 819 DELAY(URTW_EPROM_DELAY); 820 821 error = urtw_eprom_cs(sc, URTW_EPROM_ENABLE); 822 if (error != 0) 823 goto fail; 824 error = urtw_eprom_ck(sc); 825 if (error != 0) 826 goto fail; 827 error = urtw_eprom_sendbits(sc, readcmd, URTW_READCMD_LEN); 828 if (error != 0) 829 goto fail; 830 if (sc->sc_epromtype == URTW_EEPROM_93C56) { 831 addrlen = 8; 832 addrstr[0] = addr & (1 << 7); 833 addrstr[1] = addr & (1 << 6); 834 addrstr[2] = addr & (1 << 5); 835 addrstr[3] = addr & (1 << 4); 836 addrstr[4] = addr & (1 << 3); 837 addrstr[5] = addr & (1 << 2); 838 addrstr[6] = addr & (1 << 1); 839 addrstr[7] = addr & (1 << 0); 840 } else { 841 addrlen = 6; 842 addrstr[0] = addr & (1 << 5); 843 addrstr[1] = addr & (1 << 4); 844 addrstr[2] = addr & (1 << 3); 845 addrstr[3] = addr & (1 << 2); 846 addrstr[4] = addr & (1 << 1); 847 addrstr[5] = addr & (1 << 0); 848 } 849 error = urtw_eprom_sendbits(sc, addrstr, addrlen); 850 if (error != 0) 851 goto fail; 852 853 error = urtw_eprom_writebit(sc, 0); 854 if (error != 0) 855 goto fail; 856 857 for (i = 0; i < 16; i++) { 858 error = urtw_eprom_ck(sc); 859 if (error != 0) 860 goto fail; 861 error = urtw_eprom_readbit(sc, &data16); 862 if (error != 0) 863 goto fail; 864 865 (*data) |= (data16 << (15 - i)); 866 } 867 868 error = urtw_eprom_cs(sc, URTW_EPROM_DISABLE); 869 if (error != 0) 870 goto fail; 871 error = urtw_eprom_ck(sc); 872 if (error != 0) 873 goto fail; 874 875 /* now disable EPROM programming */ 876 error = urtw_write8_c(sc, URTW_EPROM_CMD, URTW_EPROM_CMD_NORMAL_MODE); 877 fail: 878 return (error); 879 #undef URTW_READCMD_LEN 880 } 881 882 static usbd_status 883 urtw_eprom_readbit(struct urtw_softc *sc, int16_t *data) 884 { 885 uint8_t data8; 886 usbd_status error; 887 888 error = urtw_read8_c(sc, URTW_EPROM_CMD, &data8); 889 *data = (data8 & URTW_EPROM_READBIT) ? 1 : 0; 890 DELAY(URTW_EPROM_DELAY); 891 return (error); 892 } 893 894 static usbd_status 895 urtw_eprom_sendbits(struct urtw_softc *sc, int16_t *buf, int buflen) 896 { 897 int i = 0; 898 usbd_status error; 899 900 for (i = 0; i < buflen; i++) { 901 error = urtw_eprom_writebit(sc, buf[i]); 902 if (error != 0) 903 goto fail; 904 error = urtw_eprom_ck(sc); 905 if (error != 0) 906 goto fail; 907 } 908 fail: 909 return (error); 910 } 911 912 static usbd_status 913 urtw_eprom_writebit(struct urtw_softc *sc, int16_t bit) 914 { 915 uint8_t data; 916 usbd_status error; 917 918 if (error = urtw_read8_c(sc, URTW_EPROM_CMD, &data)) 919 goto fail; 920 if (bit != 0) 921 error = urtw_write8_c(sc, URTW_EPROM_CMD, 922 data | URTW_EPROM_WRITEBIT); 923 else 924 error = urtw_write8_c(sc, URTW_EPROM_CMD, 925 data & ~URTW_EPROM_WRITEBIT); 926 DELAY(URTW_EPROM_DELAY); 927 fail: 928 return (error); 929 } 930 931 static usbd_status 932 urtw_eprom_ck(struct urtw_softc *sc) 933 { 934 uint8_t data; 935 usbd_status error; 936 937 /* masking */ 938 if (error = urtw_read8_c(sc, URTW_EPROM_CMD, &data)) 939 goto fail; 940 if (error = urtw_write8_c(sc, URTW_EPROM_CMD, data | URTW_EPROM_CK)) 941 goto fail; 942 DELAY(URTW_EPROM_DELAY); 943 /* unmasking */ 944 if (error = urtw_read8_c(sc, URTW_EPROM_CMD, &data)) 945 goto fail; 946 error = urtw_write8_c(sc, URTW_EPROM_CMD, data & ~URTW_EPROM_CK); 947 DELAY(URTW_EPROM_DELAY); 948 fail: 949 return (error); 950 } 951 952 static usbd_status 953 urtw_eprom_cs(struct urtw_softc *sc, int able) 954 { 955 uint8_t data; 956 usbd_status error; 957 958 if (error = urtw_read8_c(sc, URTW_EPROM_CMD, &data)) 959 goto fail; 960 if (able == URTW_EPROM_ENABLE) 961 error = urtw_write8_c(sc, URTW_EPROM_CMD, 962 data | URTW_EPROM_CS); 963 else 964 error = urtw_write8_c(sc, URTW_EPROM_CMD, 965 data & ~URTW_EPROM_CS); 966 DELAY(URTW_EPROM_DELAY); 967 fail: 968 return (error); 969 } 970 971 static usbd_status 972 urtw_read8_c(struct urtw_softc *sc, int val, uint8_t *data) 973 { 974 usb_ctrl_setup_t req; 975 usb_cr_t cr; 976 usb_cb_flags_t cf; 977 mblk_t *mp = NULL; 978 usbd_status error; 979 980 bzero(&req, sizeof (req)); 981 req.bmRequestType = UT_READ_VENDOR_DEVICE; 982 req.bRequest = URTW_8187_GETREGS_REQ; 983 req.wValue = val | 0xff00; 984 req.wIndex = 0; 985 req.wLength = sizeof (uint8_t); 986 987 error = usb_pipe_ctrl_xfer_wait(sc->sc_udev->dev_default_ph, &req, &mp, 988 &cr, &cf, 0); 989 990 if (error != USB_SUCCESS) { 991 URTW8187_DBG(URTW_DEBUG_DEVREQ, (sc->sc_dev, CE_CONT, 992 "urtw_read8_c: get regs req failed :" 993 " cr:%s(%d), cf:(%x)\n", usb_str_cr(cr), cr, cf)); 994 return (error); 995 } 996 bcopy(mp->b_rptr, data, sizeof (uint8_t)); 997 URTW8187_DBG(URTW_DEBUG_DEVREQ, (sc->sc_dev, CE_CONT, 998 "urtw_read8_c: get regs data1 ok :0x%x", *data)); 999 if (mp) 1000 freemsg(mp); 1001 return (error); 1002 } 1003 1004 static usbd_status 1005 urtw_read8e(struct urtw_softc *sc, int val, uint8_t *data) 1006 { 1007 usb_ctrl_setup_t req; 1008 usb_cr_t cr; 1009 usb_cb_flags_t cf; 1010 mblk_t *mp = NULL; 1011 usbd_status error; 1012 1013 bzero(&req, sizeof (req)); 1014 req.bmRequestType = UT_READ_VENDOR_DEVICE; 1015 req.bRequest = URTW_8187_GETREGS_REQ; 1016 req.wValue = val | 0xfe00; 1017 req.wIndex = 0; 1018 req.wLength = sizeof (uint8_t); 1019 req.attrs = USB_ATTRS_AUTOCLEARING; 1020 error = usb_pipe_ctrl_xfer_wait(sc->sc_udev->dev_default_ph, &req, &mp, 1021 &cr, &cf, 0); 1022 1023 if (error != USB_SUCCESS) { 1024 URTW8187_DBG(URTW_DEBUG_DEVREQ, (sc->sc_dev, CE_CONT, 1025 "urtw_read8e: get regs req failed :" 1026 " cr:%s(%d), cf:(%x)\n", usb_str_cr(cr), cr, cf)); 1027 return (error); 1028 } 1029 1030 if (mp) { 1031 bcopy(mp->b_rptr, data, sizeof (uint8_t)); 1032 URTW8187_DBG(URTW_DEBUG_DEVREQ, (sc->sc_dev, CE_CONT, 1033 "urtw_read8e: get regs data1 ok :0x%x", *data)); 1034 freemsg(mp); 1035 } 1036 return (error); 1037 } 1038 1039 static usbd_status 1040 urtw_read16_c(struct urtw_softc *sc, int val, uint16_t *data) 1041 { 1042 usb_ctrl_setup_t req; 1043 usb_cr_t cr; 1044 usb_cb_flags_t cf; 1045 mblk_t *mp = NULL; 1046 usbd_status error; 1047 1048 bzero(&req, sizeof (req)); 1049 req.bmRequestType = UT_READ_VENDOR_DEVICE; 1050 req.bRequest = URTW_8187_GETREGS_REQ; 1051 req.wValue = val | 0xff00; 1052 req.wIndex = 0; 1053 req.wLength = sizeof (uint16_t); 1054 req.attrs = USB_ATTRS_AUTOCLEARING; 1055 error = usb_pipe_ctrl_xfer_wait(sc->sc_udev->dev_default_ph, &req, &mp, 1056 &cr, &cf, 0); 1057 1058 if (error != USB_SUCCESS) { 1059 URTW8187_DBG(URTW_DEBUG_DEVREQ, (sc->sc_dev, CE_CONT, 1060 "urtw_read16_c: get regs req failed :" 1061 " cr:%s(%d), cf:(%x)\n", 1062 usb_str_cr(cr), cr, cf)); 1063 return (error); 1064 } 1065 if (mp) { 1066 bcopy(mp->b_rptr, data, sizeof (uint16_t)); 1067 URTW8187_DBG(URTW_DEBUG_DEVREQ, (sc->sc_dev, CE_CONT, 1068 "urtw_read16_c: get regs data2 ok :0x%x", *data)); 1069 freemsg(mp); 1070 } 1071 return (error); 1072 } 1073 1074 static usbd_status 1075 urtw_read32_c(struct urtw_softc *sc, int val, uint32_t *data) 1076 { 1077 usb_ctrl_setup_t req; 1078 usb_cr_t cr; 1079 usb_cb_flags_t cf; 1080 mblk_t *mp = NULL; 1081 usbd_status error; 1082 1083 bzero(&req, sizeof (req)); 1084 req.bmRequestType = UT_READ_VENDOR_DEVICE; 1085 req.bRequest = URTW_8187_GETREGS_REQ; 1086 req.wValue = val | 0xff00; 1087 req.wIndex = 0; 1088 req.wLength = sizeof (uint32_t); 1089 req.attrs = USB_ATTRS_AUTOCLEARING; 1090 1091 error = usb_pipe_ctrl_xfer_wait(sc->sc_udev->dev_default_ph, &req, &mp, 1092 &cr, &cf, 0); 1093 1094 if (error != USB_SUCCESS) { 1095 URTW8187_DBG(URTW_DEBUG_DEVREQ, (sc->sc_dev, CE_CONT, 1096 "urtw_read32_c: get regs req failed :" 1097 " cr:%s(%d), cf:(%x)\n", usb_str_cr(cr), cr, cf)); 1098 return (error); 1099 } 1100 1101 if (mp) { 1102 bcopy(mp->b_rptr, data, sizeof (uint32_t)); 1103 URTW8187_DBG(URTW_DEBUG_DEVREQ, (sc->sc_dev, CE_CONT, 1104 "urtw_read32_c: get regs data4 ok :0x%x", *data)); 1105 freemsg(mp); 1106 } 1107 return (error); 1108 } 1109 1110 static usbd_status 1111 urtw_write8_c(struct urtw_softc *sc, int val, uint8_t data) 1112 { 1113 usb_ctrl_setup_t req; 1114 usb_cr_t cr; 1115 usb_cb_flags_t cf; 1116 mblk_t *mp = 0; 1117 int error; 1118 1119 bzero(&req, sizeof (req)); 1120 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 1121 req.bRequest = URTW_8187_SETREGS_REQ; 1122 req.wValue = val | 0xff00; 1123 req.wIndex = 0; 1124 req.wLength = sizeof (uint8_t); 1125 req.attrs = USB_ATTRS_NONE; 1126 1127 mp = allocb(sizeof (uint32_t), BPRI_MED); 1128 if (mp == NULL) { 1129 cmn_err(CE_CONT, "urtw_write8_c: failed alloc mblk."); 1130 return (-1); 1131 } 1132 *(uint8_t *)(mp->b_rptr) = data; 1133 mp->b_wptr += sizeof (uint8_t); 1134 error = usb_pipe_ctrl_xfer_wait(sc->sc_udev->dev_default_ph, &req, &mp, 1135 &cr, &cf, 0); 1136 if (error != USB_SUCCESS) { 1137 URTW8187_DBG(URTW_DEBUG_DEVREQ, (sc->sc_dev, CE_CONT, 1138 "urtw_write8_c: could not set regs:" 1139 "cr:%s(%d), cf:(%x)\n", usb_str_cr(cr), cr, cf)); 1140 } 1141 if (mp) 1142 freemsg(mp); 1143 return (error); 1144 } 1145 1146 static usbd_status 1147 urtw_write8e(struct urtw_softc *sc, int val, uint8_t data) 1148 { 1149 usb_ctrl_setup_t req; 1150 usb_cr_t cr; 1151 usb_cb_flags_t cf; 1152 mblk_t *mp = 0; 1153 int error; 1154 1155 bzero(&req, sizeof (req)); 1156 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 1157 req.bRequest = URTW_8187_SETREGS_REQ; 1158 req.wValue = val | 0xfe00; 1159 req.wIndex = 0; 1160 req.wLength = sizeof (uint8_t); 1161 req.attrs = USB_ATTRS_NONE; 1162 1163 mp = allocb(sizeof (uint8_t), BPRI_MED); 1164 if (mp == NULL) { 1165 cmn_err(CE_CONT, "urtw_write8e: failed alloc mblk."); 1166 return (-1); 1167 } 1168 *(mp->b_rptr) = data; 1169 mp->b_wptr += sizeof (uint8_t); 1170 1171 error = usb_pipe_ctrl_xfer_wait(sc->sc_udev->dev_default_ph, &req, &mp, 1172 &cr, &cf, 0); 1173 if (error != USB_SUCCESS) { 1174 URTW8187_DBG(URTW_DEBUG_DEVREQ, (sc->sc_dev, CE_CONT, 1175 "urtw_write8e: could not set regs:" 1176 "cr:%s(%d), cf:(%x)\n", 1177 usb_str_cr(cr), cr, cf)); 1178 } 1179 if (mp) 1180 freemsg(mp); 1181 return (error); 1182 } 1183 1184 static usbd_status 1185 urtw_write16_c(struct urtw_softc *sc, int val, uint16_t data) 1186 { 1187 usb_ctrl_setup_t req; 1188 usb_cr_t cr; 1189 usb_cb_flags_t cf; 1190 mblk_t *mp = 0; 1191 int error; 1192 1193 bzero(&req, sizeof (req)); 1194 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 1195 req.bRequest = URTW_8187_SETREGS_REQ; 1196 req.wValue = val | 0xff00; 1197 req.wIndex = 0; 1198 req.wLength = sizeof (uint16_t); 1199 req.attrs = USB_ATTRS_NONE; 1200 1201 mp = allocb(sizeof (uint16_t), BPRI_MED); 1202 if (mp == NULL) { 1203 cmn_err(CE_CONT, "urtw_write16_c: failed alloc mblk."); 1204 return (-1); 1205 } 1206 *(uint16_t *)(uintptr_t)(mp->b_rptr) = data; 1207 mp->b_wptr += sizeof (uint16_t); 1208 error = usb_pipe_ctrl_xfer_wait(sc->sc_udev->dev_default_ph, &req, &mp, 1209 &cr, &cf, 0); 1210 if (error != USB_SUCCESS) { 1211 URTW8187_DBG(URTW_DEBUG_DEVREQ, (sc->sc_dev, CE_CONT, 1212 "urtw_write16_c: could not set regs:" 1213 "cr:%s(%d), cf:(%x)\n", 1214 usb_str_cr(cr), cr, cf)); 1215 } 1216 if (mp) 1217 freemsg(mp); 1218 return (error); 1219 } 1220 1221 static usbd_status 1222 urtw_write32_c(struct urtw_softc *sc, int val, uint32_t data) 1223 { 1224 usb_ctrl_setup_t req; 1225 usb_cr_t cr; 1226 usb_cb_flags_t cf; 1227 mblk_t *mp = 0; 1228 int error; 1229 1230 bzero(&req, sizeof (req)); 1231 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 1232 req.bRequest = URTW_8187_SETREGS_REQ; 1233 req.wValue = val | 0xff00; 1234 req.wIndex = 0; 1235 req.wLength = sizeof (uint32_t); 1236 req.attrs = USB_ATTRS_NONE; 1237 1238 mp = allocb(sizeof (uint32_t), BPRI_MED); 1239 if (mp == NULL) { 1240 cmn_err(CE_CONT, "urtw_write32_c: failed alloc mblk."); 1241 return (-1); 1242 } 1243 *(uint32_t *)(uintptr_t)(mp->b_rptr) = data; 1244 mp->b_wptr += sizeof (uint32_t); 1245 error = usb_pipe_ctrl_xfer_wait(sc->sc_udev->dev_default_ph, &req, &mp, 1246 &cr, &cf, 0); 1247 if (error != USB_SUCCESS) { 1248 URTW8187_DBG(URTW_DEBUG_DEVREQ, (sc->sc_dev, CE_CONT, 1249 "urtw_write32_c: could not set regs:" 1250 "cr:%s(%d), cf:(%x)\n", 1251 usb_str_cr(cr), cr, cf)); 1252 } 1253 1254 if (mp) 1255 freemsg(mp); 1256 return (error); 1257 } 1258 1259 static usbd_status 1260 urtw_set_mode(struct urtw_softc *sc, uint32_t mode) 1261 { 1262 uint8_t data; 1263 usbd_status error; 1264 1265 if (error = urtw_read8_c(sc, URTW_EPROM_CMD, &data)) 1266 goto fail; 1267 data = (data & ~URTW_EPROM_CMD_MASK) | (mode << URTW_EPROM_CMD_SHIFT); 1268 data = data & ~(URTW_EPROM_CS | URTW_EPROM_CK); 1269 error = urtw_write8_c(sc, URTW_EPROM_CMD, data); 1270 fail: 1271 return (error); 1272 } 1273 1274 static usbd_status 1275 urtw_8180_set_anaparam(struct urtw_softc *sc, uint32_t val) 1276 { 1277 uint8_t data; 1278 usbd_status error; 1279 1280 error = urtw_set_mode(sc, URTW_EPROM_CMD_CONFIG); 1281 if (error) 1282 goto fail; 1283 1284 if (error = urtw_read8_c(sc, URTW_CONFIG3, &data)) 1285 goto fail; 1286 if (error = urtw_write8_c(sc, URTW_CONFIG3, 1287 data | URTW_CONFIG3_ANAPARAM_WRITE)) 1288 goto fail; 1289 if (error = urtw_write32_c(sc, URTW_ANAPARAM, val)) 1290 goto fail; 1291 if (error = urtw_read8_c(sc, URTW_CONFIG3, &data)) 1292 goto fail; 1293 if (error = urtw_write8_c(sc, URTW_CONFIG3, 1294 data & ~URTW_CONFIG3_ANAPARAM_WRITE)) 1295 goto fail; 1296 1297 error = urtw_set_mode(sc, URTW_EPROM_CMD_NORMAL); 1298 if (error) 1299 goto fail; 1300 fail: 1301 return (error); 1302 } 1303 1304 static usbd_status 1305 urtw_8185_set_anaparam2(struct urtw_softc *sc, uint32_t val) 1306 { 1307 uint8_t data; 1308 usbd_status error; 1309 1310 error = urtw_set_mode(sc, URTW_EPROM_CMD_CONFIG); 1311 if (error) 1312 goto fail; 1313 1314 if (error = urtw_read8_c(sc, URTW_CONFIG3, &data)) 1315 goto fail; 1316 if (error = urtw_write8_c(sc, URTW_CONFIG3, 1317 data | URTW_CONFIG3_ANAPARAM_WRITE)) 1318 goto fail; 1319 if (error = urtw_write32_c(sc, URTW_ANAPARAM2, val)) 1320 goto fail; 1321 if (error = urtw_read8_c(sc, URTW_CONFIG3, &data)) 1322 goto fail; 1323 if (error = urtw_write8_c(sc, URTW_CONFIG3, 1324 data & ~URTW_CONFIG3_ANAPARAM_WRITE)) 1325 goto fail; 1326 1327 error = urtw_set_mode(sc, URTW_EPROM_CMD_NORMAL); 1328 if (error) 1329 goto fail; 1330 fail: 1331 return (error); 1332 } 1333 1334 static usbd_status 1335 urtw_intr_disable(struct urtw_softc *sc) 1336 { 1337 usbd_status error; 1338 1339 error = urtw_write16_c(sc, URTW_INTR_MASK, 0); 1340 return (error); 1341 } 1342 1343 static usbd_status 1344 urtw_reset(struct urtw_softc *sc) 1345 { 1346 uint8_t data; 1347 usbd_status error; 1348 1349 error = urtw_8180_set_anaparam(sc, URTW_8225_ANAPARAM_ON); 1350 if (error) 1351 goto fail; 1352 error = urtw_8185_set_anaparam2(sc, URTW_8225_ANAPARAM2_ON); 1353 if (error) 1354 goto fail; 1355 1356 error = urtw_intr_disable(sc); 1357 if (error) 1358 goto fail; 1359 urtw_delay_ms(50); 1360 1361 error = urtw_write8e(sc, 0x18, 0x10); 1362 if (error != 0) 1363 goto fail; 1364 error = urtw_write8e(sc, 0x18, 0x11); 1365 if (error != 0) 1366 goto fail; 1367 error = urtw_write8e(sc, 0x18, 0x00); 1368 if (error != 0) 1369 goto fail; 1370 urtw_delay_ms(50); 1371 1372 if (error = urtw_read8_c(sc, URTW_CMD, &data)) 1373 goto fail; 1374 data = (data & 2) | URTW_CMD_RST; 1375 if (error = urtw_write8_c(sc, URTW_CMD, data)) 1376 goto fail; 1377 urtw_delay_ms(50); 1378 1379 if (error = urtw_read8_c(sc, URTW_CMD, &data)) 1380 goto fail; 1381 if (data & URTW_CMD_RST) { 1382 cmn_err(CE_CONT, "urtw reset timeout\n"); 1383 goto fail; 1384 } 1385 error = urtw_set_mode(sc, URTW_EPROM_CMD_LOAD); 1386 if (error) 1387 goto fail; 1388 urtw_delay_ms(50); 1389 1390 error = urtw_8180_set_anaparam(sc, URTW_8225_ANAPARAM_ON); 1391 if (error) 1392 goto fail; 1393 error = urtw_8185_set_anaparam2(sc, URTW_8225_ANAPARAM2_ON); 1394 if (error) 1395 goto fail; 1396 fail: 1397 return (error); 1398 } 1399 1400 static usbd_status 1401 urtw_led_on(struct urtw_softc *sc, int type) 1402 { 1403 if (type == URTW_LED_GPIO) { 1404 switch (sc->sc_gpio_ledpin) { 1405 case URTW_LED_PIN_GPIO0: 1406 (void) urtw_write8_c(sc, URTW_GPIO, 0x01); 1407 (void) urtw_write8_c(sc, URTW_GP_ENABLE, 0x00); 1408 break; 1409 default: 1410 cmn_err(CE_WARN, "unsupported LED PIN type 0x%x", 1411 sc->sc_gpio_ledpin); 1412 /* never reach */ 1413 } 1414 } else { 1415 cmn_err(CE_WARN, "unsupported LED type 0x%x", type); 1416 /* never reach */ 1417 } 1418 1419 sc->sc_gpio_ledon = 1; 1420 return (0); 1421 } 1422 1423 static usbd_status 1424 urtw_led_off(struct urtw_softc *sc, int type) 1425 { 1426 if (type == URTW_LED_GPIO) { 1427 switch (sc->sc_gpio_ledpin) { 1428 case URTW_LED_PIN_GPIO0: 1429 (void) urtw_write8_c(sc, URTW_GPIO, 0x01); 1430 (void) urtw_write8_c(sc, URTW_GP_ENABLE, 0x01); 1431 break; 1432 default: 1433 cmn_err(CE_WARN, "unsupported LED PIN type 0x%x", 1434 sc->sc_gpio_ledpin); 1435 /* never reach */ 1436 } 1437 } else { 1438 cmn_err(CE_WARN, "unsupported LED type 0x%x", type); 1439 /* never reach */ 1440 } 1441 1442 sc->sc_gpio_ledon = 0; 1443 return (0); 1444 } 1445 1446 static usbd_status 1447 urtw_led_mode0(struct urtw_softc *sc, int mode) 1448 { 1449 URTW8187_DBG(URTW_DEBUG_LED, (sc->sc_dev, CE_CONT, 1450 "urtw_led_mode0: mode = %d\n", mode)); 1451 switch (mode) { 1452 case URTW_LED_CTL_POWER_ON: 1453 sc->sc_gpio_ledstate = URTW_LED_POWER_ON_BLINK; 1454 break; 1455 case URTW_LED_CTL_TX: 1456 if (sc->sc_gpio_ledinprogress == 1) 1457 return (0); 1458 sc->sc_gpio_ledstate = URTW_LED_BLINK_NORMAL; 1459 sc->sc_gpio_blinktime = 1460 (sc->sc_ic.ic_state == IEEE80211_S_RUN ? 4:2); 1461 break; 1462 case URTW_LED_CTL_LINK: 1463 sc->sc_gpio_ledstate = URTW_LED_ON; 1464 break; 1465 default: 1466 cmn_err(CE_CONT, "unsupported LED mode 0x%x", mode); 1467 /* never reach */ 1468 } 1469 1470 switch (sc->sc_gpio_ledstate) { 1471 case URTW_LED_ON: 1472 if (sc->sc_gpio_ledinprogress != 0) 1473 break; 1474 (void) urtw_led_on(sc, URTW_LED_GPIO); 1475 break; 1476 case URTW_LED_BLINK_NORMAL: 1477 if (sc->sc_gpio_ledinprogress != 0) 1478 break; 1479 sc->sc_gpio_ledinprogress = 1; 1480 sc->sc_gpio_blinkstate = (sc->sc_gpio_ledon != 0) ? 1481 URTW_LED_OFF : URTW_LED_ON; 1482 URTW_LEDLOCK(sc); 1483 if (sc->sc_led_ch == 0) { 1484 URTW8187_DBG(URTW_DEBUG_LED, (sc->sc_dev, CE_CONT, 1485 "urtw_led_mode0: restart led timer\n")); 1486 sc->sc_led_ch = timeout(urtw_led_launch, 1487 (void *)sc, 1488 drv_usectohz((sc->sc_ic.ic_state == 1489 IEEE80211_S_RUN) ? 1490 URTW_LED_LINKON_BLINK : 1491 URTW_LED_LINKOFF_BLINK)); 1492 sc->sc_gpio_ledinprogress = 0; 1493 } 1494 URTW_LEDUNLOCK(sc); 1495 break; 1496 case URTW_LED_POWER_ON_BLINK: 1497 (void) urtw_led_on(sc, URTW_LED_GPIO); 1498 urtw_delay_ms(100); 1499 (void) urtw_led_off(sc, URTW_LED_GPIO); 1500 break; 1501 default: 1502 URTW8187_DBG(URTW_DEBUG_LED, (sc->sc_dev, CE_CONT, 1503 "urtw_led_mode0: unknown LED status 0x%x", 1504 sc->sc_gpio_ledstate)); 1505 } 1506 return (0); 1507 } 1508 1509 static usbd_status 1510 urtw_led_mode1(struct urtw_softc *sc, int mode) 1511 { 1512 cmn_err(CE_WARN, "urtw sc %p, mode %d not supported", (void *)sc, mode); 1513 return (USBD_INVAL); 1514 } 1515 1516 static usbd_status 1517 urtw_led_mode2(struct urtw_softc *sc, int mode) 1518 { 1519 cmn_err(CE_WARN, "urtw sc %p, mode %d not supported", (void *)sc, mode); 1520 return (USBD_INVAL); 1521 } 1522 1523 static usbd_status 1524 urtw_led_mode3(struct urtw_softc *sc, int mode) 1525 { 1526 cmn_err(CE_WARN, "urtw sc %p, mode %d not supported", (void *)sc, mode); 1527 return (USBD_INVAL); 1528 } 1529 1530 static usbd_status 1531 urtw_led_blink(struct urtw_softc *sc) 1532 { 1533 uint8_t ing = 0; 1534 1535 URTW8187_DBG(URTW_DEBUG_LED, (sc->sc_dev, CE_CONT, 1536 "urtw_led_blink: gpio_blinkstate %d\n", 1537 sc->sc_gpio_blinkstate)); 1538 if (sc->sc_gpio_blinkstate == URTW_LED_ON) 1539 (void) urtw_led_on(sc, URTW_LED_GPIO); 1540 else 1541 (void) urtw_led_off(sc, URTW_LED_GPIO); 1542 sc->sc_gpio_blinktime--; 1543 if (sc->sc_gpio_blinktime == 0) 1544 ing = 1; 1545 else { 1546 if (sc->sc_gpio_ledstate != URTW_LED_BLINK_NORMAL && 1547 sc->sc_gpio_ledstate != URTW_LED_BLINK_SLOWLY && 1548 sc->sc_gpio_ledstate != URTW_LED_BLINK_CM3) 1549 ing = 1; 1550 } 1551 if (ing == 1) { 1552 if (sc->sc_gpio_ledstate == URTW_LED_ON && 1553 sc->sc_gpio_ledon == 0) 1554 (void) urtw_led_on(sc, URTW_LED_GPIO); 1555 else if (sc->sc_gpio_ledstate == URTW_LED_OFF && 1556 sc->sc_gpio_ledon == 1) 1557 (void) urtw_led_off(sc, URTW_LED_GPIO); 1558 1559 sc->sc_gpio_blinktime = 0; 1560 sc->sc_gpio_ledinprogress = 0; 1561 return (0); 1562 } 1563 1564 sc->sc_gpio_blinkstate = (sc->sc_gpio_blinkstate != URTW_LED_ON) ? 1565 URTW_LED_ON : URTW_LED_OFF; 1566 1567 switch (sc->sc_gpio_ledstate) { 1568 case URTW_LED_BLINK_NORMAL: 1569 URTW8187_DBG(URTW_DEBUG_LED, (sc->sc_dev, CE_CONT, 1570 "URTW_LED_BLINK_NORMAL\n")); 1571 return (1); 1572 default: 1573 URTW8187_DBG(URTW_DEBUG_LED, (sc->sc_dev, CE_CONT, 1574 "unknown LED status 0x%x", sc->sc_gpio_ledstate)); 1575 } 1576 return (0); 1577 } 1578 1579 static usbd_status 1580 urtw_led_ctl(struct urtw_softc *sc, int mode) 1581 { 1582 usbd_status error = 0; 1583 1584 switch (sc->sc_strategy) { 1585 case URTW_SW_LED_MODE0: 1586 error = urtw_led_mode0(sc, mode); 1587 break; 1588 case URTW_SW_LED_MODE1: 1589 error = urtw_led_mode1(sc, mode); 1590 break; 1591 case URTW_SW_LED_MODE2: 1592 error = urtw_led_mode2(sc, mode); 1593 break; 1594 case URTW_SW_LED_MODE3: 1595 error = urtw_led_mode3(sc, mode); 1596 break; 1597 default: 1598 cmn_err(CE_CONT, "unsupported LED mode %d\n", sc->sc_strategy); 1599 /* never reach */ 1600 return (-1); 1601 } 1602 1603 return (error); 1604 } 1605 1606 static usbd_status 1607 urtw_update_msr(struct urtw_softc *sc, int nstate) 1608 { 1609 struct ieee80211com *ic = &sc->sc_ic; 1610 uint8_t data; 1611 usbd_status error; 1612 1613 if (error = urtw_read8_c(sc, URTW_MSR, &data)) 1614 goto fail; 1615 data &= ~URTW_MSR_LINK_MASK; 1616 1617 if (nstate == IEEE80211_S_RUN) { 1618 switch (ic->ic_opmode) { 1619 case IEEE80211_M_STA: 1620 case IEEE80211_M_MONITOR: 1621 data |= URTW_MSR_LINK_STA; 1622 break; 1623 case IEEE80211_M_IBSS: 1624 data |= URTW_MSR_LINK_ADHOC; 1625 break; 1626 case IEEE80211_M_HOSTAP: 1627 data |= URTW_MSR_LINK_HOSTAP; 1628 break; 1629 default: 1630 cmn_err(CE_CONT, "unsupported operation mode 0x%x\n", 1631 ic->ic_opmode); 1632 return (-1); 1633 } 1634 } else 1635 data |= URTW_MSR_LINK_NONE; 1636 1637 error = urtw_write8_c(sc, URTW_MSR, data); 1638 drv_usecwait(10000); 1639 fail: 1640 return (error); 1641 } 1642 1643 static uint16_t 1644 urtw_rate2rtl(int rate) 1645 { 1646 #define N(a) (sizeof (a) / sizeof ((a)[0])) 1647 int i; 1648 1649 for (i = 0; i < N(urtw_ratetable); i++) { 1650 if (rate == urtw_ratetable[i].reg) 1651 return (urtw_ratetable[i].val); 1652 } 1653 return (3); 1654 #undef N 1655 } 1656 1657 static uint16_t 1658 urtw_rtl2rate(int rate) 1659 { 1660 #define N(a) (sizeof (a) / sizeof ((a)[0])) 1661 int i; 1662 1663 for (i = 0; i < N(urtw_ratetable); i++) { 1664 if (rate == urtw_ratetable[i].val) 1665 return (urtw_ratetable[i].reg); 1666 } 1667 1668 return (0); 1669 #undef N 1670 } 1671 1672 static usbd_status 1673 urtw_set_rate(struct urtw_softc *sc) 1674 { 1675 int i, basic_rate, min_rr_rate, max_rr_rate; 1676 uint16_t data; 1677 usbd_status error; 1678 1679 basic_rate = urtw_rate2rtl(48); 1680 min_rr_rate = urtw_rate2rtl(12); 1681 max_rr_rate = urtw_rate2rtl(48); 1682 if (error = urtw_write8_c(sc, URTW_RESP_RATE, 1683 max_rr_rate << URTW_RESP_MAX_RATE_SHIFT | 1684 min_rr_rate << URTW_RESP_MIN_RATE_SHIFT)) 1685 goto fail; 1686 1687 if (error = urtw_read16_c(sc, URTW_BRSR, &data)) 1688 goto fail; 1689 data &= ~URTW_BRSR_MBR_8185; 1690 1691 for (i = 0; i <= basic_rate; i++) 1692 data |= (1 << i); 1693 1694 error = urtw_write16_c(sc, URTW_BRSR, data); 1695 fail: 1696 return (error); 1697 } 1698 1699 static usbd_status 1700 urtw_intr_enable(struct urtw_softc *sc) 1701 { 1702 usbd_status error; 1703 1704 error = urtw_write16_c(sc, URTW_INTR_MASK, 0xffff); 1705 return (error); 1706 } 1707 1708 static usbd_status 1709 urtw_adapter_start(struct urtw_softc *sc) 1710 { 1711 struct ieee80211com *ic = &sc->sc_ic; 1712 usbd_status error; 1713 int i = 0; 1714 1715 error = urtw_reset(sc); 1716 if (error) 1717 goto fail; 1718 1719 if (error = urtw_write8_c(sc, 0x85, 0)) 1720 goto fail; 1721 if (error = urtw_write8_c(sc, URTW_GPIO, 0)) 1722 goto fail; 1723 1724 /* for led */ 1725 if (error = urtw_write8_c(sc, 0x85, 4)) 1726 goto fail; 1727 error = urtw_led_ctl(sc, URTW_LED_CTL_POWER_ON); 1728 if (error != 0) 1729 goto fail; 1730 1731 error = urtw_set_mode(sc, URTW_EPROM_CMD_CONFIG); 1732 if (error) 1733 goto fail; 1734 /* applying MAC address again. */ 1735 for (i = 0; i < IEEE80211_ADDR_LEN; i++) 1736 (void) urtw_write8_c(sc, URTW_MAC0 + i, 1737 ic->ic_macaddr[i]); 1738 error = urtw_set_mode(sc, URTW_EPROM_CMD_NORMAL); 1739 if (error) 1740 goto fail; 1741 1742 error = urtw_update_msr(sc, IEEE80211_S_INIT); 1743 if (error) 1744 goto fail; 1745 1746 if (error = urtw_write32_c(sc, URTW_INT_TIMEOUT, 0)) 1747 goto fail; 1748 if (error = urtw_write8_c(sc, URTW_WPA_CONFIG, 0)) 1749 goto fail; 1750 if (error = urtw_write8_c(sc, URTW_RATE_FALLBACK, 0x81)) 1751 goto fail; 1752 error = urtw_set_rate(sc); 1753 if (error != 0) 1754 goto fail; 1755 1756 error = sc->sc_rf_init(sc); 1757 if (error != 0) 1758 goto fail; 1759 if (sc->sc_rf_set_sens != NULL) 1760 sc->sc_rf_set_sens(sc, sc->sc_sens); 1761 1762 if (error = urtw_write16_c(sc, 0x5e, 1)) 1763 goto fail; 1764 if (error = urtw_write16_c(sc, 0xfe, 0x10)) 1765 goto fail; 1766 if (error = urtw_write8_c(sc, URTW_TALLY_SEL, 0x80)) 1767 goto fail; 1768 if (error = urtw_write8_c(sc, 0xff, 0x60)) 1769 goto fail; 1770 if (error = urtw_write16_c(sc, 0x5e, 0)) 1771 goto fail; 1772 if (error = urtw_write8_c(sc, 0x85, 4)) 1773 goto fail; 1774 ic->ic_curchan = &ic->ic_sup_channels[1]; 1775 error = urtw_intr_enable(sc); 1776 if (error != 0) 1777 goto fail; 1778 1779 fail: 1780 return (error); 1781 } 1782 1783 static usbd_status 1784 urtw_rx_setconf(struct urtw_softc *sc) 1785 { 1786 struct ieee80211com *ic = &sc->sc_ic; 1787 uint32_t data, a, b; 1788 usbd_status error; 1789 1790 if (urtw_read32_c(sc, URTW_RX, &data)) 1791 goto fail; 1792 data = data &~ URTW_RX_FILTER_MASK; 1793 data = data | URTW_RX_FILTER_MNG | URTW_RX_FILTER_DATA; 1794 data = data | URTW_RX_FILTER_BCAST | URTW_RX_FILTER_MCAST; 1795 1796 if (ic->ic_opmode == IEEE80211_M_MONITOR) { 1797 data = data | URTW_RX_FILTER_ICVERR; 1798 data = data | URTW_RX_FILTER_PWR; 1799 } 1800 if (sc->sc_crcmon == 1 && ic->ic_opmode == IEEE80211_M_MONITOR) 1801 data = data | URTW_RX_FILTER_CRCERR; 1802 data = data | URTW_RX_FILTER_NICMAC; 1803 data = data | URTW_RX_CHECK_BSSID; 1804 data = data &~ URTW_RX_FIFO_THRESHOLD_MASK; 1805 data = data | URTW_RX_FIFO_THRESHOLD_NONE | URTW_RX_AUTORESETPHY; 1806 data = data &~ URTW_MAX_RX_DMA_MASK; 1807 a = URTW_MAX_RX_DMA_2048; 1808 b = 0x80000000; 1809 data = data | a | b; 1810 1811 error = urtw_write32_c(sc, URTW_RX, data); 1812 fail: 1813 return (error); 1814 } 1815 1816 static usbd_status 1817 urtw_rx_enable(struct urtw_softc *sc) 1818 { 1819 int i; 1820 usbd_status error; 1821 uint8_t data; 1822 1823 sc->rx_queued = 0; 1824 for (i = 0; i < URTW_RX_DATA_LIST_COUNT; i++) { 1825 if (urtw_rx_start(sc) != 0) { 1826 return (USB_FAILURE); 1827 } 1828 } 1829 1830 error = urtw_rx_setconf(sc); 1831 if (error != 0) 1832 goto fail; 1833 1834 if (error = urtw_read8_c(sc, URTW_CMD, &data)) 1835 goto fail; 1836 error = urtw_write8_c(sc, URTW_CMD, data | URTW_CMD_RX_ENABLE); 1837 fail: 1838 return (error); 1839 } 1840 1841 static usbd_status 1842 urtw_tx_enable(struct urtw_softc *sc) 1843 { 1844 uint8_t data8; 1845 uint32_t data; 1846 usbd_status error; 1847 1848 if (error = urtw_read8_c(sc, URTW_CW_CONF, &data8)) 1849 goto fail; 1850 data8 &= ~(URTW_CW_CONF_PERPACKET_CW | URTW_CW_CONF_PERPACKET_RETRY); 1851 if (error = urtw_write8_c(sc, URTW_CW_CONF, data8)) 1852 goto fail; 1853 1854 if (error = urtw_read8_c(sc, URTW_TX_AGC_CTL, &data8)) 1855 goto fail; 1856 data8 &= ~URTW_TX_AGC_CTL_PERPACKET_GAIN; 1857 data8 &= ~URTW_TX_AGC_CTL_PERPACKET_ANTSEL; 1858 data8 &= ~URTW_TX_AGC_CTL_FEEDBACK_ANT; 1859 if (error = urtw_write8_c(sc, URTW_TX_AGC_CTL, data8)) 1860 goto fail; 1861 1862 if (error = urtw_read32_c(sc, URTW_TX_CONF, &data)) 1863 goto fail; 1864 data &= ~URTW_TX_LOOPBACK_MASK; 1865 data |= URTW_TX_LOOPBACK_NONE; 1866 data &= ~(URTW_TX_DPRETRY_MASK | URTW_TX_RTSRETRY_MASK); 1867 data |= sc->sc_tx_retry << URTW_TX_DPRETRY_SHIFT; 1868 data |= sc->sc_rts_retry << URTW_TX_RTSRETRY_SHIFT; 1869 data &= ~(URTW_TX_NOCRC | URTW_TX_MXDMA_MASK); 1870 data |= URTW_TX_MXDMA_2048 | 0x80000000 | URTW_TX_DISCW; 1871 data &= ~URTW_TX_SWPLCPLEN; 1872 data |= URTW_TX_NOICV; 1873 if (error = urtw_write32_c(sc, URTW_TX_CONF, data)) 1874 goto fail; 1875 if (error = urtw_read8_c(sc, URTW_CMD, &data8)) 1876 goto fail; 1877 error = urtw_write8_c(sc, URTW_CMD, data8 | URTW_CMD_TX_ENABLE); 1878 fail: 1879 return (error); 1880 } 1881 1882 static int 1883 urtw_init(void *arg) 1884 { 1885 struct urtw_softc *sc = arg; 1886 usbd_status error; 1887 1888 urtw_stop(sc); 1889 URTW_LOCK(sc); 1890 error = urtw_open_pipes(sc); 1891 if (error != 0) 1892 goto fail; 1893 error = urtw_adapter_start(sc); 1894 if (error != 0) 1895 goto fail; 1896 sc->sc_tx_low_queued = 0; 1897 sc->sc_tx_normal_queued = 0; 1898 error = urtw_rx_enable(sc); 1899 if (error != 0) 1900 goto fail; 1901 error = urtw_tx_enable(sc); 1902 if (error != 0) 1903 goto fail; 1904 1905 if (error == 0) { 1906 URTW8187_DBG(URTW_DEBUG_ACTIVE, (sc->sc_dev, 1907 CE_CONT, "urtw_init: succesfully done\n")); 1908 sc->sc_flags |= URTW_FLAG_RUNNING; 1909 URTW_UNLOCK(sc); 1910 return (error); 1911 } 1912 1913 fail: 1914 URTW_UNLOCK(sc); 1915 urtw_stop(sc); 1916 return (error); 1917 } 1918 1919 1920 static usbd_status 1921 urtw_8225_usb_init(struct urtw_softc *sc) 1922 { 1923 uint8_t data; 1924 usbd_status error; 1925 1926 if (error = urtw_write8_c(sc, URTW_RF_PINS_SELECT + 1, 0)) 1927 goto fail; 1928 if (error = urtw_write8_c(sc, URTW_GPIO, 0)) 1929 goto fail; 1930 if (error = urtw_read8e(sc, 0x53, &data)) 1931 goto fail; 1932 if (error = urtw_write8e(sc, 0x53, data | (1 << 7))) 1933 goto fail; 1934 if (error = urtw_write8_c(sc, URTW_RF_PINS_SELECT + 1, 4)) 1935 goto fail; 1936 if (error = urtw_write8_c(sc, URTW_GPIO, 0x20)) 1937 goto fail; 1938 if (error = urtw_write8_c(sc, URTW_GP_ENABLE, 0)) 1939 goto fail; 1940 if (error = urtw_write16_c(sc, URTW_RF_PINS_OUTPUT, 0x80)) 1941 goto fail; 1942 if (error = urtw_write16_c(sc, URTW_RF_PINS_SELECT, 0x80)) 1943 goto fail; 1944 error = urtw_write16_c(sc, URTW_RF_PINS_ENABLE, 0x80); 1945 1946 urtw_delay_ms(100); 1947 fail: 1948 return (error); 1949 } 1950 1951 static usbd_status 1952 urtw_8185_rf_pins_enable(struct urtw_softc *sc) 1953 { 1954 usbd_status error = 0; 1955 1956 error = urtw_write16_c(sc, URTW_RF_PINS_ENABLE, 0x1ff7); 1957 return (error); 1958 } 1959 1960 static usbd_status 1961 urtw_8187_write_phy(struct urtw_softc *sc, uint8_t addr, uint32_t data) 1962 { 1963 uint32_t phyw; 1964 usbd_status error; 1965 1966 phyw = ((data << 8) | (addr | 0x80)); 1967 if (error = urtw_write8_c(sc, 0x7f, ((phyw & 0xff000000) >> 24))) 1968 goto fail; 1969 if (error = urtw_write8_c(sc, 0x7e, ((phyw & 0x00ff0000) >> 16))) 1970 goto fail; 1971 if (error = urtw_write8_c(sc, 0x7d, ((phyw & 0x0000ff00) >> 8))) 1972 goto fail; 1973 error = urtw_write8_c(sc, 0x7c, ((phyw & 0x000000ff))); 1974 urtw_delay_ms(1); 1975 fail: 1976 return (error); 1977 } 1978 1979 static usbd_status 1980 urtw_8187_write_phy_ofdm_c(struct urtw_softc *sc, uint8_t addr, uint32_t data) 1981 { 1982 data = data & 0xff; 1983 return (urtw_8187_write_phy(sc, addr, data)); 1984 } 1985 1986 static usbd_status 1987 urtw_8187_write_phy_cck_c(struct urtw_softc *sc, uint8_t addr, uint32_t data) 1988 { 1989 data = data & 0xff; 1990 return (urtw_8187_write_phy(sc, addr, (data | 0x10000))); 1991 } 1992 1993 static usbd_status 1994 urtw_8225_setgain(struct urtw_softc *sc, int16_t gain) 1995 { 1996 usbd_status error; 1997 1998 if (error = urtw_8187_write_phy_ofdm_c(sc, 0x0d, 1999 urtw_8225_gain[gain * 4])) 2000 goto fail; 2001 if (error = urtw_8187_write_phy_ofdm_c(sc, 0x1b, 2002 urtw_8225_gain[gain * 4 + 2])) 2003 goto fail; 2004 if (error = urtw_8187_write_phy_ofdm_c(sc, 0x1d, 2005 urtw_8225_gain[gain * 4 + 3])) 2006 goto fail; 2007 error = urtw_8187_write_phy_ofdm_c(sc, 0x23, 2008 urtw_8225_gain[gain * 4 + 1]); 2009 fail: 2010 return (error); 2011 } 2012 2013 static usbd_status 2014 urtw_8225_set_txpwrlvl(struct urtw_softc *sc, int chan) 2015 { 2016 int i, idx, set; 2017 uint8_t *cck_pwltable; 2018 uint8_t cck_pwrlvl_max, ofdm_pwrlvl_min, ofdm_pwrlvl_max; 2019 uint8_t cck_pwrlvl = sc->sc_txpwr_cck[chan] & 0xff; 2020 uint8_t ofdm_pwrlvl = sc->sc_txpwr_ofdm[chan] & 0xff; 2021 usbd_status error; 2022 2023 cck_pwrlvl_max = 11; 2024 ofdm_pwrlvl_max = 25; /* 12 -> 25 */ 2025 ofdm_pwrlvl_min = 10; 2026 2027 /* CCK power setting */ 2028 cck_pwrlvl = (cck_pwrlvl > cck_pwrlvl_max) ? 2029 cck_pwrlvl_max : cck_pwrlvl; 2030 idx = cck_pwrlvl % 6; 2031 set = cck_pwrlvl / 6; 2032 cck_pwltable = (chan == 14) ? urtw_8225_txpwr_cck_ch14 : 2033 urtw_8225_txpwr_cck; 2034 2035 if (error = urtw_write8_c(sc, URTW_TX_GAIN_CCK, 2036 urtw_8225_tx_gain_cck_ofdm[set] >> 1)) 2037 goto fail; 2038 for (i = 0; i < 8; i++) { 2039 if (error = urtw_8187_write_phy_cck_c(sc, 0x44 + i, 2040 cck_pwltable[idx * 8 + i])) 2041 goto fail; 2042 } 2043 urtw_delay_ms(1); 2044 /* OFDM power setting */ 2045 ofdm_pwrlvl = (ofdm_pwrlvl > (ofdm_pwrlvl_max - ofdm_pwrlvl_min)) ? 2046 ofdm_pwrlvl_max : ofdm_pwrlvl + ofdm_pwrlvl_min; 2047 ofdm_pwrlvl = (ofdm_pwrlvl > 35) ? 35 : ofdm_pwrlvl; 2048 idx = ofdm_pwrlvl % 6; 2049 set = ofdm_pwrlvl / 6; 2050 2051 error = urtw_8185_set_anaparam2(sc, URTW_8225_ANAPARAM2_ON); 2052 if (error) 2053 goto fail; 2054 if (error = urtw_8187_write_phy_ofdm_c(sc, 2, 0x42)) 2055 goto fail; 2056 if (error = urtw_8187_write_phy_ofdm_c(sc, 6, 0)) 2057 goto fail; 2058 if (error = urtw_8187_write_phy_ofdm_c(sc, 8, 0)) 2059 goto fail; 2060 2061 if (error = urtw_write8_c(sc, URTW_TX_GAIN_OFDM, 2062 urtw_8225_tx_gain_cck_ofdm[set] >> 1)) 2063 goto fail; 2064 if (error = urtw_8187_write_phy_ofdm_c(sc, 0x5, 2065 urtw_8225_txpwr_ofdm[idx])) 2066 goto fail; 2067 error = urtw_8187_write_phy_ofdm_c(sc, 0x7, 2068 urtw_8225_txpwr_ofdm[idx]); 2069 urtw_delay_ms(1); 2070 fail: 2071 return (error); 2072 } 2073 2074 static usbd_status 2075 urtw_8185_tx_antenna(struct urtw_softc *sc, uint8_t ant) 2076 { 2077 usbd_status error; 2078 2079 error = urtw_write8_c(sc, URTW_TX_ANTENNA, ant); 2080 urtw_delay_ms(1); 2081 return (error); 2082 } 2083 2084 static usbd_status 2085 urtw_8225_rf_init(struct urtw_softc *sc) 2086 { 2087 #define N(a) (sizeof (a) / sizeof ((a)[0])) 2088 int i; 2089 uint16_t data; 2090 usbd_status error; 2091 2092 error = urtw_8180_set_anaparam(sc, URTW_8225_ANAPARAM_ON); 2093 if (error) 2094 goto fail; 2095 2096 if (error = urtw_8225_usb_init(sc)) 2097 goto fail; 2098 if (error = urtw_write32_c(sc, URTW_RF_TIMING, 0x000a8008)) 2099 goto fail; 2100 if (error = urtw_read16_c(sc, URTW_BRSR, &data)) 2101 goto fail; 2102 if (error = urtw_write16_c(sc, URTW_BRSR, 0xffff)) 2103 goto fail; 2104 if (error = urtw_write32_c(sc, URTW_RF_PARA, 0x100044)) 2105 goto fail; 2106 2107 if (error = urtw_set_mode(sc, URTW_EPROM_CMD_CONFIG)) 2108 goto fail; 2109 if (error = urtw_write8_c(sc, URTW_CONFIG3, 0x44)) 2110 goto fail; 2111 if (error = urtw_set_mode(sc, URTW_EPROM_CMD_NORMAL)) 2112 goto fail; 2113 if (error = urtw_8185_rf_pins_enable(sc)) 2114 goto fail; 2115 urtw_delay_ms(100); 2116 2117 for (i = 0; i < N(urtw_8225_rf_part1); i++) { 2118 if (error = urtw_8225_write_c(sc, urtw_8225_rf_part1[i].reg, 2119 urtw_8225_rf_part1[i].val)) 2120 goto fail; 2121 urtw_delay_ms(1); 2122 } 2123 urtw_delay_ms(50); 2124 if (error = urtw_8225_write_c(sc, 0x2, 0xc4d)) 2125 goto fail; 2126 urtw_delay_ms(50); 2127 if (error = urtw_8225_write_c(sc, 0x2, 0x44d)) 2128 goto fail; 2129 urtw_delay_ms(50); 2130 if (error = urtw_8225_write_c(sc, 0x0, 0x127)) 2131 goto fail; 2132 2133 for (i = 0; i < 95; i++) { 2134 if (error = urtw_8225_write_c(sc, 0x1, (uint8_t)(i + 1))) 2135 goto fail; 2136 if (error = urtw_8225_write_c(sc, 0x2, urtw_8225_rxgain[i])) 2137 goto fail; 2138 } 2139 2140 if (error = urtw_8225_write_c(sc, 0x0, 0x27)) 2141 goto fail; 2142 if (error = urtw_8225_write_c(sc, 0x0, 0x22f)) 2143 goto fail; 2144 2145 for (i = 0; i < 128; i++) { 2146 if (error = urtw_8187_write_phy_ofdm_c(sc, 0xb, 2147 urtw_8225_agc[i])) 2148 goto fail; 2149 urtw_delay_ms(1); 2150 if (error = urtw_8187_write_phy_ofdm_c(sc, 0xa, 2151 (uint8_t)i + 0x80)) 2152 goto fail; 2153 urtw_delay_ms(1); 2154 } 2155 2156 for (i = 0; i < N(urtw_8225_rf_part2); i++) { 2157 if (error = urtw_8187_write_phy_ofdm_c(sc, 2158 urtw_8225_rf_part2[i].reg, 2159 urtw_8225_rf_part2[i].val)) 2160 goto fail; 2161 urtw_delay_ms(1); 2162 } 2163 error = urtw_8225_setgain(sc, 4); 2164 if (error) 2165 goto fail; 2166 2167 for (i = 0; i < N(urtw_8225_rf_part3); i++) { 2168 if (error = urtw_8187_write_phy_cck_c(sc, 2169 urtw_8225_rf_part3[i].reg, 2170 urtw_8225_rf_part3[i].val)) 2171 goto fail; 2172 urtw_delay_ms(1); 2173 } 2174 2175 if (error = urtw_write8_c(sc, 0x5b, 0x0d)) 2176 goto fail; 2177 if (error = urtw_8225_set_txpwrlvl(sc, 1)) 2178 goto fail; 2179 if (error = urtw_8187_write_phy_cck_c(sc, 0x10, 0x9b)) 2180 goto fail; 2181 urtw_delay_ms(1); 2182 if (error = urtw_8187_write_phy_ofdm_c(sc, 0x26, 0x90)) 2183 goto fail; 2184 urtw_delay_ms(1); 2185 2186 /* TX ant A, 0x0 for B */ 2187 if (error = urtw_8185_tx_antenna(sc, 0x3)) 2188 goto fail; 2189 if (error = urtw_write32_c(sc, 0x94, 0x3dc00002)) 2190 goto fail; 2191 2192 error = urtw_8225_rf_set_chan(sc, 1); 2193 fail: 2194 return (error); 2195 #undef N 2196 } 2197 2198 static usbd_status 2199 urtw_8225_rf_set_chan(struct urtw_softc *sc, int chan) 2200 { 2201 #define IEEE80211_CHAN_G \ 2202 (IEEE80211_CHAN_2GHZ | IEEE80211_CHAN_DYN) 2203 #define IEEE80211_IS_CHAN_G(_c) \ 2204 (((_c)->ich_flags & IEEE80211_CHAN_G) == IEEE80211_CHAN_G) 2205 2206 struct ieee80211com *ic = &sc->sc_ic; 2207 struct ieee80211_channel *c = ic->ic_curchan; 2208 short gset = (IEEE80211_IS_CHAN_G(c)) ? 1 : 0; 2209 usbd_status error; 2210 2211 if (error = urtw_8225_set_txpwrlvl(sc, chan)) 2212 goto fail; 2213 if (urtw_8225_write_c(sc, 0x7, urtw_8225_channel[chan])) 2214 goto fail; 2215 urtw_delay_ms(10); 2216 2217 if (error = urtw_write8_c(sc, URTW_SIFS, 0x22)) 2218 goto fail; 2219 2220 if (ic->ic_state == IEEE80211_S_ASSOC && 2221 ic->ic_flags & IEEE80211_F_SHSLOT) 2222 if (error = urtw_write8_c(sc, URTW_SLOT, 0x9)) 2223 goto fail; 2224 else 2225 if (error = urtw_write8_c(sc, URTW_SLOT, 0x14)) 2226 goto fail; 2227 if (gset) { 2228 /* for G */ 2229 if (error = urtw_write8_c(sc, URTW_DIFS, 0x14)) 2230 goto fail; 2231 if (error = urtw_write8_c(sc, URTW_EIFS, 0x5b - 0x14)) 2232 goto fail; 2233 error = urtw_write8_c(sc, URTW_CW_VAL, 0x73); 2234 } else { 2235 /* for B */ 2236 if (error = urtw_write8_c(sc, URTW_DIFS, 0x24)) 2237 goto fail; 2238 if (error = urtw_write8_c(sc, URTW_EIFS, 0x5b - 0x24)) 2239 goto fail; 2240 error = urtw_write8_c(sc, URTW_CW_VAL, 0xa5); 2241 } 2242 2243 fail: 2244 return (error); 2245 } 2246 2247 static usbd_status 2248 urtw_8225_rf_set_sens(struct urtw_softc *sc, int sens) 2249 { 2250 usbd_status error; 2251 2252 if (sens < 0 || sens > 6) 2253 return (-1); 2254 2255 if (sens > 4) 2256 if (error = urtw_8225_write_c(sc, 0x0c, 0x850)) 2257 goto fail; 2258 else 2259 if (error = urtw_8225_write_c(sc, 0x0c, 0x50)) 2260 goto fail; 2261 2262 sens = 6 - sens; 2263 if (error = urtw_8225_setgain(sc, sens)) 2264 goto fail; 2265 error = urtw_8187_write_phy_cck_c(sc, 0x41, urtw_8225_threshold[sens]); 2266 fail: 2267 return (error); 2268 } 2269 2270 static void 2271 urtw_stop(struct urtw_softc *sc) 2272 { 2273 URTW_LOCK(sc); 2274 sc->sc_flags &= ~URTW_FLAG_RUNNING; 2275 URTW_UNLOCK(sc); 2276 urtw_close_pipes(sc); 2277 } 2278 2279 static int 2280 urtw_isbmode(uint16_t rate) 2281 { 2282 2283 rate = urtw_rtl2rate(rate); 2284 2285 return ((rate <= 22 && rate != 12 && rate != 18)?(1) : (0)); 2286 } 2287 2288 /* ARGSUSED */ 2289 static void 2290 urtw_rxeof(usb_pipe_handle_t pipe, usb_bulk_req_t *req) 2291 { 2292 struct urtw_softc *sc = (struct urtw_softc *)req->bulk_client_private; 2293 struct ieee80211com *ic = &sc->sc_ic; 2294 int actlen, len, flen, rssi; 2295 uint8_t *desc, rate; 2296 struct ieee80211_frame *wh; 2297 struct ieee80211_node *ni = 0; 2298 mblk_t *mp = 0; 2299 uint8_t *rxbuf; 2300 2301 mp = req->bulk_data; 2302 req->bulk_data = NULL; 2303 if (req->bulk_completion_reason != USB_CR_OK || 2304 mp == NULL) { 2305 sc->sc_rx_err++; 2306 URTW8187_DBG(URTW_DEBUG_RX_PROC, (sc->sc_dev, CE_CONT, 2307 "urtw_rxeof failed! %d\n", 2308 req->bulk_completion_reason)); 2309 req->bulk_data = mp; 2310 goto fail; 2311 } 2312 2313 actlen = MBLKL(mp); 2314 rxbuf = (uint8_t *)mp->b_rptr; 2315 2316 /* 4 dword and 4 byte CRC */ 2317 len = actlen - (4 * 4); 2318 desc = rxbuf + len; 2319 flen = ((desc[1] & 0x0f) << 8) + (desc[0] & 0xff); 2320 if (flen > actlen) { 2321 cmn_err(CE_CONT, "urtw_rxeof: impossible: flen %d, actlen %d\n", 2322 flen, actlen); 2323 sc->sc_rx_err++; 2324 req->bulk_data = mp; 2325 goto fail; 2326 } 2327 2328 rate = (desc[2] & 0xf0) >> 4; 2329 URTW8187_DBG(URTW_DEBUG_RX_PROC, (sc->sc_dev, CE_CONT, 2330 "urtw_rxeof: rate is %u\n", rate)); 2331 /* XXX correct? */ 2332 rssi = (desc[6] & 0xfe) >> 1; 2333 if (!urtw_isbmode(rate)) { 2334 rssi = (rssi > 90) ? 90 : ((rssi < 25) ? 25 : rssi); 2335 rssi = ((90 - rssi) * 100) / 65; 2336 } else { 2337 rssi = (rssi > 90) ? 95 : ((rssi < 30) ? 30 : rssi); 2338 rssi = ((95 - rssi) * 100) / 65; 2339 } 2340 2341 mp->b_wptr = mp->b_rptr + flen - 4; 2342 2343 wh = (struct ieee80211_frame *)mp->b_rptr; 2344 if ((wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) 2345 == IEEE80211_FC0_TYPE_DATA) { 2346 sc->sc_currate = (rate > 0) ? rate : sc->sc_currate; 2347 URTW8187_DBG(URTW_DEBUG_RX_PROC, (sc->sc_dev, CE_CONT, 2348 "urtw_rxeof: update sc_currate to %u\n", 2349 sc->sc_currate)); 2350 } 2351 ni = ieee80211_find_rxnode(ic, wh); 2352 2353 /* send the frame to the 802.11 layer */ 2354 (void) ieee80211_input(ic, mp, ni, rssi, 0); 2355 2356 /* node is no longer needed */ 2357 ieee80211_free_node(ni); 2358 fail: 2359 mutex_enter(&sc->rx_lock); 2360 sc->rx_queued--; 2361 mutex_exit(&sc->rx_lock); 2362 usb_free_bulk_req(req); 2363 if (URTW_IS_RUNNING(sc) && !URTW_IS_SUSPENDING(sc)) 2364 (void) urtw_rx_start(sc); 2365 } 2366 2367 static usbd_status 2368 urtw_8225v2_setgain(struct urtw_softc *sc, int16_t gain) 2369 { 2370 uint8_t *gainp; 2371 usbd_status error; 2372 2373 /* XXX for A? */ 2374 gainp = urtw_8225v2_gain_bg; 2375 if (error = urtw_8187_write_phy_ofdm_c(sc, 0x0d, gainp[gain * 3])) 2376 goto fail; 2377 urtw_delay_ms(1); 2378 if (error = urtw_8187_write_phy_ofdm_c(sc, 0x1b, gainp[gain * 3 + 1])) 2379 urtw_delay_ms(1); 2380 if (error = urtw_8187_write_phy_ofdm_c(sc, 0x1d, gainp[gain * 3 + 2])) 2381 goto fail; 2382 urtw_delay_ms(1); 2383 if (error = urtw_8187_write_phy_ofdm_c(sc, 0x21, 0x17)) 2384 goto fail; 2385 urtw_delay_ms(1); 2386 fail: 2387 return (error); 2388 } 2389 2390 static usbd_status 2391 urtw_8225v2_set_txpwrlvl(struct urtw_softc *sc, int chan) 2392 { 2393 int i; 2394 uint8_t *cck_pwrtable; 2395 uint8_t cck_pwrlvl_max = 15, ofdm_pwrlvl_max = 25, ofdm_pwrlvl_min = 10; 2396 uint8_t cck_pwrlvl = sc->sc_txpwr_cck[chan] & 0xff; 2397 uint8_t ofdm_pwrlvl = sc->sc_txpwr_ofdm[chan] & 0xff; 2398 usbd_status error; 2399 2400 /* CCK power setting */ 2401 cck_pwrlvl = (cck_pwrlvl > cck_pwrlvl_max) ? 2402 cck_pwrlvl_max : cck_pwrlvl; 2403 cck_pwrlvl += sc->sc_txpwr_cck_base; 2404 cck_pwrlvl = (cck_pwrlvl > 35) ? 35 : cck_pwrlvl; 2405 cck_pwrtable = (chan == 14) ? urtw_8225v2_txpwr_cck_ch14 : 2406 urtw_8225v2_txpwr_cck; 2407 2408 for (i = 0; i < 8; i++) { 2409 if (error = urtw_8187_write_phy_cck_c(sc, 0x44 + i, 2410 cck_pwrtable[i])) 2411 goto fail; 2412 } 2413 if (error = urtw_write8_c(sc, URTW_TX_GAIN_CCK, 2414 urtw_8225v2_tx_gain_cck_ofdm[cck_pwrlvl])) 2415 goto fail; 2416 urtw_delay_ms(1); 2417 2418 /* OFDM power setting */ 2419 ofdm_pwrlvl = (ofdm_pwrlvl > (ofdm_pwrlvl_max - ofdm_pwrlvl_min)) ? 2420 ofdm_pwrlvl_max : ofdm_pwrlvl + ofdm_pwrlvl_min; 2421 ofdm_pwrlvl += sc->sc_txpwr_ofdm_base; 2422 ofdm_pwrlvl = (ofdm_pwrlvl > 35) ? 35 : ofdm_pwrlvl; 2423 2424 error = urtw_8185_set_anaparam2(sc, URTW_8225_ANAPARAM2_ON); 2425 if (error) 2426 goto fail; 2427 2428 if (error = urtw_8187_write_phy_ofdm_c(sc, 2, 0x42)) 2429 goto fail; 2430 if (error = urtw_8187_write_phy_ofdm_c(sc, 5, 0x0)) 2431 goto fail; 2432 if (error = urtw_8187_write_phy_ofdm_c(sc, 6, 0x40)) 2433 goto fail; 2434 if (error = urtw_8187_write_phy_ofdm_c(sc, 7, 0x0)) 2435 goto fail; 2436 if (error = urtw_8187_write_phy_ofdm_c(sc, 8, 0x40)) 2437 goto fail; 2438 2439 error = urtw_write8_c(sc, URTW_TX_GAIN_OFDM, 2440 urtw_8225v2_tx_gain_cck_ofdm[ofdm_pwrlvl]); 2441 urtw_delay_ms(1); 2442 fail: 2443 return (error); 2444 } 2445 2446 static usbd_status 2447 urtw_8225v2_rf_init(struct urtw_softc *sc) 2448 { 2449 #define N(a) (sizeof (a)/ sizeof ((a)[0])) 2450 int i; 2451 uint16_t data; 2452 uint32_t data32; 2453 usbd_status error; 2454 2455 if (error = urtw_8180_set_anaparam(sc, URTW_8225_ANAPARAM_ON)) 2456 goto fail; 2457 if (error = urtw_8225_usb_init(sc)) 2458 goto fail; 2459 if (error = urtw_write32_c(sc, URTW_RF_TIMING, 0x000a8008)) 2460 goto fail; 2461 if (error = urtw_read16_c(sc, URTW_BRSR, &data)) 2462 goto fail; 2463 if (error = urtw_write16_c(sc, URTW_BRSR, 0xffff)) 2464 goto fail; 2465 if (error = urtw_write32_c(sc, URTW_RF_PARA, 0x100044)) 2466 goto fail; 2467 if (error = urtw_set_mode(sc, URTW_EPROM_CMD_CONFIG)) 2468 goto fail; 2469 if (error = urtw_write8_c(sc, URTW_CONFIG3, 0x44)) 2470 goto fail; 2471 if (error = urtw_set_mode(sc, URTW_EPROM_CMD_NORMAL)) 2472 goto fail; 2473 if (error = urtw_8185_rf_pins_enable(sc)) 2474 goto fail; 2475 2476 urtw_delay_ms(500); 2477 2478 for (i = 0; i < N(urtw_8225v2_rf_part1); i++) { 2479 if (error = urtw_8225_write_c(sc, urtw_8225v2_rf_part1[i].reg, 2480 urtw_8225v2_rf_part1[i].val)) 2481 goto fail; 2482 urtw_delay_ms(1); 2483 } 2484 urtw_delay_ms(100); 2485 2486 if (error = urtw_8225_write_c(sc, 0x0, 0x1b7)) 2487 goto fail; 2488 2489 for (i = 0; i < 95; i++) { 2490 if (error = urtw_8225_write_c(sc, 0x1, (uint8_t)(i + 1))) 2491 goto fail; 2492 urtw_delay_ms(1); 2493 if (error = urtw_8225_write_c(sc, 0x2, urtw_8225v2_rxgain[i])) 2494 goto fail; 2495 urtw_delay_ms(1); 2496 } 2497 2498 if (error = urtw_8225_write_c(sc, 0x3, 0x2)) 2499 goto fail; 2500 urtw_delay_ms(1); 2501 if (error = urtw_8225_write_c(sc, 0x5, 0x4)) 2502 goto fail; 2503 urtw_delay_ms(1); 2504 if (error = urtw_8225_write_c(sc, 0x0, 0xb7)) 2505 goto fail; 2506 urtw_delay_ms(1); 2507 if (error = urtw_8225_write_c(sc, 0x2, 0xc4d)) 2508 goto fail; 2509 urtw_delay_ms(100); 2510 if (error = urtw_8225_write_c(sc, 0x2, 0x44d)) 2511 goto fail; 2512 urtw_delay_ms(100); 2513 2514 if (error = urtw_8225_read(sc, 0x6, &data32)) 2515 goto fail; 2516 if (data32 != 0xe6) { 2517 error = (-1); 2518 cmn_err(CE_WARN, "expect 0xe6!! (0x%x)\n", data32); 2519 goto fail; 2520 } 2521 if (!(data32 & 0x80)) { 2522 if (error = urtw_8225_write_c(sc, 0x02, 0x0c4d)) 2523 goto fail; 2524 urtw_delay_ms(200); 2525 if (error = urtw_8225_write_c(sc, 0x02, 0x044d)) 2526 goto fail; 2527 urtw_delay_ms(100); 2528 if (error = urtw_8225_read(sc, 0x6, &data32)) 2529 goto fail; 2530 if (!(data32 & 0x80)) 2531 cmn_err(CE_CONT, "RF calibration failed\n"); 2532 } 2533 urtw_delay_ms(200); 2534 2535 if (error = urtw_8225_write_c(sc, 0x0, 0x2bf)) 2536 goto fail; 2537 for (i = 0; i < 128; i++) { 2538 if (error = urtw_8187_write_phy_ofdm_c(sc, 0xb, 2539 urtw_8225_agc[i])) 2540 goto fail; 2541 urtw_delay_ms(1); 2542 if (error = urtw_8187_write_phy_ofdm_c(sc, 0xa, 2543 (uint8_t)i + 0x80)) 2544 goto fail; 2545 urtw_delay_ms(1); 2546 } 2547 urtw_delay_ms(1); 2548 2549 for (i = 0; i < N(urtw_8225v2_rf_part2); i++) { 2550 if (error = urtw_8187_write_phy_ofdm_c(sc, 2551 urtw_8225v2_rf_part2[i].reg, 2552 urtw_8225v2_rf_part2[i].val)) 2553 goto fail; 2554 urtw_delay_ms(1); 2555 } 2556 error = urtw_8225v2_setgain(sc, 4); 2557 if (error) 2558 goto fail; 2559 2560 for (i = 0; i < N(urtw_8225v2_rf_part3); i++) { 2561 if (error = urtw_8187_write_phy_cck_c(sc, 2562 urtw_8225v2_rf_part3[i].reg, 2563 urtw_8225v2_rf_part3[i].val)) 2564 goto fail; 2565 urtw_delay_ms(1); 2566 } 2567 2568 if (error = urtw_write8_c(sc, 0x5b, 0x0d)) 2569 goto fail; 2570 if (error = urtw_8225v2_set_txpwrlvl(sc, 1)) 2571 goto fail; 2572 if (error = urtw_8187_write_phy_cck_c(sc, 0x10, 0x9b)) 2573 goto fail; 2574 urtw_delay_ms(1); 2575 if (error = urtw_8187_write_phy_ofdm_c(sc, 0x26, 0x90)) 2576 goto fail; 2577 urtw_delay_ms(1); 2578 2579 /* TX ant A, 0x0 for B */ 2580 if (error = urtw_8185_tx_antenna(sc, 0x3)) 2581 goto fail; 2582 if (error = urtw_write32_c(sc, 0x94, 0x3dc00002)) 2583 goto fail; 2584 2585 error = urtw_8225_rf_set_chan(sc, 1); 2586 fail: 2587 return (error); 2588 #undef N 2589 } 2590 2591 static usbd_status 2592 urtw_8225v2_rf_set_chan(struct urtw_softc *sc, int chan) 2593 { 2594 struct ieee80211com *ic = &sc->sc_ic; 2595 struct ieee80211_channel *c = ic->ic_curchan; 2596 short gset = (IEEE80211_IS_CHAN_G(c)) ? 1 : 0; 2597 usbd_status error; 2598 2599 if (error = urtw_8225v2_set_txpwrlvl(sc, chan)) 2600 goto fail; 2601 2602 if (error = urtw_8225_write_c(sc, 0x7, urtw_8225_channel[chan])) 2603 goto fail; 2604 2605 urtw_delay_ms(10); 2606 2607 if (error = urtw_write8_c(sc, URTW_SIFS, 0x22)) 2608 goto fail; 2609 2610 if (ic->ic_state == IEEE80211_S_ASSOC && 2611 ic->ic_flags & IEEE80211_F_SHSLOT) { 2612 if (error = urtw_write8_c(sc, URTW_SLOT, 0x9)) 2613 goto fail; 2614 } else 2615 if (error = urtw_write8_c(sc, URTW_SLOT, 0x14)) 2616 goto fail; 2617 if (gset) { 2618 /* for G */ 2619 if (error = urtw_write8_c(sc, URTW_DIFS, 0x14)) 2620 goto fail; 2621 if (error = urtw_write8_c(sc, URTW_EIFS, 0x5b - 0x14)) 2622 goto fail; 2623 if (error = urtw_write8_c(sc, URTW_CW_VAL, 0x73)) 2624 goto fail; 2625 } else { 2626 /* for B */ 2627 if (error = urtw_write8_c(sc, URTW_DIFS, 0x24)) 2628 goto fail; 2629 if (error = urtw_write8_c(sc, URTW_EIFS, 0x5b - 0x24)) 2630 goto fail; 2631 if (error = urtw_write8_c(sc, URTW_CW_VAL, 0xa5)) 2632 goto fail; 2633 } 2634 2635 fail: 2636 return (error); 2637 } 2638 2639 static int 2640 urtw_set_channel(struct urtw_softc *sc) 2641 { 2642 struct ieee80211com *ic = &sc->sc_ic; 2643 uint32_t data; 2644 usbd_status error; 2645 2646 if (error = urtw_read32_c(sc, URTW_TX_CONF, &data)) 2647 goto fail; 2648 data &= ~URTW_TX_LOOPBACK_MASK; 2649 if (error = urtw_write32_c(sc, URTW_TX_CONF, 2650 data | URTW_TX_LOOPBACK_MAC)) 2651 goto fail; 2652 error = sc->sc_rf_set_chan(sc, 2653 ieee80211_chan2ieee(ic, ic->ic_curchan)); 2654 if (error) 2655 goto fail; 2656 urtw_delay_ms(10); 2657 error = urtw_write32_c(sc, URTW_TX_CONF, data | URTW_TX_LOOPBACK_NONE); 2658 fail: 2659 return (error); 2660 } 2661 2662 /* ARGSUSED */ 2663 static void 2664 urtw_txeof_low(usb_pipe_handle_t pipe, usb_bulk_req_t *req) 2665 { 2666 struct urtw_softc *sc = (struct urtw_softc *)req->bulk_client_private; 2667 struct ieee80211com *ic = &sc->sc_ic; 2668 2669 URTW8187_DBG(URTW_DEBUG_TX_PROC, (sc->sc_dev, CE_CONT, 2670 "urtw_txeof_low(): cr:%s(%d), flags:0x%x, tx_queued:%d", 2671 usb_str_cr(req->bulk_completion_reason), 2672 req->bulk_completion_reason, 2673 req->bulk_cb_flags, 2674 sc->sc_tx_low_queued)); 2675 mutex_enter(&sc->tx_lock); 2676 if (req->bulk_completion_reason != USB_CR_OK) { 2677 ic->ic_stats.is_tx_failed++; 2678 goto fail; 2679 } 2680 2681 if (sc->sc_need_sched) { 2682 sc->sc_need_sched = 0; 2683 mac_tx_update(ic->ic_mach); 2684 } 2685 fail: 2686 sc->sc_tx_low_queued--; 2687 mutex_exit(&sc->tx_lock); 2688 usb_free_bulk_req(req); 2689 } 2690 2691 /* ARGSUSED */ 2692 static void 2693 urtw_txeof_normal(usb_pipe_handle_t pipe, usb_bulk_req_t *req) 2694 { 2695 struct urtw_softc *sc = (struct urtw_softc *)req->bulk_client_private; 2696 struct ieee80211com *ic = &sc->sc_ic; 2697 2698 URTW8187_DBG(URTW_DEBUG_ACTIVE, (sc->sc_dev, CE_CONT, 2699 "urtw_txeof_normal(): cr:%s(%d), flags:0x%x, tx_queued:%d", 2700 usb_str_cr(req->bulk_completion_reason), 2701 req->bulk_completion_reason, 2702 req->bulk_cb_flags, 2703 sc->sc_tx_normal_queued)); 2704 2705 mutex_enter(&sc->tx_lock); 2706 if (req->bulk_completion_reason != USB_CR_OK) { 2707 ic->ic_stats.is_tx_failed++; 2708 goto fail; 2709 } 2710 2711 if (sc->sc_need_sched) { 2712 sc->sc_need_sched = 0; 2713 mac_tx_update(ic->ic_mach); 2714 } 2715 fail: 2716 sc->sc_tx_normal_queued--; 2717 mutex_exit(&sc->tx_lock); 2718 usb_free_bulk_req(req); 2719 } 2720 2721 2722 static int 2723 urtw_get_rate(struct ieee80211com *ic) 2724 { 2725 uint8_t (*rates)[IEEE80211_RATE_MAXSIZE]; 2726 int rate; 2727 2728 rates = &ic->ic_bss->in_rates.ir_rates; 2729 2730 if (ic->ic_fixed_rate != IEEE80211_FIXED_RATE_NONE) 2731 rate = ic->ic_fixed_rate; 2732 else if (ic->ic_state == IEEE80211_S_RUN) 2733 rate = (*rates)[ic->ic_bss->in_txrate]; 2734 else 2735 rate = 0; 2736 return (rate & IEEE80211_RATE_VAL); 2737 } 2738 2739 static int 2740 urtw_send(ieee80211com_t *ic, mblk_t *mp, uint8_t type) 2741 { 2742 struct urtw_softc *sc = (struct urtw_softc *)ic; 2743 struct ieee80211_frame *wh; 2744 struct ieee80211_key *k; 2745 struct ieee80211_node *ni = NULL; 2746 uint8_t *buf; 2747 mblk_t *m = 0, *m0, *mtx; 2748 int off, mblen, xferlen, err = 0, priority = 0; 2749 2750 mutex_enter(&sc->tx_lock); 2751 priority = (type == IEEE80211_FC0_TYPE_DATA) ? 2752 LOW_PRIORITY_PIPE: NORMAL_PRIORITY_PIPE; 2753 2754 if (URTW_IS_SUSPENDING(sc)) { 2755 err = 0; 2756 goto failed; 2757 } 2758 2759 if (((priority)? sc->sc_tx_normal_queued : sc->sc_tx_low_queued) >= 2760 URTW_TX_DATA_LIST_COUNT) { 2761 URTW8187_DBG(URTW_DEBUG_XMIT, (sc->sc_dev, CE_CONT, 2762 "urtw_send(): no TX buffer!\n")); 2763 sc->sc_tx_nobuf++; 2764 err = ENOMEM; 2765 goto failed; 2766 } 2767 2768 m = allocb(URTW_TXBUF_SIZE, BPRI_MED); 2769 if (m == NULL) { 2770 cmn_err(CE_WARN, "urtw_send(): can't alloc mblk.\n"); 2771 err = ENOMEM; 2772 goto failed; 2773 } 2774 2775 for (off = 0, m0 = mp; m0 != NULL; m0 = m0->b_cont) { 2776 mblen = (uintptr_t)m0->b_wptr - (uintptr_t)m0->b_rptr; 2777 (void) bcopy(m0->b_rptr, m->b_rptr + off, mblen); 2778 off += mblen; 2779 } 2780 m->b_wptr += off; 2781 2782 wh = (struct ieee80211_frame *)m->b_rptr; 2783 2784 ni = ieee80211_find_txnode(ic, wh->i_addr1); 2785 if (ni == NULL) { 2786 err = ENXIO; 2787 ic->ic_stats.is_tx_failed++; 2788 goto failed; 2789 } 2790 2791 if ((type & IEEE80211_FC0_TYPE_MASK) == 2792 IEEE80211_FC0_TYPE_DATA) { 2793 (void) ieee80211_encap(ic, m, ni); 2794 } 2795 2796 if (wh->i_fc[1] & IEEE80211_FC1_WEP) { 2797 k = ieee80211_crypto_encap(ic, m); 2798 if (k == NULL) { 2799 ic->ic_stats.is_tx_failed++; 2800 err = ENXIO; 2801 goto failed; 2802 } 2803 /* packet header may have moved, reset our local pointer */ 2804 wh = (struct ieee80211_frame *)m->b_rptr; 2805 } 2806 2807 xferlen = MBLKL(m) + 4 * 3; 2808 if ((0 == xferlen % 64) || (0 == xferlen % 512)) 2809 xferlen += 1; 2810 2811 mtx = allocb(xferlen, BPRI_MED); 2812 buf = mtx->b_rptr; 2813 2814 bzero(buf, xferlen); 2815 buf[0] = MBLKL(m) & 0xff; 2816 buf[1] = (MBLKL(m) & 0x0f00) >> 8; 2817 buf[1] |= (1 << 7); 2818 2819 /* XXX sc_preamble_mode is always 2. */ 2820 if (wh->i_fc[1] & IEEE80211_FC1_MORE_FRAG) 2821 buf[2] |= (1 << 1); 2822 /* RTS rate - 10 means we use a basic rate. */ 2823 buf[2] |= (urtw_rate2rtl(2) << 3); 2824 /* 2825 * XXX currently TX rate control depends on the rate value of 2826 * RX descriptor because I don't know how to we can control TX rate 2827 * in more smart way. Please fix me you find a thing. 2828 */ 2829 if ((type & IEEE80211_FC0_TYPE_MASK) == IEEE80211_FC0_TYPE_DATA) { 2830 buf[3] = urtw_rate2rtl(MAX(2, urtw_get_rate(ic))); 2831 } else 2832 buf[3] = sc->sc_currate; 2833 buf[8] = 3; /* CW minimum */ 2834 buf[8] |= (7 << 4); /* CW maximum */ 2835 buf[9] |= 11; /* retry limitation */ 2836 2837 bcopy(m->b_rptr, &buf[12], MBLKL(m)); 2838 2839 (void) urtw_led_ctl(sc, URTW_LED_CTL_TX); 2840 mtx->b_wptr = mtx->b_rptr + xferlen; 2841 2842 URTW8187_DBG(URTW_DEBUG_XMIT, (sc->sc_dev, CE_CONT, 2843 "sending data frame len=%u rate=%u xfer len=%u\n", 2844 MBLKL(m), buf[3], xferlen)); 2845 2846 err = urtw_tx_start(sc, mtx, priority); 2847 if (!err) { 2848 ic->ic_stats.is_tx_frags++; 2849 ic->ic_stats.is_tx_bytes += MBLKL(m); 2850 } else { 2851 ic->ic_stats.is_tx_failed++; 2852 } 2853 2854 failed: 2855 if (ni != NULL) 2856 ieee80211_free_node(ni); 2857 2858 if ((mp) && 2859 ((type & IEEE80211_FC0_TYPE_MASK) != IEEE80211_FC0_TYPE_DATA || 2860 err == DDI_SUCCESS)) { 2861 freemsg(mp); 2862 } 2863 if (m) freemsg(m); 2864 2865 if (((type & IEEE80211_FC0_TYPE_MASK) == IEEE80211_FC0_TYPE_DATA) && 2866 (err != 0)) { 2867 sc->sc_need_sched = 1; 2868 } 2869 mutex_exit(&sc->tx_lock); 2870 return (err); 2871 } 2872 2873 static void 2874 urtw_next_scan(void *arg) 2875 { 2876 ieee80211com_t *ic = arg; 2877 struct urtw_softc *sc = (struct urtw_softc *)arg; 2878 2879 if (URTW_IS_NOT_RUNNING(sc)) { 2880 sc->sc_scan_id = 0; 2881 return; 2882 } 2883 2884 if (ic->ic_state == IEEE80211_S_SCAN) { 2885 (void) ieee80211_next_scan(ic); 2886 } 2887 sc->sc_scan_id = 0; 2888 } 2889 2890 static void 2891 urtw_led_launch(void *arg) 2892 { 2893 struct urtw_softc *sc = arg; 2894 ieee80211com_t *ic = &sc->sc_ic; 2895 int error = 0; 2896 2897 URTW_LEDLOCK(sc); 2898 if ((sc->sc_strategy != URTW_SW_LED_MODE0) || 2899 URTW_IS_NOT_RUNNING(sc) || 2900 URTW_IS_SUSPENDING(sc)) { 2901 URTW8187_DBG(URTW_DEBUG_LED, (sc->sc_dev, CE_CONT, 2902 "failed process LED strategy 0x%x, run?%d", 2903 sc->sc_strategy, 2904 sc->sc_flags)); 2905 sc->sc_led_ch = 0; 2906 sc->sc_gpio_ledinprogress = 0; 2907 URTW_LEDUNLOCK(sc); 2908 return; 2909 } 2910 error = urtw_led_blink(sc); 2911 if (error) { 2912 sc->sc_led_ch = timeout(urtw_led_launch, (void *)sc, 2913 drv_usectohz((ic->ic_state == IEEE80211_S_RUN) ? 2914 URTW_LED_LINKON_BLINK: URTW_LED_LINKOFF_BLINK)); 2915 URTW8187_DBG(URTW_DEBUG_LED, (sc->sc_dev, CE_CONT, 2916 "try again led launch")); 2917 } else { 2918 sc->sc_led_ch = 0; 2919 URTW8187_DBG(URTW_DEBUG_LED, (sc->sc_dev, CE_CONT, 2920 "exit led launch")); 2921 } 2922 URTW_LEDUNLOCK(sc); 2923 } 2924 2925 static int 2926 urtw_newstate(struct ieee80211com *ic, enum ieee80211_state nstate, int arg) 2927 { 2928 struct urtw_softc *sc = (struct urtw_softc *)ic; 2929 struct ieee80211_node *ni; 2930 int error = 0; 2931 2932 if (sc->sc_scan_id != 0) { 2933 (void) untimeout(sc->sc_scan_id); 2934 sc->sc_scan_id = 0; 2935 } 2936 URTW_LOCK(sc); 2937 switch (nstate) { 2938 case IEEE80211_S_INIT: 2939 URTW8187_DBG(URTW_DEBUG_STATE, 2940 (sc->sc_dev, CE_CONT, "-> IEEE80211_S_INIT...arg(%d)\n", 2941 arg)); 2942 (void) urtw_update_msr(sc, nstate); 2943 (void) urtw_led_off(sc, URTW_LED_GPIO); 2944 break; 2945 2946 case IEEE80211_S_SCAN: 2947 URTW8187_DBG(URTW_DEBUG_STATE, 2948 (sc->sc_dev, CE_CONT, 2949 "-> IEEE80211_S_SCAN...arg(%d)...[%d]\n", 2950 arg, ieee80211_chan2ieee(ic, ic->ic_curchan))); 2951 error = urtw_set_channel(sc); 2952 if (error) { 2953 URTW8187_DBG(URTW_DEBUG_STATE, 2954 (sc->sc_dev, CE_CONT, "scan setchan failed")); 2955 break; 2956 } 2957 sc->sc_scan_id = timeout(urtw_next_scan, (void *)sc, 2958 drv_usectohz(sc->dwelltime * 1000)); 2959 break; 2960 2961 case IEEE80211_S_AUTH: 2962 URTW8187_DBG(URTW_DEBUG_STATE, (sc->sc_dev, CE_CONT, 2963 "-> IEEE80211_S_AUTH ...arg(%d)\n", arg)); 2964 error = urtw_set_channel(sc); 2965 if (error) { 2966 URTW8187_DBG(URTW_DEBUG_STATE, 2967 (sc->sc_dev, CE_CONT, "auth setchan failed")); 2968 } 2969 break; 2970 2971 case IEEE80211_S_ASSOC: 2972 URTW8187_DBG(URTW_DEBUG_STATE, (sc->sc_dev, CE_CONT, 2973 "-> IEEE80211_S_ASSOC ...arg(%d)\n", arg)); 2974 error = urtw_set_channel(sc); 2975 if (error) { 2976 URTW8187_DBG(URTW_DEBUG_STATE, 2977 (sc->sc_dev, CE_CONT, "assoc setchan failed")); 2978 } 2979 break; 2980 2981 case IEEE80211_S_RUN: 2982 URTW8187_DBG(URTW_DEBUG_STATE, 2983 (sc->sc_dev, CE_CONT, "-> IEEE80211_S_RUN ...arg(%d)\n", 2984 arg)); 2985 error = urtw_set_channel(sc); 2986 if (error) { 2987 URTW8187_DBG(URTW_DEBUG_STATE, 2988 (sc->sc_dev, CE_CONT, "run setchan failed")); 2989 goto fail; 2990 } 2991 ni = ic->ic_bss; 2992 /* setting bssid. */ 2993 (void) urtw_write32_c(sc, URTW_BSSID, 2994 ((uint32_t *)(uintptr_t)ni->in_bssid)[0]); 2995 (void) urtw_write16_c(sc, URTW_BSSID + 4, 2996 ((uint16_t *)(uintptr_t)ni->in_bssid)[2]); 2997 (void) urtw_update_msr(sc, nstate); 2998 2999 ni->in_txrate = ni->in_rates.ir_nrates - 1; 3000 break; 3001 } 3002 fail: 3003 URTW_UNLOCK(sc); 3004 3005 if (error) 3006 return (EIO); 3007 error = sc->sc_newstate(ic, nstate, arg); 3008 return (error); 3009 } 3010 3011 static void 3012 urtw_close_pipes(struct urtw_softc *sc) 3013 { 3014 usb_flags_t flags = USB_FLAGS_SLEEP; 3015 3016 if (sc->sc_rxpipe != NULL) { 3017 usb_pipe_reset(sc->sc_dev, 3018 sc->sc_rxpipe, flags, NULL, 0); 3019 usb_pipe_close(sc->sc_dev, 3020 sc->sc_rxpipe, flags, NULL, 0); 3021 sc->sc_rxpipe = NULL; 3022 } 3023 3024 if (sc->sc_txpipe_low != NULL) { 3025 usb_pipe_reset(sc->sc_dev, 3026 sc->sc_txpipe_low, flags, NULL, 0); 3027 usb_pipe_close(sc->sc_dev, 3028 sc->sc_txpipe_low, flags, NULL, 0); 3029 sc->sc_txpipe_low = NULL; 3030 } 3031 3032 if (sc->sc_txpipe_normal != NULL) { 3033 usb_pipe_reset(sc->sc_dev, 3034 sc->sc_txpipe_normal, flags, NULL, 0); 3035 usb_pipe_close(sc->sc_dev, 3036 sc->sc_txpipe_normal, flags, NULL, 0); 3037 sc->sc_txpipe_normal = NULL; 3038 } 3039 } 3040 3041 static int 3042 urtw_open_pipes(struct urtw_softc *sc) 3043 { 3044 usb_ep_data_t *ep_node; 3045 usb_pipe_policy_t policy; 3046 int err; 3047 3048 if (sc->sc_rxpipe || sc->sc_txpipe_low || sc->sc_txpipe_normal) 3049 return (USB_SUCCESS); 3050 3051 ep_node = usb_lookup_ep_data(sc->sc_dev, sc->sc_udev, 0, 0, 3052 LOW_PRIORITY_PIPE, USB_EP_ATTR_BULK, USB_EP_DIR_OUT); 3053 3054 bzero(&policy, sizeof (usb_pipe_policy_t)); 3055 policy.pp_max_async_reqs = URTW_TX_DATA_LIST_COUNT; 3056 3057 if ((err = usb_pipe_open(sc->sc_dev, 3058 &ep_node->ep_descr, &policy, USB_FLAGS_SLEEP, 3059 &sc->sc_txpipe_low)) != USB_SUCCESS) { 3060 URTW8187_DBG(URTW_DEBUG_ACTIVE, (sc->sc_dev, CE_CONT, 3061 "urtw_open_pipes(): %x low priority pipe open failed\n", 3062 err)); 3063 goto fail; 3064 } 3065 3066 ep_node = usb_lookup_ep_data(sc->sc_dev, sc->sc_udev, 0, 0, 3067 NORMAL_PRIORITY_PIPE, USB_EP_ATTR_BULK, USB_EP_DIR_OUT); 3068 3069 bzero(&policy, sizeof (usb_pipe_policy_t)); 3070 policy.pp_max_async_reqs = URTW_TX_DATA_LIST_COUNT; 3071 3072 if ((err = usb_pipe_open(sc->sc_dev, 3073 &ep_node->ep_descr, &policy, USB_FLAGS_SLEEP, 3074 &sc->sc_txpipe_normal)) != USB_SUCCESS) { 3075 URTW8187_DBG(URTW_DEBUG_ACTIVE, (sc->sc_dev, CE_CONT, 3076 "urtw_open_pipes(): %x failed to open high tx pipe\n", 3077 err)); 3078 goto fail; 3079 } 3080 3081 ep_node = usb_lookup_ep_data(sc->sc_dev, sc->sc_udev, 0, 0, 0, 3082 USB_EP_ATTR_BULK, USB_EP_DIR_IN); 3083 3084 bzero(&policy, sizeof (usb_pipe_policy_t)); 3085 policy.pp_max_async_reqs = URTW_RX_DATA_LIST_COUNT; 3086 3087 if ((err = usb_pipe_open(sc->sc_dev, 3088 &ep_node->ep_descr, &policy, USB_FLAGS_SLEEP, 3089 &sc->sc_rxpipe)) != USB_SUCCESS) { 3090 URTW8187_DBG(URTW_DEBUG_ACTIVE, (sc->sc_dev, CE_CONT, 3091 "urtw_open_pipes(): %x failed to open rx pipe\n", err)); 3092 goto fail; 3093 } 3094 3095 return (USB_SUCCESS); 3096 3097 fail: 3098 urtw_close_pipes(sc); 3099 return (USB_FAILURE); 3100 } 3101 3102 static int 3103 urtw_tx_start(struct urtw_softc *sc, mblk_t *mp, int priority) 3104 { 3105 usb_bulk_req_t *req; 3106 int err; 3107 3108 req = usb_alloc_bulk_req(sc->sc_dev, 0, USB_FLAGS_SLEEP); 3109 if (req == NULL) { 3110 URTW8187_DBG(URTW_DEBUG_TX_PROC, (sc->sc_dev, CE_CONT, 3111 "urtw_tx_start(): failed to allocate req")); 3112 freemsg(mp); 3113 return (-1); 3114 } 3115 3116 req->bulk_len = MBLKL(mp); 3117 req->bulk_data = mp; 3118 req->bulk_client_private = (usb_opaque_t)sc; 3119 req->bulk_timeout = URTW_TX_TIMEOUT; 3120 req->bulk_attributes = USB_ATTRS_AUTOCLEARING; 3121 req->bulk_cb = (priority)?urtw_txeof_normal : urtw_txeof_low; 3122 req->bulk_exc_cb = (priority)?urtw_txeof_normal: urtw_txeof_low; 3123 req->bulk_completion_reason = 0; 3124 req->bulk_cb_flags = 0; 3125 3126 if ((err = usb_pipe_bulk_xfer( 3127 (priority)?sc->sc_txpipe_normal:sc->sc_txpipe_low, req, 0)) 3128 != USB_SUCCESS) { 3129 sc->sc_ic.ic_stats.is_tx_failed++; 3130 URTW8187_DBG(URTW_DEBUG_TX_PROC, (sc->sc_dev, CE_CONT, 3131 "urtw_tx_start: failed to do tx xfer, %d", err)); 3132 usb_free_bulk_req(req); 3133 return (EIO); 3134 } 3135 3136 if (priority) { 3137 sc->sc_tx_normal_queued++; 3138 } else { 3139 sc->sc_tx_low_queued++; 3140 } 3141 3142 return (0); 3143 } 3144 3145 static int 3146 urtw_rx_start(struct urtw_softc *sc) 3147 { 3148 usb_bulk_req_t *req; 3149 int err; 3150 3151 req = usb_alloc_bulk_req(sc->sc_dev, URTW_RXBUF_SIZE, USB_FLAGS_SLEEP); 3152 if (req == NULL) { 3153 URTW8187_DBG(URTW_DEBUG_RECV, (sc->sc_dev, CE_CONT, 3154 "urtw_rx_start(): failed to allocate req")); 3155 return (-1); 3156 } 3157 3158 req->bulk_len = URTW_RXBUF_SIZE; 3159 req->bulk_client_private = (usb_opaque_t)sc; 3160 req->bulk_timeout = 0; 3161 req->bulk_attributes = USB_ATTRS_SHORT_XFER_OK | 3162 USB_ATTRS_AUTOCLEARING; 3163 req->bulk_cb = urtw_rxeof; 3164 req->bulk_exc_cb = urtw_rxeof; 3165 req->bulk_completion_reason = 0; 3166 req->bulk_cb_flags = 0; 3167 3168 err = usb_pipe_bulk_xfer(sc->sc_rxpipe, req, 0); 3169 3170 if (err != USB_SUCCESS) { 3171 URTW8187_DBG(URTW_DEBUG_RECV, (sc->sc_dev, CE_CONT, 3172 "urtw_rx_start: failed to do rx xfer, %d", err)); 3173 usb_free_bulk_req(req); 3174 return (-1); 3175 } 3176 3177 mutex_enter(&sc->rx_lock); 3178 sc->rx_queued++; 3179 mutex_exit(&sc->rx_lock); 3180 3181 return (0); 3182 } 3183 3184 static int 3185 urtw_disconnect(dev_info_t *devinfo) 3186 { 3187 struct urtw_softc *sc; 3188 3189 sc = ddi_get_soft_state(urtw_soft_state_p, ddi_get_instance(devinfo)); 3190 URTW8187_DBG(URTW_DEBUG_HOTPLUG, 3191 (sc->sc_dev, CE_CONT, "urtw_offline()\n")); 3192 3193 ieee80211_new_state(&sc->sc_ic, IEEE80211_S_INIT, -1); 3194 ieee80211_stop_watchdog(&sc->sc_ic); 3195 if (URTW_IS_RUNNING(sc)) { 3196 urtw_stop(sc); 3197 URTW_LOCK(sc); 3198 sc->sc_flags |= URTW_FLAG_PLUGIN_ONLINE; 3199 URTW_UNLOCK(sc); 3200 } 3201 return (DDI_SUCCESS); 3202 } 3203 3204 static int 3205 urtw_reconnect(dev_info_t *devinfo) 3206 { 3207 struct urtw_softc *sc; 3208 int error = 0; 3209 sc = ddi_get_soft_state(urtw_soft_state_p, ddi_get_instance(devinfo)); 3210 if (usb_check_same_device(sc->sc_dev, NULL, USB_LOG_L2, -1, 3211 USB_CHK_ALL, NULL) != USB_SUCCESS) 3212 return (DDI_FAILURE); 3213 URTW8187_DBG(URTW_DEBUG_HOTPLUG, (sc->sc_dev, CE_CONT, 3214 "urtw_online()\n")); 3215 if (URTW_IS_PLUGIN_ONLINE(sc)) { 3216 error = urtw_init(sc); 3217 if (!error) { 3218 URTW_LOCK(sc); 3219 sc->sc_flags &= ~URTW_FLAG_PLUGIN_ONLINE; 3220 URTW_UNLOCK(sc); 3221 } 3222 } 3223 return (error); 3224 } 3225 3226 static mblk_t * 3227 urtw_m_tx(void *arg, mblk_t *mp) 3228 { 3229 struct urtw_softc *sc = (struct urtw_softc *)arg; 3230 struct ieee80211com *ic = &sc->sc_ic; 3231 mblk_t *next; 3232 3233 if ((ic->ic_state != IEEE80211_S_RUN) || 3234 URTW_IS_SUSPENDING(sc)) { 3235 freemsgchain(mp); 3236 return (NULL); 3237 } 3238 3239 while (mp != NULL) { 3240 next = mp->b_next; 3241 mp->b_next = NULL; 3242 if (urtw_send(ic, mp, IEEE80211_FC0_TYPE_DATA) != DDI_SUCCESS) { 3243 mp->b_next = next; 3244 break; 3245 } 3246 mp = next; 3247 } 3248 return (mp); 3249 } 3250 3251 static int 3252 urtw_m_start(void *arg) 3253 { 3254 struct urtw_softc *sc = (struct urtw_softc *)arg; 3255 int error = 0; 3256 3257 URTW8187_DBG(URTW_DEBUG_ACTIVE, 3258 (sc->sc_dev, CE_CONT, "urtw_m_start)\n")); 3259 error = urtw_init(sc); 3260 return (error); 3261 } 3262 3263 static void 3264 urtw_m_stop(void *arg) 3265 { 3266 struct urtw_softc *sc = (struct urtw_softc *)arg; 3267 3268 URTW8187_DBG(URTW_DEBUG_ACTIVE, (sc->sc_dev, CE_CONT, 3269 "urtw_m_stop()\n")); 3270 ieee80211_new_state(&sc->sc_ic, IEEE80211_S_INIT, -1); 3271 ieee80211_stop_watchdog(&sc->sc_ic); 3272 (void) urtw_stop(sc); 3273 } 3274 3275 /*ARGSUSED*/ 3276 static int 3277 urtw_m_unicst(void *arg, const uint8_t *macaddr) 3278 { 3279 return (ENOTSUP); 3280 } 3281 3282 /*ARGSUSED*/ 3283 static int 3284 urtw_m_multicst(void *arg, boolean_t add, const uint8_t *macaddr) 3285 { 3286 return (ENOTSUP); 3287 } 3288 3289 /*ARGSUSED*/ 3290 static int 3291 urtw_m_promisc(void *arg, boolean_t on) 3292 { 3293 return (0); 3294 } 3295 3296 static int 3297 urtw_m_setprop(void *arg, const char *pr_name, mac_prop_id_t wldp_pr_num, 3298 uint_t wldp_length, const void *wldp_buf) 3299 { 3300 struct urtw_softc *sc = (struct urtw_softc *)arg; 3301 struct ieee80211com *ic = &sc->sc_ic; 3302 int err; 3303 3304 err = ieee80211_setprop(ic, pr_name, wldp_pr_num, 3305 wldp_length, wldp_buf); 3306 if (err == ENETRESET) { 3307 if (ic->ic_des_esslen && URTW_IS_RUNNING(sc)) { 3308 (void) urtw_init(sc); 3309 (void) ieee80211_new_state(ic, IEEE80211_S_SCAN, -1); 3310 } 3311 err = 0; 3312 } 3313 return (err); 3314 } 3315 3316 static void 3317 urtw_m_ioctl(void* arg, queue_t *wq, mblk_t *mp) 3318 { 3319 struct urtw_softc *sc = (struct urtw_softc *)arg; 3320 struct ieee80211com *ic = &sc->sc_ic; 3321 int err; 3322 3323 err = ieee80211_ioctl(ic, wq, mp); 3324 if (err == ENETRESET) { 3325 if (ic->ic_des_esslen && URTW_IS_RUNNING(sc)) { 3326 (void) urtw_init(sc); 3327 (void) ieee80211_new_state(ic, 3328 IEEE80211_S_SCAN, -1); 3329 } 3330 } 3331 } 3332 3333 static int 3334 urtw_m_stat(void *arg, uint_t stat, uint64_t *val) 3335 { 3336 struct urtw_softc *sc = (struct urtw_softc *)arg; 3337 ieee80211com_t *ic = &sc->sc_ic; 3338 ieee80211_node_t *ni = 0; 3339 struct ieee80211_rateset *rs = 0; 3340 3341 URTW_LOCK(sc); 3342 switch (stat) { 3343 case MAC_STAT_IFSPEED: 3344 ni = ic->ic_bss; 3345 rs = &ni->in_rates; 3346 *val = ((ic->ic_fixed_rate == IEEE80211_FIXED_RATE_NONE) ? 3347 (rs->ir_rates[ni->in_txrate] & IEEE80211_RATE_VAL) 3348 : ic->ic_fixed_rate) / 2 * 1000000; 3349 break; 3350 case MAC_STAT_NOXMTBUF: 3351 *val = sc->sc_tx_nobuf; 3352 break; 3353 case MAC_STAT_NORCVBUF: 3354 *val = sc->sc_rx_nobuf; 3355 break; 3356 case MAC_STAT_IERRORS: 3357 *val = sc->sc_rx_err; 3358 break; 3359 case MAC_STAT_RBYTES: 3360 *val = ic->ic_stats.is_rx_bytes; 3361 break; 3362 case MAC_STAT_IPACKETS: 3363 *val = ic->ic_stats.is_rx_frags; 3364 break; 3365 case MAC_STAT_OBYTES: 3366 *val = ic->ic_stats.is_tx_bytes; 3367 break; 3368 case MAC_STAT_OPACKETS: 3369 *val = ic->ic_stats.is_tx_frags; 3370 break; 3371 case MAC_STAT_OERRORS: 3372 *val = ic->ic_stats.is_tx_failed; 3373 break; 3374 case WIFI_STAT_TX_FRAGS: 3375 case WIFI_STAT_MCAST_TX: 3376 case WIFI_STAT_TX_FAILED: 3377 case WIFI_STAT_TX_RETRANS: 3378 case WIFI_STAT_RTS_SUCCESS: 3379 case WIFI_STAT_RTS_FAILURE: 3380 case WIFI_STAT_ACK_FAILURE: 3381 case WIFI_STAT_RX_FRAGS: 3382 case WIFI_STAT_MCAST_RX: 3383 case WIFI_STAT_FCS_ERRORS: 3384 case WIFI_STAT_WEP_ERRORS: 3385 case WIFI_STAT_RX_DUPS: 3386 URTW_UNLOCK(sc); 3387 return (ieee80211_stat(ic, stat, val)); 3388 default: 3389 URTW_UNLOCK(sc); 3390 return (ENOTSUP); 3391 } 3392 URTW_UNLOCK(sc); 3393 3394 return (0); 3395 } 3396 3397 static void 3398 urtw_watchdog(void *arg) 3399 { 3400 struct urtw_softc *sc = arg; 3401 struct ieee80211com *ic = &sc->sc_ic; 3402 3403 ieee80211_stop_watchdog(ic); 3404 3405 URTW_LOCK(sc); 3406 if (URTW_IS_NOT_RUNNING(sc)) { 3407 URTW_UNLOCK(sc); 3408 return; 3409 } 3410 3411 URTW_UNLOCK(sc); 3412 switch (ic->ic_state) { 3413 case IEEE80211_S_AUTH: 3414 case IEEE80211_S_ASSOC: 3415 if (ic->ic_bss->in_fails > 0) 3416 ieee80211_new_state(ic, IEEE80211_S_INIT, -1); 3417 else 3418 ieee80211_watchdog(ic); 3419 break; 3420 } 3421 } 3422 3423 3424 static int 3425 urtw_attach(dev_info_t *devinfo, ddi_attach_cmd_t cmd) 3426 { 3427 struct urtw_softc *sc; 3428 struct ieee80211com *ic; 3429 int error, i, instance; 3430 uint32_t data = 0; 3431 char strbuf[32]; 3432 wifi_data_t wd = { 0 }; 3433 mac_register_t *macp; 3434 3435 switch (cmd) { 3436 case DDI_ATTACH: 3437 break; 3438 case DDI_RESUME: 3439 sc = ddi_get_soft_state(urtw_soft_state_p, 3440 ddi_get_instance(devinfo)); 3441 ASSERT(sc != NULL); 3442 URTW8187_DBG(URTW_DEBUG_ACTIVE, 3443 (sc->sc_dev, CE_CONT, "urtw: resume\n")); 3444 URTW_LOCK(sc); 3445 sc->sc_flags &= ~URTW_FLAG_SUSPEND; 3446 URTW_UNLOCK(sc); 3447 if (URTW_IS_PLUGIN_ONLINE(sc)) { 3448 error = urtw_init(sc); 3449 if (error == 0) { 3450 URTW_LOCK(sc); 3451 sc->sc_flags &= ~URTW_FLAG_PLUGIN_ONLINE; 3452 URTW_UNLOCK(sc); 3453 } 3454 } 3455 return (DDI_SUCCESS); 3456 default: 3457 return (DDI_FAILURE); 3458 } 3459 3460 instance = ddi_get_instance(devinfo); 3461 3462 if (ddi_soft_state_zalloc(urtw_soft_state_p, instance) != DDI_SUCCESS) { 3463 cmn_err(CE_WARN, "urtw_attach:unable to alloc soft_state_p\n"); 3464 return (DDI_FAILURE); 3465 } 3466 3467 sc = ddi_get_soft_state(urtw_soft_state_p, instance); 3468 ic = (ieee80211com_t *)&sc->sc_ic; 3469 sc->sc_dev = devinfo; 3470 3471 if (usb_client_attach(devinfo, USBDRV_VERSION, 0) != USB_SUCCESS) { 3472 cmn_err(CE_WARN, "urtw_attach: usb_client_attach failed\n"); 3473 goto fail1; 3474 } 3475 3476 if (usb_get_dev_data(devinfo, &sc->sc_udev, 3477 USB_PARSE_LVL_ALL, 0) != USB_SUCCESS) { 3478 sc->sc_udev = NULL; 3479 goto fail2; 3480 } 3481 3482 mutex_init(&sc->sc_genlock, NULL, MUTEX_DRIVER, NULL); 3483 mutex_init(&sc->tx_lock, NULL, MUTEX_DRIVER, NULL); 3484 mutex_init(&sc->rx_lock, NULL, MUTEX_DRIVER, NULL); 3485 mutex_init(&sc->sc_ledlock, NULL, MUTEX_DRIVER, NULL); 3486 3487 if (urtw_read32_c(sc, URTW_RX, &data)) 3488 goto fail3; 3489 sc->sc_epromtype = (data & URTW_RX_9356SEL) ? URTW_EEPROM_93C56 : 3490 URTW_EEPROM_93C46; 3491 if (sc->sc_epromtype == URTW_EEPROM_93C56) 3492 URTW8187_DBG(URTW_DEBUG_HWTYPE, (sc->sc_dev, CE_CONT, 3493 "urtw_attach: eprom is 93C56\n")); 3494 else 3495 URTW8187_DBG(URTW_DEBUG_HWTYPE, (sc->sc_dev, CE_CONT, 3496 "urtw_attach: eprom is 93C46\n")); 3497 error = urtw_get_rfchip(sc); 3498 if (error != 0) 3499 goto fail3; 3500 error = urtw_get_macaddr(sc); 3501 if (error != 0) 3502 goto fail3; 3503 error = urtw_get_txpwr(sc); 3504 if (error != 0) 3505 goto fail3; 3506 error = urtw_led_init(sc); /* XXX incompleted */ 3507 if (error != 0) 3508 goto fail3; 3509 3510 sc->sc_rts_retry = URTW_DEFAULT_RTS_RETRY; 3511 sc->sc_tx_retry = URTW_DEFAULT_TX_RETRY; 3512 sc->sc_currate = 3; 3513 /* XXX for what? */ 3514 sc->sc_preamble_mode = 2; 3515 3516 ic->ic_phytype = IEEE80211_T_OFDM; /* not only, but not used */ 3517 ic->ic_opmode = IEEE80211_M_STA; /* default to BSS mode */ 3518 ic->ic_state = IEEE80211_S_INIT; 3519 3520 ic->ic_maxrssi = 95; 3521 ic->ic_xmit = urtw_send; 3522 3523 ic->ic_caps |= IEEE80211_C_WPA | /* Support WPA/WPA2 */ 3524 IEEE80211_C_TXPMGT | /* tx power management */ 3525 IEEE80211_C_SHPREAMBLE | /* short preamble supported */ 3526 IEEE80211_C_SHSLOT; /* short slot time supported */ 3527 /* set supported .11b and .11g rates */ 3528 ic->ic_sup_rates[IEEE80211_MODE_11B] = urtw_rateset_11b; 3529 ic->ic_sup_rates[IEEE80211_MODE_11G] = urtw_rateset_11g; 3530 3531 /* set supported .11b and .11g channels (1 through 11) */ 3532 for (i = 1; i <= 11; i++) { 3533 ic->ic_sup_channels[i].ich_freq = 3534 ieee80211_ieee2mhz(i, IEEE80211_CHAN_2GHZ); 3535 ic->ic_sup_channels[i].ich_flags = 3536 IEEE80211_CHAN_CCK | IEEE80211_CHAN_DYN | 3537 IEEE80211_CHAN_2GHZ | IEEE80211_CHAN_OFDM; 3538 } 3539 3540 ieee80211_attach(ic); 3541 3542 /* register WPA door */ 3543 ieee80211_register_door(ic, ddi_driver_name(devinfo), 3544 ddi_get_instance(devinfo)); 3545 3546 /* override state transition machine */ 3547 sc->sc_newstate = ic->ic_newstate; 3548 ic->ic_newstate = urtw_newstate; 3549 ic->ic_watchdog = urtw_watchdog; 3550 ieee80211_media_init(ic); 3551 ic->ic_def_txkey = 0; 3552 3553 sc->dwelltime = 400; 3554 sc->sc_flags = 0; 3555 3556 /* 3557 * Provide initial settings for the WiFi plugin; whenever this 3558 * information changes, we need to call mac_plugindata_update() 3559 */ 3560 wd.wd_opmode = ic->ic_opmode; 3561 wd.wd_secalloc = WIFI_SEC_NONE; 3562 IEEE80211_ADDR_COPY(wd.wd_bssid, ic->ic_bss->in_bssid); 3563 3564 if ((macp = mac_alloc(MAC_VERSION)) == NULL) { 3565 URTW8187_DBG(URTW_DEBUG_ATTACH, (sc->sc_dev, CE_CONT, 3566 "MAC version alloc failed\n")); 3567 goto fail4; 3568 } 3569 3570 macp->m_type_ident = MAC_PLUGIN_IDENT_WIFI; 3571 macp->m_driver = sc; 3572 macp->m_dip = devinfo; 3573 macp->m_src_addr = ic->ic_macaddr; 3574 macp->m_callbacks = &urtw_m_callbacks; 3575 macp->m_min_sdu = 0; 3576 macp->m_max_sdu = IEEE80211_MTU; 3577 macp->m_pdata = &wd; 3578 macp->m_pdata_size = sizeof (wd); 3579 3580 error = mac_register(macp, &ic->ic_mach); 3581 mac_free(macp); 3582 if (error != 0) { 3583 cmn_err(CE_WARN, "urtw_attach: mac_register() err %x\n", error); 3584 goto fail4; 3585 } 3586 3587 if (usb_register_hotplug_cbs(devinfo, urtw_disconnect, 3588 urtw_reconnect) != USB_SUCCESS) { 3589 cmn_err(CE_WARN, "urtw_attach: failed to register events"); 3590 goto fail5; 3591 } 3592 3593 /* 3594 * Create minor node of type DDI_NT_NET_WIFI 3595 */ 3596 (void) snprintf(strbuf, sizeof (strbuf), "%s%d", 3597 "urtw", instance); 3598 error = ddi_create_minor_node(devinfo, strbuf, S_IFCHR, 3599 instance + 1, DDI_NT_NET_WIFI, 0); 3600 3601 if (error != DDI_SUCCESS) 3602 cmn_err(CE_WARN, "urtw: ddi_create_minor_node() failed\n"); 3603 3604 /* 3605 * Notify link is down now 3606 */ 3607 mac_link_update(ic->ic_mach, LINK_STATE_DOWN); 3608 3609 URTW8187_DBG(URTW_DEBUG_ATTACH, (sc->sc_dev, CE_CONT, 3610 "urtw_attach: successfully.\n")); 3611 return (DDI_SUCCESS); 3612 fail5: 3613 (void) mac_unregister(ic->ic_mach); 3614 fail4: 3615 ieee80211_detach(ic); 3616 fail3: 3617 mutex_destroy(&sc->sc_genlock); 3618 mutex_destroy(&sc->tx_lock); 3619 mutex_destroy(&sc->rx_lock); 3620 mutex_destroy(&sc->sc_ledlock); 3621 fail2: 3622 usb_client_detach(sc->sc_dev, sc->sc_udev); 3623 fail1: 3624 ddi_soft_state_free(urtw_soft_state_p, ddi_get_instance(devinfo)); 3625 3626 return (DDI_FAILURE); 3627 } 3628 3629 static int 3630 urtw_detach(dev_info_t *devinfo, ddi_detach_cmd_t cmd) 3631 { 3632 struct urtw_softc *sc; 3633 3634 sc = ddi_get_soft_state(urtw_soft_state_p, ddi_get_instance(devinfo)); 3635 URTW8187_DBG(URTW_DEBUG_ATTACH, (sc->sc_dev, 3636 CE_CONT, "urtw_detach()\n")); 3637 3638 switch (cmd) { 3639 case DDI_DETACH: 3640 break; 3641 case DDI_SUSPEND: 3642 URTW8187_DBG(URTW_DEBUG_ATTACH, 3643 (sc->sc_dev, CE_CONT, "urtw: suspend\n")); 3644 3645 ieee80211_new_state(&sc->sc_ic, IEEE80211_S_INIT, -1); 3646 ieee80211_stop_watchdog(&sc->sc_ic); 3647 3648 URTW_LOCK(sc); 3649 sc->sc_flags |= URTW_FLAG_SUSPEND; 3650 URTW_UNLOCK(sc); 3651 if (URTW_IS_RUNNING(sc)) { 3652 urtw_stop(sc); 3653 URTW_LOCK(sc); 3654 sc->sc_flags |= URTW_FLAG_PLUGIN_ONLINE; 3655 URTW_UNLOCK(sc); 3656 } 3657 return (DDI_SUCCESS); 3658 default: 3659 return (DDI_FAILURE); 3660 } 3661 3662 if (mac_disable(sc->sc_ic.ic_mach) != 0) 3663 return (DDI_FAILURE); 3664 urtw_stop(sc); 3665 /* 3666 * Unregister from the MAC layer subsystem 3667 */ 3668 (void) mac_unregister(sc->sc_ic.ic_mach); 3669 3670 ieee80211_detach(&sc->sc_ic); 3671 usb_unregister_hotplug_cbs(devinfo); 3672 usb_client_detach(devinfo, sc->sc_udev); 3673 mutex_destroy(&sc->sc_genlock); 3674 mutex_destroy(&sc->tx_lock); 3675 mutex_destroy(&sc->rx_lock); 3676 mutex_destroy(&sc->sc_ledlock); 3677 sc->sc_udev = NULL; 3678 3679 ddi_remove_minor_node(devinfo, NULL); 3680 ddi_soft_state_free(urtw_soft_state_p, ddi_get_instance(devinfo)); 3681 3682 return (DDI_SUCCESS); 3683 } 3684 3685 int 3686 _info(struct modinfo *modinfop) 3687 { 3688 return (mod_info(&modlinkage, modinfop)); 3689 } 3690 3691 int 3692 _init(void) 3693 { 3694 int status; 3695 3696 status = ddi_soft_state_init(&urtw_soft_state_p, 3697 sizeof (struct urtw_softc), 1); 3698 if (status != 0) 3699 return (status); 3700 3701 mac_init_ops(&urtw_dev_ops, "urtw"); 3702 status = mod_install(&modlinkage); 3703 if (status != 0) { 3704 mac_fini_ops(&urtw_dev_ops); 3705 ddi_soft_state_fini(&urtw_soft_state_p); 3706 } 3707 return (status); 3708 } 3709 3710 int 3711 _fini(void) 3712 { 3713 int status; 3714 3715 status = mod_remove(&modlinkage); 3716 if (status == 0) { 3717 mac_fini_ops(&urtw_dev_ops); 3718 ddi_soft_state_fini(&urtw_soft_state_p); 3719 } 3720 return (status); 3721 } 3722