1 /* 2 * This file and its contents are supplied under the terms of the 3 * Common Development and Distribution License ("CDDL"), version 1.0. 4 * You may only use this file in accordance with the terms of version 5 * 1.0 of the CDDL. 6 * 7 * A full copy of the text of the CDDL should have accompanied this 8 * source. A copy of the CDDL is also available via the Internet at 9 * http://www.illumos.org/license/CDDL. 10 */ 11 12 /* 13 * Copyright 2013 STEC, Inc. All rights reserved. 14 * Copyright 2014 Nexenta Systems, Inc. All rights reserved. 15 */ 16 17 #ifndef _SKD_H 18 #define _SKD_H 19 20 #include <sys/types.h> 21 #include <sys/stropts.h> 22 #include <sys/stream.h> 23 #include <sys/cmn_err.h> 24 #include <sys/kmem.h> 25 #include <sys/modctl.h> 26 #include <sys/ddi.h> 27 #include <sys/sunddi.h> 28 #include <sys/strsun.h> 29 #include <sys/kstat.h> 30 #include <sys/conf.h> 31 #include <sys/debug.h> 32 #include <sys/modctl.h> 33 #include <sys/errno.h> 34 #include <sys/pci.h> 35 #include <sys/memlist.h> 36 #include <sys/param.h> 37 #include <sys/queue.h> 38 39 #define DRV_NAME "skd" 40 #define DRV_VERSION "2.2.1" 41 #define DRV_BUILD_ID "0264" 42 #define PFX DRV_NAME ": " 43 #define DRV_BIN_VERSION 0x100 44 #define DRV_VER_COMPL DRV_VERSION "." DRV_BUILD_ID 45 #define VERSIONSTR DRV_VERSION 46 47 48 #define SG_BOUNDARY 0x20000 49 50 51 #ifdef _BIG_ENDIAN 52 #define be64_to_cpu(x) (x) 53 #define be32_to_cpu(x) (x) 54 #define cpu_to_be64(x) (x) 55 #define cpu_to_be32(x) (x) 56 #else 57 #define be64_to_cpu(x) BSWAP_64(x) 58 #define be32_to_cpu(x) BSWAP_32(x) 59 #define cpu_to_be64(x) BSWAP_64(x) 60 #define cpu_to_be32(x) BSWAP_32(x) 61 #endif 62 63 #define ATYPE_64BIT 0 64 #define ATYPE_32BIT 1 65 66 #define BIT_0 0x00001 67 #define BIT_1 0x00002 68 #define BIT_2 0x00004 69 #define BIT_3 0x00008 70 #define BIT_4 0x00010 71 #define BIT_5 0x00020 72 #define BIT_6 0x00040 73 #define BIT_7 0x00080 74 #define BIT_8 0x00100 75 #define BIT_9 0x00200 76 #define BIT_10 0x00400 77 #define BIT_11 0x00800 78 #define BIT_12 0x01000 79 #define BIT_13 0x02000 80 #define BIT_14 0x04000 81 #define BIT_15 0x08000 82 #define BIT_16 0x10000 83 #define BIT_17 0x20000 84 #define BIT_18 0x40000 85 #define BIT_19 0x80000 86 87 /* Attach progress flags */ 88 #define SKD_ATTACHED BIT_0 89 #define SKD_SOFT_STATE_ALLOCED BIT_1 90 #define SKD_CONFIG_SPACE_SETUP BIT_3 91 #define SKD_IOBASE_MAPPED BIT_4 92 #define SKD_IOMAP_IOBASE_MAPPED BIT_5 93 #define SKD_REGS_MAPPED BIT_6 94 #define SKD_DEV_IOBASE_MAPPED BIT_7 95 #define SKD_CONSTRUCTED BIT_8 96 #define SKD_PROBED BIT_9 97 #define SKD_INTR_ADDED BIT_10 98 #define SKD_PATHNAME_ALLOCED BIT_11 99 #define SKD_SUSPENDED BIT_12 100 #define SKD_CMD_ABORT_TMO BIT_13 101 #define SKD_MUTEX_INITED BIT_14 102 #define SKD_MUTEX_DESTROYED BIT_15 103 104 #define SKD_IODONE_WIOC 1 /* I/O done */ 105 #define SKD_IODONE_WNIOC 2 /* I/O NOT done */ 106 #define SKD_IODONE_WDEBUG 3 /* I/O - debug stuff */ 107 108 #ifdef SKD_PM 109 #define MAX_POWER_LEVEL 0 110 #define LOW_POWER_LEVEL (BIT_1 | BIT_0) 111 #endif 112 113 #define SKD_MSIX_AIF 0x0 114 #define SKD_MSIX_RSPQ 0x1 115 #define SKD_MSIX_MAXAIF SKD_MSIX_RSPQ + 1 116 117 /* 118 * Stuff from Linux 119 */ 120 #define SAM_STAT_GOOD 0x00 121 #define SAM_STAT_CHECK_CONDITION 0x02 122 123 #define TEST_UNIT_READY 0x00 124 #define INQUIRY 0x12 125 #define INQUIRY2 (0x12 + 0xe0) 126 #define READ_CAPACITY 0x25 127 #define READ_CAPACITY_EXT 0x9e 128 #define SYNCHRONIZE_CACHE 0x35 129 130 /* 131 * SENSE KEYS 132 */ 133 #define NO_SENSE 0x00 134 #define RECOVERED_ERROR 0x01 135 #define UNIT_ATTENTION 0x06 136 #define ABORTED_COMMAND 0x0b 137 138 typedef struct dma_mem_t { 139 void *bp; 140 ddi_acc_handle_t acc_handle; 141 ddi_dma_handle_t dma_handle; 142 ddi_dma_cookie_t cookie; 143 ddi_dma_cookie_t *cookies; 144 uint32_t size; 145 } dma_mem_t; 146 147 #define SKD_WRITEL(DEV, VAL, OFF) skd_reg_write32(DEV, VAL, OFF) 148 #define SKD_READL(DEV, OFF) skd_reg_read32(DEV, OFF) 149 #define SKD_WRITEQ(DEV, VAL, OFF) skd_reg_write64(DEV, VAL, OFF) 150 151 /* Capability lists */ 152 #define PCI_CAP_ID_EXP 0x10 /* PCI Express */ 153 154 /* 155 * End Stuff from Linux 156 */ 157 158 #define SKD_DMA_MAXXFER (2048 * DEV_BSIZE) 159 160 #define SKD_DMA_LOW_ADDRESS (uint64_t)0 161 #define SKD_DMA_HIGH_64BIT_ADDRESS (uint64_t)0xffffffffffffffff 162 #define SKD_DMA_HIGH_32BIT_ADDRESS (uint64_t)0xffffffff 163 #define SKD_DMA_XFER_COUNTER (uint64_t)0xffffffff 164 #define SKD_DMA_ADDRESS_ALIGNMENT (uint64_t)SG_BOUNDARY 165 #define SKD_DMA_BURSTSIZES 0xff 166 #define SKD_DMA_MIN_XFER_SIZE 1 167 #define SKD_DMA_MAX_XFER_SIZE (uint64_t)0xfffffe00 168 #define SKD_DMA_SEGMENT_BOUNDARY (uint64_t)0xffffffff 169 #define SKD_DMA_SG_LIST_LENGTH 256 170 #define SKD_DMA_XFER_FLAGS 0 171 #define SKD_DMA_GRANULARITY 512 /* 1 */ 172 173 #define PCI_VENDOR_ID_STEC 0x1B39 174 #define PCI_DEVICE_ID_SUMO 0x0001 175 176 #define SKD_N_FITMSG_BYTES (512u) 177 178 #define SKD_N_SPECIAL_CONTEXT 64u 179 #define SKD_N_SPECIAL_FITMSG_BYTES (128u) 180 #define SKD_N_SPECIAL_DATA_BYTES (8u*1024u) 181 182 183 /* 184 * SG elements are 32 bytes, so we can make this 4096 and still be under the 185 * 128KB limit. That allows 4096*4K = 16M xfer size 186 */ 187 #define SKD_N_SG_PER_REQ_DEFAULT 256u 188 #define SKD_N_SG_PER_SPECIAL 256u 189 190 #define SKD_N_COMPLETION_ENTRY 256u 191 #define SKD_N_READ_CAP_BYTES (8u) 192 #define SKD_N_READ_CAP_EXT_BYTES (16) 193 194 #define SKD_N_INTERNAL_BYTES (512u) 195 196 /* 5 bits of uniqifier, 0xF800 */ 197 #define SKD_ID_INCR (0x400) 198 #define SKD_ID_TABLE_MASK (3u << 8u) 199 #define SKD_ID_RW_REQUEST (0u << 8u) 200 #define SKD_ID_INTERNAL (1u << 8u) 201 #define SKD_ID_FIT_MSG (3u << 8u) 202 #define SKD_ID_SLOT_MASK 0x00FFu 203 #define SKD_ID_SLOT_AND_TABLE_MASK 0x03FFu 204 205 #define SKD_N_TIMEOUT_SLOT 8u 206 #define SKD_TIMEOUT_SLOT_MASK 7u 207 208 #define SKD_TIMER_SECONDS(seconds) (seconds) 209 #define SKD_TIMER_MINUTES(minutes) ((minutes)*(60)) 210 211 /* 212 * NOTE: INTR_LOCK() should be held prior to grabbing WAITQ_LOCK() if both 213 * are needed. 214 */ 215 #define INTR_LOCK(skdev) mutex_enter(&skdev->skd_intr_mutex) 216 #define INTR_UNLOCK(skdev) mutex_exit(&skdev->skd_intr_mutex) 217 #define INTR_LOCK_HELD(skdev) MUTEX_HELD(&skdev->skd_intr_mutex) 218 219 #define WAITQ_LOCK(skdev) \ 220 mutex_enter(&skdev->waitqueue_mutex) 221 #define WAITQ_UNLOCK(skdev) \ 222 mutex_exit(&skdev->waitqueue_mutex) 223 #define WAITQ_LOCK_HELD(skdev) \ 224 MUTEX_HELD(&skdev->waitqueue_mutex) 225 226 #define ADAPTER_STATE_LOCK(skdev) mutex_enter(&skdev->skd_lock_mutex) 227 #define ADAPTER_STATE_UNLOCK(skdev) mutex_exit(&skdev->skd_lock_mutex) 228 229 enum skd_drvr_state { 230 SKD_DRVR_STATE_LOAD, /* 0 when driver first loaded */ 231 SKD_DRVR_STATE_IDLE, /* 1 when device goes offline */ 232 SKD_DRVR_STATE_BUSY, /* 2 */ 233 SKD_DRVR_STATE_STARTING, /* 3 */ 234 SKD_DRVR_STATE_ONLINE, /* 4 */ 235 SKD_DRVR_STATE_PAUSING, /* 5 */ 236 SKD_DRVR_STATE_PAUSED, /* 6 */ 237 SKD_DRVR_STATE_DRAINING_TIMEOUT, /* 7 */ 238 SKD_DRVR_STATE_RESTARTING, /* 8 */ 239 SKD_DRVR_STATE_RESUMING, /* 9 */ 240 SKD_DRVR_STATE_STOPPING, /* 10 when driver is unloading */ 241 SKD_DRVR_STATE_FAULT, /* 11 */ 242 SKD_DRVR_STATE_DISAPPEARED, /* 12 */ 243 SKD_DRVR_STATE_PROTOCOL_MISMATCH, /* 13 */ 244 SKD_DRVR_STATE_BUSY_ERASE, /* 14 */ 245 SKD_DRVR_STATE_BUSY_SANITIZE, /* 15 */ 246 SKD_DRVR_STATE_BUSY_IMMINENT, /* 16 */ 247 SKD_DRVR_STATE_WAIT_BOOT, /* 17 */ 248 SKD_DRVR_STATE_SYNCING /* 18 */ 249 }; 250 251 #define SKD_WAIT_BOOT_TO 90u 252 #define SKD_STARTING_TO 248u 253 254 enum skd_req_state { 255 SKD_REQ_STATE_IDLE, 256 SKD_REQ_STATE_SETUP, 257 SKD_REQ_STATE_BUSY, 258 SKD_REQ_STATE_COMPLETED, 259 SKD_REQ_STATE_TIMEOUT, 260 SKD_REQ_STATE_ABORTED, 261 }; 262 263 enum skd_fit_msg_state { 264 SKD_MSG_STATE_IDLE, 265 SKD_MSG_STATE_BUSY, 266 }; 267 268 enum skd_check_status_action { 269 SKD_CHECK_STATUS_REPORT_GOOD, 270 SKD_CHECK_STATUS_REPORT_SMART_ALERT, 271 SKD_CHECK_STATUS_REQUEUE_REQUEST, 272 SKD_CHECK_STATUS_REPORT_ERROR, 273 SKD_CHECK_STATUS_BUSY_IMMINENT, 274 }; 275 276 /* NOTE: mbu_t users should name this field "mbu". */ 277 typedef union { 278 uint8_t *mb8; 279 uint64_t *mb64; 280 } mbu_t; 281 #define msg_buf mbu.mb8 282 #define msg_buf64 mbu.mb64 283 284 struct skd_fitmsg_context { 285 enum skd_fit_msg_state state; 286 struct skd_fitmsg_context *next; 287 uint32_t id; 288 uint16_t outstanding; 289 uint32_t length; 290 uint32_t offset; 291 mbu_t mbu; /* msg_buf & msg_buf64 */ 292 dma_mem_t mb_dma_address; 293 }; 294 295 struct skd_request_context { 296 enum skd_req_state state; 297 struct skd_request_context *next; 298 uint16_t did_complete; 299 uint16_t id; 300 uint32_t fitmsg_id; 301 struct skd_buf_private *pbuf; 302 uint32_t timeout_stamp; 303 uint8_t sg_data_dir; 304 uint32_t n_sg; 305 ddi_dma_handle_t io_dma_handle; 306 struct fit_sg_descriptor *sksg_list; 307 dma_mem_t sksg_dma_address; 308 struct fit_completion_entry_v1 completion; 309 struct fit_comp_error_info err_info; 310 int total_sg_bcount; 311 }; 312 313 #define SKD_DATA_DIR_HOST_TO_CARD 1 314 #define SKD_DATA_DIR_CARD_TO_HOST 2 315 316 struct skd_special_context { 317 struct skd_request_context req; 318 uint8_t orphaned; 319 uint32_t sg_byte_count; 320 void *data_buf; 321 dma_mem_t db_dma_address; 322 mbu_t mbu; /* msg_buf & msg_buf64 */ 323 dma_mem_t mb_dma_address; 324 int io_pending; 325 }; 326 327 typedef struct skd_buf_private { 328 SIMPLEQ_ENTRY(skd_buf_private) sq; 329 struct skd_request_context *skreq; 330 bd_xfer_t *x_xfer; 331 int dir; 332 } skd_buf_private_t; 333 334 SIMPLEQ_HEAD(waitqueue, skd_buf_private); 335 336 typedef struct skd_device skd_device_t; 337 338 struct skd_device { 339 int irq_type; 340 int gendisk_on; 341 int sync_done; 342 343 char name[32]; 344 345 enum skd_drvr_state state; 346 uint32_t drive_state; 347 348 uint32_t queue_depth_busy; 349 uint32_t queue_depth_limit; 350 uint32_t queue_depth_lowat; 351 uint32_t soft_queue_depth_limit; 352 uint32_t hard_queue_depth_limit; 353 354 uint32_t num_fitmsg_context; 355 uint32_t num_req_context; 356 357 uint32_t timeout_slot[SKD_N_TIMEOUT_SLOT]; 358 uint32_t timeout_stamp; 359 360 struct skd_fitmsg_context *skmsg_free_list; 361 struct skd_fitmsg_context *skmsg_table; 362 363 struct skd_request_context *skreq_free_list; 364 struct skd_request_context *skreq_table; 365 struct skd_special_context internal_skspcl; 366 367 uint64_t read_cap_last_lba; 368 uint32_t read_cap_blocksize; 369 int read_cap_is_valid; 370 int inquiry_is_valid; 371 char inq_serial_num[13]; /* 12 chars plus null term */ 372 char inq_vendor_id[9]; 373 char inq_product_id[17]; 374 char inq_product_rev[5]; 375 char id_str[128]; /* holds a composite name (pci + sernum) */ 376 377 uint8_t skcomp_cycle; 378 uint32_t skcomp_ix; 379 struct fit_completion_entry_v1 *skcomp_table; 380 struct fit_comp_error_info *skerr_table; 381 dma_mem_t cq_dma_address; 382 383 uint32_t timer_active; 384 uint32_t timer_countdown; 385 uint32_t timer_substate; 386 387 int sgs_per_request; 388 uint32_t last_mtd; 389 390 uint32_t proto_ver; 391 392 int dbg_level; 393 394 uint32_t timo_slot; 395 396 ddi_acc_handle_t pci_handle; 397 ddi_acc_handle_t iobase_handle; 398 ddi_acc_handle_t iomap_handle; 399 caddr_t iobase; 400 caddr_t iomap_iobase; 401 402 ddi_acc_handle_t dev_handle; 403 caddr_t dev_iobase; 404 int dev_memsize; 405 406 char *pathname; 407 408 dev_info_t *dip; 409 410 int instance; 411 uint16_t vendor_id; 412 uint16_t device_id; 413 414 kmutex_t skd_lock_mutex; 415 kmutex_t skd_intr_mutex; 416 kmutex_t skd_fit_mutex; 417 418 uint32_t flags; 419 420 #ifdef SKD_PM 421 uint8_t power_level; 422 #endif 423 424 /* AIF (Advanced Interrupt Framework) support */ 425 ddi_intr_handle_t *htable; 426 uint32_t hsize; 427 int32_t intr_cnt; 428 uint32_t intr_pri; 429 int32_t intr_cap; 430 431 uint64_t Nblocks; 432 433 ddi_iblock_cookie_t iblock_cookie; 434 435 int n_req; 436 uint32_t progress; 437 uint64_t intr_cntr; 438 uint64_t fitmsg_sent1; 439 uint64_t fitmsg_sent2; 440 uint64_t active_cmds; 441 442 kmutex_t skd_internalio_mutex; 443 kcondvar_t cv_waitq; 444 445 kmutex_t waitqueue_mutex; 446 struct waitqueue waitqueue; 447 int disks_initialized; 448 449 ddi_devid_t s1120_devid; 450 char devid_str[80]; 451 452 uint32_t d_blkshift; 453 454 int attached; 455 456 int ios_queued; 457 int ios_started; 458 int ios_completed; 459 int ios_errors; 460 int iodone_wioc; 461 int iodone_wnioc; 462 int iodone_wdebug; 463 int iodone_unknown; 464 465 bd_handle_t s_bdh; 466 int bd_attached; 467 468 #ifdef USE_SKE_EMULATOR 469 ske_device_t *ske_handle; 470 #endif 471 472 timeout_id_t skd_timer_timeout_id; 473 }; 474 475 static void skd_disable_interrupts(struct skd_device *skdev); 476 static void skd_isr_completion_posted(struct skd_device *skdev); 477 static void skd_recover_requests(struct skd_device *skdev); 478 static void skd_log_skdev(struct skd_device *skdev, const char *event); 479 static void skd_restart_device(struct skd_device *skdev); 480 static void skd_destruct(struct skd_device *skdev); 481 static int skd_unquiesce_dev(struct skd_device *skdev); 482 static void skd_send_special_fitmsg(struct skd_device *skdev, 483 struct skd_special_context *skspcl); 484 static void skd_end_request(struct skd_device *skdev, 485 struct skd_request_context *skreq, int error); 486 static void skd_log_skmsg(struct skd_device *skdev, 487 struct skd_fitmsg_context *skmsg, const char *event); 488 static void skd_log_skreq(struct skd_device *skdev, 489 struct skd_request_context *skreq, const char *event); 490 static void skd_send_fitmsg(struct skd_device *skdev, 491 struct skd_fitmsg_context *skmsg); 492 493 static const char *skd_drive_state_to_str(int state); 494 static const char *skd_skdev_state_to_str(enum skd_drvr_state state); 495 496 #endif /* _SKD_H */ 497