1 /* 2 * Copyright 2008 Sun Microsystems, Inc. All rights reserved. 3 * Use is subject to license terms. 4 */ 5 6 /* 7 * Copyright (c) 2005, 2006 Damien Bergamini <damien.bergamini@free.fr> 8 * Copyright (c) 2006 Niall O'Higgins <niallo@openbsd.org> 9 * 10 * Permission to use, copy, modify, and distribute this software for any 11 * purpose with or without fee is hereby granted, provided that the above 12 * copyright notice and this permission notice appear in all copies. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 15 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 16 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 17 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 18 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 19 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 20 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 21 */ 22 #ifndef _RUM_REG_H 23 #define _RUM_REG_H 24 25 #ifdef __cplusplus 26 extern "C" { 27 #endif 28 29 #define RT2573_NOISE_FLOOR -95 30 31 #define RT2573_TX_DESC_SIZE (sizeof (struct rum_tx_desc)) 32 #define RT2573_RX_DESC_SIZE (sizeof (struct rum_rx_desc)) 33 34 #define RT2573_CONFIG_NO 1 35 #define RT2573_IFACE_INDEX 0 36 37 #define RT2573_MCU_CNTL 0x01 38 #define RT2573_WRITE_MAC 0x02 39 #define RT2573_READ_MAC 0x03 40 #define RT2573_WRITE_MULTI_MAC 0x06 41 #define RT2573_READ_MULTI_MAC 0x07 42 #define RT2573_READ_EEPROM 0x09 43 #define RT2573_WRITE_LED 0x0a 44 45 /* 46 * Control and status registers. 47 */ 48 #define RT2573_AIFSN_CSR 0x0400 49 #define RT2573_CWMIN_CSR 0x0404 50 #define RT2573_CWMAX_CSR 0x0408 51 #define RT2573_MCU_CODE_BASE 0x0800 52 #define RT2573_HW_BEACON_BASE0 0x2400 53 #define RT2573_MAC_CSR0 0x3000 54 #define RT2573_MAC_CSR1 0x3004 55 #define RT2573_MAC_CSR2 0x3008 56 #define RT2573_MAC_CSR3 0x300c 57 #define RT2573_MAC_CSR4 0x3010 58 #define RT2573_MAC_CSR5 0x3014 59 #define RT2573_MAC_CSR6 0x3018 60 #define RT2573_MAC_CSR7 0x301c 61 #define RT2573_MAC_CSR8 0x3020 62 #define RT2573_MAC_CSR9 0x3024 63 #define RT2573_MAC_CSR10 0x3028 64 #define RT2573_MAC_CSR11 0x302c 65 #define RT2573_MAC_CSR12 0x3030 66 #define RT2573_MAC_CSR13 0x3034 67 #define RT2573_MAC_CSR14 0x3038 68 #define RT2573_MAC_CSR15 0x303c 69 #define RT2573_TXRX_CSR0 0x3040 70 #define RT2573_TXRX_CSR1 0x3044 71 #define RT2573_TXRX_CSR2 0x3048 72 #define RT2573_TXRX_CSR3 0x304c 73 #define RT2573_TXRX_CSR4 0x3050 74 #define RT2573_TXRX_CSR5 0x3054 75 #define RT2573_TXRX_CSR6 0x3058 76 #define RT2573_TXRX_CSR7 0x305c 77 #define RT2573_TXRX_CSR8 0x3060 78 #define RT2573_TXRX_CSR9 0x3064 79 #define RT2573_TXRX_CSR10 0x3068 80 #define RT2573_TXRX_CSR11 0x306c 81 #define RT2573_TXRX_CSR12 0x3070 82 #define RT2573_TXRX_CSR13 0x3074 83 #define RT2573_TXRX_CSR14 0x3078 84 #define RT2573_TXRX_CSR15 0x307c 85 #define RT2573_PHY_CSR0 0x3080 86 #define RT2573_PHY_CSR1 0x3084 87 #define RT2573_PHY_CSR2 0x3088 88 #define RT2573_PHY_CSR3 0x308c 89 #define RT2573_PHY_CSR4 0x3090 90 #define RT2573_PHY_CSR5 0x3094 91 #define RT2573_PHY_CSR6 0x3098 92 #define RT2573_PHY_CSR7 0x309c 93 #define RT2573_SEC_CSR0 0x30a0 94 #define RT2573_SEC_CSR1 0x30a4 95 #define RT2573_SEC_CSR2 0x30a8 96 #define RT2573_SEC_CSR3 0x30ac 97 #define RT2573_SEC_CSR4 0x30b0 98 #define RT2573_SEC_CSR5 0x30b4 99 #define RT2573_STA_CSR0 0x30c0 100 #define RT2573_STA_CSR1 0x30c4 101 #define RT2573_STA_CSR2 0x30c8 102 #define RT2573_STA_CSR3 0x30cc 103 #define RT2573_STA_CSR4 0x30d0 104 #define RT2573_STA_CSR5 0x30d4 105 106 107 /* possible flags for register RT2573_MAC_CSR1 */ 108 #define RT2573_RESET_ASIC (1 << 0) 109 #define RT2573_RESET_BBP (1 << 1) 110 #define RT2573_HOST_READY (1 << 2) 111 112 /* possible flags for register MAC_CSR5 */ 113 #define RT2573_ONE_BSSID 3 114 115 /* possible flags for register TXRX_CSR0 */ 116 /* Tx filter flags are in the low 16 bits */ 117 #define RT2573_AUTO_TX_SEQ (1 << 15) 118 /* Rx filter flags are in the high 16 bits */ 119 #define RT2573_DISABLE_RX (1 << 16) 120 #define RT2573_DROP_CRC_ERROR (1 << 17) 121 #define RT2573_DROP_PHY_ERROR (1 << 18) 122 #define RT2573_DROP_CTL (1 << 19) 123 #define RT2573_DROP_NOT_TO_ME (1 << 20) 124 #define RT2573_DROP_TODS (1 << 21) 125 #define RT2573_DROP_VER_ERROR (1 << 22) 126 #define RT2573_DROP_MULTICAST (1 << 23) 127 #define RT2573_DROP_BROADCAST (1 << 24) 128 #define RT2573_DROP_ACKCTS (1 << 25) 129 130 /* possible flags for register TXRX_CSR4 */ 131 #define RT2573_SHORT_PREAMBLE (1 << 18) 132 #define RT2573_MRR_ENABLED (1 << 19) 133 #define RT2573_MRR_CCK_FALLBACK (1 << 22) 134 135 /* possible flags for register TXRX_CSR9 */ 136 #define RT2573_TSF_TICKING (1 << 16) 137 #define RT2573_TSF_MODE(x) (((x) & 0x3) << 17) 138 /* TBTT stands for Target Beacon Transmission Time */ 139 #define RT2573_ENABLE_TBTT (1 << 19) 140 #define RT2573_GENERATE_BEACON (1 << 20) 141 142 /* possible flags for register PHY_CSR0 */ 143 #define RT2573_PA_PE_2GHZ (1 << 16) 144 #define RT2573_PA_PE_5GHZ (1 << 17) 145 146 /* possible flags for register PHY_CSR3 */ 147 #define RT2573_BBP_READ (1 << 15) 148 #define RT2573_BBP_BUSY (1 << 16) 149 /* possible flags for register PHY_CSR4 */ 150 #define RT2573_RF_20BIT (20 << 24) 151 #define RT2573_RF_BUSY ((uint32_t)1 << 31) 152 153 /* LED values */ 154 #define RT2573_LED_RADIO (1 << 8) 155 #define RT2573_LED_G (1 << 9) 156 #define RT2573_LED_A (1 << 10) 157 #define RT2573_LED_ON 0x1e1e 158 #define RT2573_LED_OFF 0x0 159 160 #define RT2573_MCU_RUN (1 << 3) 161 162 #define RT2573_SMART_MODE (1 << 0) 163 164 #define RT2573_BBPR94_DEFAULT 6 165 166 #define RT2573_BBP_WRITE (1 << 15) 167 168 /* dual-band RF */ 169 #define RT2573_RF_5226 1 170 #define RT2573_RF_5225 3 171 /* single-band RF */ 172 #define RT2573_RF_2528 2 173 #define RT2573_RF_2527 4 174 175 #define RT2573_BBP_VERSION 0 176 177 #pragma pack(1) 178 struct rum_tx_desc { 179 uint32_t flags; 180 #define RT2573_TX_BURST (1 << 0) 181 #define RT2573_TX_VALID (1 << 1) 182 #define RT2573_TX_MORE_FRAG (1 << 2) 183 #define RT2573_TX_NEED_ACK (1 << 3) 184 #define RT2573_TX_TIMESTAMP (1 << 4) 185 #define RT2573_TX_OFDM (1 << 5) 186 #define RT2573_TX_IFS_SIFS (1 << 6) 187 #define RT2573_TX_LONG_RETRY (1 << 7) 188 189 uint16_t wme; 190 #define RT2573_QID(v) (v) 191 #define RT2573_AIFSN(v) ((v) << 4) 192 #define RT2573_LOGCWMIN(v) ((v) << 8) 193 #define RT2573_LOGCWMAX(v) ((v) << 12) 194 195 uint16_t xflags; 196 #define RT2573_TX_HWSEQ (1 << 12) 197 198 uint8_t plcp_signal; 199 uint8_t plcp_service; 200 #define RT2573_PLCP_LENGEXT 0x80 201 202 uint8_t plcp_length_lo; 203 uint8_t plcp_length_hi; 204 205 uint32_t iv; 206 uint32_t eiv; 207 208 uint8_t offset; 209 uint8_t qid; 210 uint8_t txpower; 211 #define RT2573_DEFAULT_TXPOWER 0 212 213 uint8_t reserved; 214 }; 215 #pragma pack() 216 217 #pragma pack(1) 218 struct rum_rx_desc { 219 uint32_t flags; 220 #define RT2573_RX_BUSY (1 << 0) 221 #define RT2573_RX_DROP (1 << 1) 222 #define RT2573_RX_CRC_ERROR (1 << 6) 223 #define RT2573_RX_OFDM (1 << 7) 224 225 uint8_t rate; 226 uint8_t rssi; 227 uint8_t reserved1; 228 uint8_t offset; 229 uint32_t iv; 230 uint32_t eiv; 231 uint32_t reserved2[2]; 232 }; 233 #pragma pack() 234 235 #define RT2573_RF1 0 236 #define RT2573_RF2 2 237 #define RT2573_RF3 1 238 #define RT2573_RF4 3 239 240 #define RT2573_EEPROM_MACBBP 0x0000 241 #define RT2573_EEPROM_ADDRESS 0x0004 242 #define RT2573_EEPROM_ANTENNA 0x0020 243 #define RT2573_EEPROM_CONFIG2 0x0022 244 #define RT2573_EEPROM_BBP_BASE 0x0026 245 #define RT2573_EEPROM_TXPOWER 0x0046 246 #define RT2573_EEPROM_FREQ_OFFSET 0x005e 247 #define RT2573_EEPROM_RSSI_2GHZ_OFFSET 0x009a 248 #define RT2573_EEPROM_RSSI_5GHZ_OFFSET 0x009c 249 250 #ifdef __cplusplus 251 } 252 #endif 253 254 #endif /* _RUM_REG_H */ 255