xref: /titanic_41/usr/src/uts/common/io/rtw/max2820reg.h (revision f127cb91970601c2695eead0ee127f1cac48bb7a)
1 /*
2  * Copyright 2007 Sun Microsystems, Inc.  All rights reserved.
3  * Use is subject to license terms.
4  */
5 
6 /*
7  * Copyright (c) 2004 David Young.  All rights reserved.
8  *
9  * This code was written by David Young.
10  *
11  * Redistribution and use in source and binary forms, with or without
12  * modification, are permitted provided that the following conditions
13  * are met:
14  * 1. Redistributions of source code must retain the above copyright
15  *    notice, this list of conditions and the following disclaimer.
16  * 2. Redistributions in binary form must reproduce the above copyright
17  *    notice, this list of conditions and the following disclaimer in the
18  *    documentation and/or other materials provided with the distribution.
19  * 3. Neither the name of the author nor the names of any co-contributors
20  *    may be used to endorse or promote products derived from this software
21  *    without specific prior written permission.
22  *
23  * THIS SOFTWARE IS PROVIDED BY David Young ``AS IS'' AND ANY
24  * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
25  * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
26  * PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL David
27  * Young BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
28  * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
29  * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
30  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
31  * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
32  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
33  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
34  * OF SUCH DAMAGE.
35  */
36 
37 #pragma ident	"%Z%%M%	%I%	%E% SMI"
38 
39 #ifndef _MAX2820REG_H_
40 #define	_MAX2820REG_H_
41 
42 /*
43  * Serial bus format for Maxim MAX2820/MAX2820A/MAX2821/MAX2821A
44  * 2.4GHz 802.11b Zero-IF Transceivers
45  */
46 #define	MAX2820_TWI_ADDR_MASK	BITS(15, 12)
47 #define	MAX2820_TWI_DATA_MASK	BITS(11, 0)
48 
49 /*
50  * Registers for Maxim MAX2820/MAX2820A/MAX2821/MAX2821A 2.4GHz
51  * 802.11b Zero-IF Transceivers
52  */
53 #define	MAX2820_TEST		0		/* Test Register */
54 #define	MAX2820_TEST_DEFAULT	BITS(2, 0)	/* Always set to this value. */
55 
56 #define	MAX2820_ENABLE		1		/* Block-Enable Register */
57 #define	MAX2820_ENABLE_RSVD1	BIT(11)		/* reserved */
58 /*
59  * Transmit Baseband Filters Enable
60  * PAB_EN = SHDNB && (MAX2820_ENABLE_PAB || TX_ON)
61  */
62 #define	MAX2820_ENABLE_PAB	BIT(10)
63 /*
64  * Transmit Baseband Filters Enable
65  * TXFLT_EN = SHDNB && (MAX2820_ENABLE_TXFLT || TX_ON)
66  */
67 #define	MAX2820_ENABLE_TXFLT	BIT(9)
68 /*
69  * Tx Upconverter, VGA, and Driver Amp Enable
70  * TXUVD_EN = SHDNB && (MAX2820_ENABLE_TXUVD || TX_ON)
71  */
72 #define	MAX2820_ENABLE_TXUVD	BIT(8)
73 /*
74  * Receive Detector Enable
75  * DET_EN = SHDNB && (MAX2820_ENABLE_DET || RX_ON)
76  */
77 #define	MAX2820_ENABLE_DET	BIT(7)
78 /*
79  * Rx Downconverter, Filters, and AGC Amps Enable
80  * RXDFA_EN = SHDNB && (MAX2820_ENABLE_RXDFA || RX_ON)
81  */
82 #define	MAX2820_ENABLE_RXDFA	BIT(6)
83 /*
84  * Receive LNA Enable
85  * AT_EN = SHDNB && (MAX2820_ENABLE_RXLNA || RX_ON)
86  */
87 #define	MAX2820_ENABLE_RXLNA	BIT(5)
88 /*
89  * Auto-tuner Enable
90  * AT_EN = SHDNB && (MAX2820_ENABLE_AT || RX_ON || TX_ON)
91  */
92 #define	MAX2820_ENABLE_AT	BIT(4)
93 /*
94  * PLL Charge-Pump Enable
95  * CP_EN = SHDNB && MAX2820_ENABLE_CP
96  */
97 #define	MAX2820_ENABLE_CP	BIT(3)
98 /*
99  * PLL Enable
100  * PLL_EN = SHDNB && MAX2820_ENABLE_PLL
101  */
102 #define	MAX2820_ENABLE_PLL	BIT(2)
103 /*
104  * VCO Enable
105  * VCO_EN = SHDNB && MAX2820_ENABLE_VCO
106  */
107 #define	MAX2820_ENABLE_VCO	BIT(1)
108 #define	MAX2820_ENABLE_RSVD0	BIT(0)		/* reserved */
109 #define	MAX2820_ENABLE_DEFAULT \
110 	(MAX2820_ENABLE_AT|MAX2820_ENABLE_CP|\
111 	MAX2820_ENABLE_PLL|MAX2820_ENABLE_VCO)
112 
113 #define	MAX2820_SYNTH		2	/* Synthesizer Register */
114 #define	MAX2820_SYNTH_RSVD0	BITS(11, 7)	/* reserved */
115 /*
116  * Charge-Pump Current Select
117  * 0 = +/-1mA
118  * 1 = +/-2mA
119  */
120 #define	MAX2820_SYNTH_ICP	BIT(6)
121 /*
122  * Reference Frequency Divider
123  * 0 = 22MHz
124  * 1 = 44MHz
125  */
126 #define	MAX2820_SYNTH_R_MASK	BITS(5, 0)
127 #define	MAX2820_SYNTH_R_22MHZ	LSHIFT(0, MAX2820_SYNTH_R_MASK)
128 #define	MAX2820_SYNTH_R_44MHZ	LSHIFT(1, MAX2820_SYNTH_R_MASK)
129 #define	MAX2820_SYNTH_ICP_DEFAULT	MAX2820_SYNTH_ICP
130 #define	MAX2820_SYNTH_R_DEFAULT		LSHIFT(0, MAX2820_SYNTH_R_MASK)
131 
132 #define	MAX2820_CHANNEL		3	/* Channel Frequency Register */
133 #define	MAX2820_CHANNEL_RSVD	BITS(11, 7)	/* reserved */
134 /*
135  * Channel Frequency Select
136  * fLO = 2400MHz + CF * 1MHz
137  */
138 #define	MAX2820_CHANNEL_CF_MASK	BITS(6, 0)
139 #define	MAX2820_CHANNEL_RSVD_DEFAULT	LSHIFT(0, MAX2820_CHANNEL_RSVD)
140 #define	MAX2820_CHANNEL_CF_DEFAULT	LSHIFT(37, MAX2820_CHANNEL_CF_MASK)
141 
142 /*
143  * Receiver Settings Register
144  * MAX2820/MAX2821
145  */
146 #define	MAX2820_RECEIVE		4
147 /*
148  * VGA DC Offset Nulling Parameter 2
149  */
150 #define	MAX2820_RECEIVE_2C_MASK	BITS(11, 9)
151 /*
152  * VGA DC Offset Nulling Parameter 1
153  */
154 #define	MAX2820_RECEIVE_1C_MASK	BITS(8, 6)
155 /*
156  * Rx Level Detector Midpoint
157  * Select
158  * 11, 01 = 50.2mVp
159  * 10     = 70.9mVp
160  * 00     = 35.5mVp
161  */
162 #define	MAX2820_RECEIVE_DL_MASK	BITS(5, 4)
163 /*
164  * Special Function Select
165  * 0 = OFF
166  * 1 = ON
167  */
168 #define	MAX2820_RECEIVE_SF	BIT(3)
169 /*
170  * Receive Filter -3dB Frequency
171  * Select (all frequencies are
172  * approximate)
173  */
174 #define	MAX2820_RECEIVE_BW_MASK	BITS(2, 0)
175 /* 8.5MHz */
176 #define	MAX2820_RECEIVE_BW_8_5MHZ	LSHIFT(0, MAX2820_RECEIVE_BW_MASK)
177 #define	MAX2820_RECEIVE_BW_8MHZ		LSHIFT(1, MAX2820_RECEIVE_BW_MASK)
178 #define	MAX2820_RECEIVE_BW_7_5MHZ	LSHIFT(2, MAX2820_RECEIVE_BW_MASK)
179 #define	MAX2820_RECEIVE_BW_7MHZ		LSHIFT(3, MAX2820_RECEIVE_BW_MASK)
180 #define	MAX2820_RECEIVE_BW_6_5MHZ	LSHIFT(4, MAX2820_RECEIVE_BW_MASK)
181 #define	MAX2820_RECEIVE_BW_6MHZ		LSHIFT(5, MAX2820_RECEIVE_BW_MASK)
182 #define	MAX2820_RECEIVE_2C_DEFAULT	LSHIFT(7, MAX2820_RECEIVE_2C_MASK)
183 #define	MAX2820_RECEIVE_1C_DEFAULT	LSHIFT(7, MAX2820_RECEIVE_1C_MASK)
184 #define	MAX2820_RECEIVE_DL_DEFAULT	LSHIFT(1, MAX2820_RECEIVE_DL_MASK)
185 #define	MAX2820_RECEIVE_SF_DEFAULT	LSHIFT(0, MAX2820_RECEIVE_SF)
186 #define	MAX2820_RECEIVE_BW_DEFAULT	MAX2820_RECEIVE_BW_7_5MHZ
187 
188 /*
189  * Receiver Settings Register,
190  * MAX2820A/MAX2821A
191  */
192 #define	MAX2820A_RECEIVE	4
193 /* VGA DC Offset Nulling Parameter 2 */
194 #define	MAX2820A_RECEIVE_2C_MASK	BITS(11, 9)
195 #define	MAX2820A_RECEIVE_2C_DEFAULT	LSHIFT(7, MAX2820A_RECEIVE_2C_MASK)
196 /* VGA DC Offset Nulling Parameter 1 */
197 #define	MAX2820A_RECEIVE_1C_MASK	BITS(8, 6)
198 #define	MAX2820A_RECEIVE_1C_DEFAULT	LSHIFT(7, MAX2820A_RECEIVE_1C_MASK)
199 #define	MAX2820A_RECEIVE_RSVD0_MASK	BITS(5, 3)
200 #define	MAX2820A_RECEIVE_RSVD0_DEFAULT	LSHIFT(2, MAX2820A_RECEIVE_RSVD0_MASK)
201 #define	MAX2820A_RECEIVE_RSVD1_MASK	BITS(2, 0)
202 #define	MAX2820A_RECEIVE_RSVD1_DEFAULT	LSHIFT(2, MAX2820_RECEIVE_RSVD1_MASK)
203 
204 #define	MAX2820_TRANSMIT	5	/* Transmitter Settings Reg. */
205 #define	MAX2820_TRANSMIT_RSVD_MASK	BITS(11, 4)	/* reserved */
206 /*
207  * PA Bias Select
208  * 15 = Highest
209  * 0 = Lowest
210  */
211 #define	MAX2820_TRANSMIT_PA_MASK	BITS(3, 0)
212 #define	MAX2820_TRANSMIT_PA_DEFAULT	LSHIFT(0, MAX2820_TRANSMIT_PA_MASK)
213 
214 #endif /* _MAX2820REG_H_ */
215