xref: /titanic_41/usr/src/uts/common/io/ral/rt2560_var.h (revision 1a1a84a324206b6b1f5f704ab166c4ebf78aed76)
1 /*
2  * Copyright 2008 Sun Microsystems, Inc.  All rights reserved.
3  * Use is subject to license terms.
4  */
5 
6 /*
7  * Copyright (c) 2005, 2006
8  *	Damien Bergamini <damien.bergamini@free.fr>
9  *
10  * Permission to use, copy, modify, and distribute this software for any
11  * purpose with or without fee is hereby granted, provided that the above
12  * copyright notice and this permission notice appear in all copies.
13  *
14  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
15  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
16  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
17  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
18  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
19  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
20  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
21  */
22 #ifndef	_RT2560_VAR_H
23 #define	_RT2560_VAR_H
24 
25 #ifdef __cplusplus
26 extern "C" {
27 #endif
28 
29 #define	RAL_FLAG_RUNNING	(1<<0)
30 #define	RAL_FLAG_SUSPENDING	(1<<1)
31 
32 #define	RAL_RCR_PROMISC		(1<<0)
33 #define	RAL_RCR_MULTI		(2<<0)
34 
35 #ifndef	DDI_NT_NET_WIFI
36 #define	DDI_NT_NET_WIFI		"ddi_network:wifi"
37 #endif
38 
39 /*
40  * Bit flags in the ral_dbg_flags
41  */
42 #define	RAL_DBG_MSG		0x000001
43 #define	RAL_DBG_HW		0x000002
44 #define	RAL_DBG_DMA		0x000004
45 #define	RAL_DBG_INTR		0x000008
46 #define	RAL_DBG_TX		0x000010
47 #define	RAL_DBG_RX		0x000020
48 #define	RAL_DBG_CHAN		0x000040
49 #define	RAL_DBG_IOCTL		0x000080
50 #define	RAL_DBG_MGMT		0x000100
51 #define	RAL_DBG_STAT		0x000200
52 #define	RAL_DBG_GLD		0x000400
53 #define	RAL_DBG_80211		0x000800
54 #define	RAL_DBG_STATE		0x001000
55 #define	RAL_DBG_RXPACKET	0x002000
56 #define	RAL_DBG_TXPACKET	0x004000
57 #define	RAL_DBG_SUSPEND		0x008000
58 #define	RAL_DBG_ALL		0x00ffff
59 
60 #ifdef DEBUG
61 #define	RAL_DEBUG \
62 	ral_debug
63 #else
64 #define	RAL_DEBUG
65 #endif
66 
67 #define	RT2560_RX_RADIOTAP_PRESENT					\
68 	((1 << IEEE80211_RADIOTAP_TSFT) |				\
69 	(1 << IEEE80211_RADIOTAP_FLAGS) |				\
70 	(1 << IEEE80211_RADIOTAP_RATE) |				\
71 	(1 << IEEE80211_RADIOTAP_CHANNEL) |				\
72 	(1 << IEEE80211_RADIOTAP_ANTENNA) |				\
73 	(1 << IEEE80211_RADIOTAP_DB_ANTSIGNAL))
74 
75 #define	RT2560_TX_RADIOTAP_PRESENT					\
76 	((1 << IEEE80211_RADIOTAP_FLAGS) |				\
77 	(1 << IEEE80211_RADIOTAP_RATE) |				\
78 	(1 << IEEE80211_RADIOTAP_CHANNEL) |				\
79 	(1 << IEEE80211_RADIOTAP_ANTENNA))
80 
81 struct dma_region {
82 	ddi_dma_handle_t	dr_hnd;
83 	ddi_acc_handle_t	dr_acc;
84 	ddi_dma_cookie_t	dr_cookie;
85 	uint_t			dr_ccnt;
86 	uint32_t		dr_pbase;
87 	caddr_t			dr_base;
88 	size_t			dr_size;
89 };
90 
91 struct rt2560_tx_data {
92 	caddr_t			buf;
93 	struct ieee80211_node	*ni;
94 	struct ral_rssdesc	id;
95 };
96 
97 /*
98  * physaddr = dr_desc.dr_pbase
99  * desc = dr_desc.dr_base, desc[i].physaddr = dr_txbuf[i].dr_pbase
100  * data[i]->buf = dr_txbuf[i].dr_bas
101  */
102 struct rt2560_tx_ring {
103 	uint32_t		physaddr;
104 	struct rt2560_tx_desc	*desc;
105 	struct rt2560_tx_data	*data;
106 
107 	struct dma_region	dr_desc;
108 	struct dma_region	*dr_txbuf;
109 
110 	int			count;
111 	int			queued;
112 	int			cur;
113 	int			next;
114 	int			cur_encrypt;
115 	int			next_encrypt;
116 	kmutex_t		tx_lock;
117 };
118 
119 struct rt2560_rx_data {
120 	caddr_t			buf;
121 	int			drop;
122 };
123 
124 struct rt2560_rx_ring {
125 	uint32_t		physaddr;
126 	struct rt2560_rx_desc	*desc;
127 	struct rt2560_rx_data	*data;
128 
129 	struct dma_region	dr_desc;
130 	struct dma_region	*dr_rxbuf;
131 
132 	int			count;
133 	int			cur;
134 	int			next;
135 	int			cur_decrypt;
136 	kmutex_t		rx_lock;
137 };
138 
139 struct rt2560_node {
140 	struct ieee80211_node	ni;
141 	struct ral_rssadapt	rssadapt;
142 };
143 
144 struct rt2560_softc {
145 	struct ieee80211com	sc_ic;
146 	dev_info_t		*sc_dev;
147 
148 	/* ddi i/o handler */
149 	ddi_acc_handle_t	sc_ioh;
150 	caddr_t			sc_rbase;
151 
152 	/* interrupt */
153 	ddi_iblock_cookie_t	sc_iblock;
154 
155 	kmutex_t		sc_genlock;
156 
157 	timeout_id_t		sc_scan_id;
158 	timeout_id_t		sc_rssadapt_id;
159 
160 	enum ieee80211_state	sc_ostate;
161 	timeout_id_t		sc_state_id;
162 
163 	int			sc_tx_timer;
164 
165 	uint32_t		asic_rev;
166 	uint32_t		eeprom_rev;
167 	uint8_t			rf_rev;
168 
169 	struct rt2560_tx_ring	txq;
170 	struct rt2560_tx_ring	prioq;
171 	struct rt2560_rx_ring	rxq;
172 
173 	uint32_t		sc_need_sched;
174 	uint32_t		sc_flags;
175 	uint32_t		sc_rcr;		/* RAL RCR */
176 
177 	uint16_t		sc_cachelsz;
178 	ddi_softintr_t		sc_softint_id;
179 
180 	uint32_t		sc_rx_pend;
181 
182 	uint32_t		rf_regs[4];
183 	uint8_t			txpow[14];
184 
185 	struct {
186 		uint8_t	reg;
187 		uint8_t	val;
188 	}			bbp_prom[16];
189 
190 	int			led_mode;
191 	int			hw_radio;
192 	int			rx_ant;
193 	int			tx_ant;
194 	int			nb_ant;
195 
196 	int			dwelltime;
197 
198 	/* kstats */
199 	uint32_t		sc_tx_nobuf;
200 	uint32_t		sc_rx_nobuf;
201 	uint32_t		sc_tx_err;
202 	uint32_t		sc_rx_err;
203 	uint32_t		sc_tx_retries;
204 
205 	int			(*sc_newstate)(struct ieee80211com *,
206 				    enum ieee80211_state, int);
207 };
208 
209 #define	RAL_IS_RUNNING(_sc)	(((_sc)->sc_flags & RAL_FLAG_RUNNING) && \
210 	!((_sc)->sc_flags & RAL_FLAG_SUSPENDING))
211 #define	RAL_IS_INITED(_sc)	((_sc)->sc_flags & RAL_FLAG_RUNNING)
212 #define	RAL_LOCK(sc)		mutex_enter(&(sc)->sc_genlock)
213 #define	RAL_UNLOCK(sc)		mutex_exit(&(sc)->sc_genlock)
214 
215 #define	MAC2STR(a) (a)[0], (a)[1], (a)[2], (a)[3], (a)[4], (a)[5]
216 #define	MACSTR "%02x:%02x:%02x:%02x:%02x:%02x"
217 
218 #ifdef __cplusplus
219 }
220 #endif
221 
222 #endif /* _RT2560_VAR_H */
223