xref: /titanic_41/usr/src/uts/common/io/nxge/nxge_send.c (revision 26fd77009b17f8c8fb32eb362584cfd635e87ad9)
1 /*
2  * CDDL HEADER START
3  *
4  * The contents of this file are subject to the terms of the
5  * Common Development and Distribution License (the "License").
6  * You may not use this file except in compliance with the License.
7  *
8  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9  * or http://www.opensolaris.org/os/licensing.
10  * See the License for the specific language governing permissions
11  * and limitations under the License.
12  *
13  * When distributing Covered Code, include this CDDL HEADER in each
14  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15  * If applicable, add the following below this CDDL HEADER, with the
16  * fields enclosed by brackets "[]" replaced with your own identifying
17  * information: Portions Copyright [yyyy] [name of copyright owner]
18  *
19  * CDDL HEADER END
20  */
21 /*
22  * Copyright 2009 Sun Microsystems, Inc.  All rights reserved.
23  * Use is subject to license terms.
24  */
25 
26 #include <sys/mac_provider.h>
27 #include <sys/nxge/nxge_impl.h>
28 #include <sys/nxge/nxge_hio.h>
29 #include <npi_tx_wr64.h>
30 
31 /* Software LSO required header files */
32 #include <netinet/tcp.h>
33 #include <inet/ip_impl.h>
34 #include <inet/tcp.h>
35 
36 extern uint64_t mac_pkt_hash(uint_t, mblk_t *mp, uint8_t policy,
37     boolean_t is_outbound);
38 
39 static mblk_t *nxge_lso_eliminate(mblk_t *);
40 static mblk_t *nxge_do_softlso(mblk_t *mp, uint32_t mss);
41 static void nxge_lso_info_get(mblk_t *, uint32_t *, uint32_t *);
42 static void nxge_hcksum_retrieve(mblk_t *,
43     uint32_t *, uint32_t *, uint32_t *,
44     uint32_t *, uint32_t *);
45 static uint32_t nxge_csgen(uint16_t *, int);
46 
47 extern uint32_t		nxge_reclaim_pending;
48 extern uint32_t 	nxge_bcopy_thresh;
49 extern uint32_t 	nxge_dvma_thresh;
50 extern uint32_t 	nxge_dma_stream_thresh;
51 extern uint32_t		nxge_tx_minfree;
52 extern uint32_t		nxge_tx_intr_thres;
53 extern uint32_t		nxge_tx_max_gathers;
54 extern uint32_t		nxge_tx_tiny_pack;
55 extern uint32_t		nxge_tx_use_bcopy;
56 extern nxge_tx_mode_t	nxge_tx_scheme;
57 uint32_t		nxge_lso_kick_cnt = 2;
58 
59 
60 void
61 nxge_tx_ring_task(void *arg)
62 {
63 	p_tx_ring_t	ring = (p_tx_ring_t)arg;
64 
65 	MUTEX_ENTER(&ring->lock);
66 	(void) nxge_txdma_reclaim(ring->nxgep, ring, 0);
67 	MUTEX_EXIT(&ring->lock);
68 
69 	if (!isLDOMguest(ring->nxgep) && !ring->tx_ring_offline)
70 		mac_tx_ring_update(ring->nxgep->mach, ring->tx_ring_handle);
71 #if defined(sun4v)
72 	else {
73 		nxge_hio_data_t *nhd =
74 		    (nxge_hio_data_t *)ring->nxgep->nxge_hw_p->hio;
75 		nx_vio_fp_t *vio = &nhd->hio.vio;
76 
77 		/* Call back vnet. */
78 		if (vio->cb.vio_net_tx_update) {
79 			(*vio->cb.vio_net_tx_update)(ring->nxgep->hio_vr->vhp);
80 		}
81 	}
82 #endif
83 }
84 
85 static void
86 nxge_tx_ring_dispatch(p_tx_ring_t ring)
87 {
88 	/*
89 	 * Kick the ring task to reclaim some buffers.
90 	 */
91 	(void) ddi_taskq_dispatch(ring->taskq,
92 	    nxge_tx_ring_task, (void *)ring, DDI_SLEEP);
93 }
94 
95 mblk_t *
96 nxge_tx_ring_send(void *arg, mblk_t *mp)
97 {
98 	p_nxge_ring_handle_t	nrhp = (p_nxge_ring_handle_t)arg;
99 	p_nxge_t		nxgep;
100 	p_tx_ring_t		tx_ring_p;
101 	int			status, channel;
102 
103 	ASSERT(nrhp != NULL);
104 	nxgep = nrhp->nxgep;
105 	channel = nxgep->pt_config.hw_config.tdc.start + nrhp->index;
106 	tx_ring_p = nxgep->tx_rings->rings[channel];
107 
108 	/*
109 	 * We may be in a transition from offlined DMA to onlined
110 	 * DMA.
111 	 */
112 	if (tx_ring_p == NULL) {
113 		ASSERT(tx_ring_p != NULL);
114 		freemsg(mp);
115 		return ((mblk_t *)NULL);
116 	}
117 
118 	/*
119 	 * Valid DMA?
120 	 */
121 	ASSERT(nxgep == tx_ring_p->nxgep);
122 
123 	/*
124 	 * Make sure DMA is not offlined.
125 	 */
126 	if (isLDOMservice(nxgep) && tx_ring_p->tx_ring_offline) {
127 		ASSERT(!tx_ring_p->tx_ring_offline);
128 		freemsg(mp);
129 		return ((mblk_t *)NULL);
130 	}
131 
132 	/*
133 	 * Transmit the packet.
134 	 */
135 	status = nxge_start(nxgep, tx_ring_p, mp);
136 	if (status) {
137 		nxge_tx_ring_dispatch(tx_ring_p);
138 		return (mp);
139 	}
140 
141 	return ((mblk_t *)NULL);
142 }
143 
144 #if defined(sun4v)
145 
146 /*
147  * Hashing policy for load balancing over the set of TX rings
148  * available to the driver.
149  */
150 static uint8_t nxge_tx_hash_policy = MAC_PKT_HASH_L4;
151 
152 /*
153  * nxge_m_tx() is needed for Hybrid I/O operation of the vnet in
154  *	the guest domain.  See CR 6778758 for long term solution.
155  *
156  *	The guest domain driver will for now hash the packet
157  *	to pick a DMA channel from the only group it has group 0.
158  */
159 
160 mblk_t *
161 nxge_m_tx(void *arg, mblk_t *mp)
162 {
163 	p_nxge_t		nxgep = (p_nxge_t)arg;
164 	mblk_t			*next;
165 	uint64_t		rindex;
166 	p_tx_ring_t		tx_ring_p;
167 	int			status;
168 
169 	NXGE_DEBUG_MSG((nxgep, TX_CTL, "==> nxge_m_tx"));
170 
171 	/*
172 	 * Hash to pick a ring from Group 0, the only TX group
173 	 * for a guest domain driver.
174 	 */
175 	rindex = mac_pkt_hash(DL_ETHER, mp, nxge_tx_hash_policy, B_TRUE);
176 	rindex = rindex % nxgep->pt_config.tdc_grps[0].max_tdcs;
177 
178 	/*
179 	 * Get the ring handle.
180 	 */
181 	tx_ring_p = nxgep->tx_rings->rings[rindex];
182 
183 	while (mp != NULL) {
184 		next = mp->b_next;
185 		mp->b_next = NULL;
186 
187 		status = nxge_start(nxgep, tx_ring_p, mp);
188 		if (status != 0) {
189 			mp->b_next = next;
190 			nxge_tx_ring_dispatch(tx_ring_p);
191 			return (mp);
192 		}
193 
194 		mp = next;
195 	}
196 
197 	NXGE_DEBUG_MSG((nxgep, TX_CTL, "<== nxge_m_tx"));
198 	return ((mblk_t *)NULL);
199 }
200 
201 #endif
202 
203 int
204 nxge_start(p_nxge_t nxgep, p_tx_ring_t tx_ring_p, p_mblk_t mp)
205 {
206 	int 			dma_status, status = 0;
207 	p_tx_desc_t 		tx_desc_ring_vp;
208 	npi_handle_t		npi_desc_handle;
209 	nxge_os_dma_handle_t 	tx_desc_dma_handle;
210 	p_tx_desc_t 		tx_desc_p;
211 	p_tx_msg_t 		tx_msg_ring;
212 	p_tx_msg_t 		tx_msg_p;
213 	tx_desc_t		tx_desc, *tmp_desc_p;
214 	tx_desc_t		sop_tx_desc, *sop_tx_desc_p;
215 	p_tx_pkt_header_t	hdrp;
216 	tx_pkt_hdr_all_t	tmp_hdrp;
217 	p_tx_pkt_hdr_all_t	pkthdrp;
218 	uint8_t			npads = 0;
219 	uint64_t 		dma_ioaddr;
220 	uint32_t		dma_flags;
221 	int			last_bidx;
222 	uint8_t 		*b_rptr;
223 	caddr_t 		kaddr;
224 	uint32_t		nmblks;
225 	uint32_t		ngathers;
226 	uint32_t		clen;
227 	int 			len;
228 	uint32_t		pkt_len, pack_len, min_len;
229 	uint32_t		bcopy_thresh;
230 	int 			i, cur_index, sop_index;
231 	uint16_t		tail_index;
232 	boolean_t		tail_wrap = B_FALSE;
233 	nxge_dma_common_t	desc_area;
234 	nxge_os_dma_handle_t 	dma_handle;
235 	ddi_dma_cookie_t 	dma_cookie;
236 	npi_handle_t		npi_handle;
237 	p_mblk_t 		nmp;
238 	p_mblk_t		t_mp;
239 	uint32_t 		ncookies;
240 	boolean_t 		good_packet;
241 	boolean_t 		mark_mode = B_FALSE;
242 	p_nxge_stats_t 		statsp;
243 	p_nxge_tx_ring_stats_t tdc_stats;
244 	t_uscalar_t 		start_offset = 0;
245 	t_uscalar_t 		stuff_offset = 0;
246 	t_uscalar_t 		end_offset = 0;
247 	t_uscalar_t 		value = 0;
248 	t_uscalar_t 		cksum_flags = 0;
249 	boolean_t		cksum_on = B_FALSE;
250 	uint32_t		boff = 0;
251 	uint64_t		tot_xfer_len = 0;
252 	boolean_t		header_set = B_FALSE;
253 #ifdef NXGE_DEBUG
254 	p_tx_desc_t 		tx_desc_ring_pp;
255 	p_tx_desc_t 		tx_desc_pp;
256 	tx_desc_t		*save_desc_p;
257 	int			dump_len;
258 	int			sad_len;
259 	uint64_t		sad;
260 	int			xfer_len;
261 	uint32_t		msgsize;
262 #endif
263 	p_mblk_t 		mp_chain = NULL;
264 	boolean_t		is_lso = B_FALSE;
265 	boolean_t		lso_again;
266 	int			cur_index_lso;
267 	p_mblk_t 		nmp_lso_save;
268 	uint32_t		lso_ngathers;
269 	boolean_t		lso_tail_wrap = B_FALSE;
270 
271 	NXGE_DEBUG_MSG((nxgep, TX_CTL,
272 	    "==> nxge_start: tx dma channel %d", tx_ring_p->tdc));
273 	NXGE_DEBUG_MSG((nxgep, TX_CTL,
274 	    "==> nxge_start: Starting tdc %d desc pending %d",
275 	    tx_ring_p->tdc, tx_ring_p->descs_pending));
276 
277 	statsp = nxgep->statsp;
278 
279 	if (!isLDOMguest(nxgep)) {
280 		switch (nxgep->mac.portmode) {
281 		default:
282 			if (nxgep->statsp->port_stats.lb_mode ==
283 			    nxge_lb_normal) {
284 				if (!statsp->mac_stats.link_up) {
285 					freemsg(mp);
286 					NXGE_DEBUG_MSG((nxgep, TX_CTL,
287 					    "==> nxge_start: "
288 					    "link not up"));
289 					goto nxge_start_fail1;
290 				}
291 			}
292 			break;
293 		case PORT_10G_FIBER:
294 			/*
295 			 * For the following modes, check the link status
296 			 * before sending the packet out:
297 			 * nxge_lb_normal,
298 			 * nxge_lb_ext10g,
299 			 * nxge_lb_ext1000,
300 			 * nxge_lb_ext100,
301 			 * nxge_lb_ext10.
302 			 */
303 			if (nxgep->statsp->port_stats.lb_mode <
304 			    nxge_lb_phy10g) {
305 				if (!statsp->mac_stats.link_up) {
306 					freemsg(mp);
307 					NXGE_DEBUG_MSG((nxgep, TX_CTL,
308 					    "==> nxge_start: "
309 					    "link not up"));
310 					goto nxge_start_fail1;
311 				}
312 			}
313 			break;
314 		}
315 	}
316 
317 	if ((!(nxgep->drv_state & STATE_HW_INITIALIZED)) ||
318 	    (nxgep->nxge_mac_state != NXGE_MAC_STARTED)) {
319 		NXGE_DEBUG_MSG((nxgep, TX_CTL,
320 		    "==> nxge_start: hardware not initialized or stopped"));
321 		freemsg(mp);
322 		goto nxge_start_fail1;
323 	}
324 
325 	if (nxgep->soft_lso_enable) {
326 		mp_chain = nxge_lso_eliminate(mp);
327 		NXGE_DEBUG_MSG((nxgep, TX_CTL,
328 		    "==> nxge_start(0): LSO mp $%p mp_chain $%p",
329 		    mp, mp_chain));
330 		if (mp_chain == NULL) {
331 			NXGE_ERROR_MSG((nxgep, TX_CTL,
332 			    "==> nxge_send(0): NULL mp_chain $%p != mp $%p",
333 			    mp_chain, mp));
334 			goto nxge_start_fail1;
335 		}
336 		if (mp_chain != mp) {
337 			NXGE_DEBUG_MSG((nxgep, TX_CTL,
338 			    "==> nxge_send(1): IS LSO mp_chain $%p != mp $%p",
339 			    mp_chain, mp));
340 			is_lso = B_TRUE;
341 			mp = mp_chain;
342 			mp_chain = mp_chain->b_next;
343 			mp->b_next = NULL;
344 		}
345 	}
346 
347 	hcksum_retrieve(mp, NULL, NULL, &start_offset,
348 	    &stuff_offset, &end_offset, &value, &cksum_flags);
349 	if (!NXGE_IS_VLAN_PACKET(mp->b_rptr)) {
350 		start_offset += sizeof (ether_header_t);
351 		stuff_offset += sizeof (ether_header_t);
352 	} else {
353 		start_offset += sizeof (struct ether_vlan_header);
354 		stuff_offset += sizeof (struct ether_vlan_header);
355 	}
356 
357 	if (cksum_flags & HCK_PARTIALCKSUM) {
358 		NXGE_DEBUG_MSG((nxgep, TX_CTL,
359 		    "==> nxge_start: mp $%p len %d "
360 		    "cksum_flags 0x%x (partial checksum) ",
361 		    mp, MBLKL(mp), cksum_flags));
362 		cksum_on = B_TRUE;
363 	}
364 
365 	pkthdrp = (p_tx_pkt_hdr_all_t)&tmp_hdrp;
366 	pkthdrp->reserved = 0;
367 	tmp_hdrp.pkthdr.value = 0;
368 	nxge_fill_tx_hdr(mp, B_FALSE, cksum_on,
369 	    0, 0, pkthdrp,
370 	    start_offset, stuff_offset);
371 
372 	lso_again = B_FALSE;
373 	lso_ngathers = 0;
374 
375 	MUTEX_ENTER(&tx_ring_p->lock);
376 
377 	if (isLDOMservice(nxgep)) {
378 		tx_ring_p->tx_ring_busy = B_TRUE;
379 		if (tx_ring_p->tx_ring_offline) {
380 			freemsg(mp);
381 			tx_ring_p->tx_ring_busy = B_FALSE;
382 			(void) atomic_swap_32(&tx_ring_p->tx_ring_offline,
383 			    NXGE_TX_RING_OFFLINED);
384 			MUTEX_EXIT(&tx_ring_p->lock);
385 			return (status);
386 		}
387 	}
388 
389 	cur_index_lso = tx_ring_p->wr_index;
390 	lso_tail_wrap = tx_ring_p->wr_index_wrap;
391 start_again:
392 	ngathers = 0;
393 	sop_index = tx_ring_p->wr_index;
394 #ifdef	NXGE_DEBUG
395 	if (tx_ring_p->descs_pending) {
396 		NXGE_DEBUG_MSG((nxgep, TX_CTL, "==> nxge_start: "
397 		    "desc pending %d ", tx_ring_p->descs_pending));
398 	}
399 
400 	dump_len = (int)(MBLKL(mp));
401 	dump_len = (dump_len > 128) ? 128: dump_len;
402 
403 	NXGE_DEBUG_MSG((nxgep, TX_CTL,
404 	    "==> nxge_start: tdc %d: dumping ...: b_rptr $%p "
405 	    "(Before header reserve: ORIGINAL LEN %d)",
406 	    tx_ring_p->tdc,
407 	    mp->b_rptr,
408 	    dump_len));
409 
410 	NXGE_DEBUG_MSG((nxgep, TX_CTL, "==> nxge_start: dump packets "
411 	    "(IP ORIGINAL b_rptr $%p): %s", mp->b_rptr,
412 	    nxge_dump_packet((char *)mp->b_rptr, dump_len)));
413 #endif
414 
415 	tdc_stats = tx_ring_p->tdc_stats;
416 	mark_mode = (tx_ring_p->descs_pending &&
417 	    (((int)tx_ring_p->tx_ring_size - (int)tx_ring_p->descs_pending) <
418 	    (int)nxge_tx_minfree));
419 
420 	NXGE_DEBUG_MSG((nxgep, TX_CTL,
421 	    "TX Descriptor ring is channel %d mark mode %d",
422 	    tx_ring_p->tdc, mark_mode));
423 
424 	if ((tx_ring_p->descs_pending + lso_ngathers) >= nxge_reclaim_pending) {
425 		if (!nxge_txdma_reclaim(nxgep, tx_ring_p,
426 		    (nxge_tx_minfree + lso_ngathers))) {
427 			NXGE_DEBUG_MSG((nxgep, TX_CTL,
428 			    "TX Descriptor ring is full: channel %d",
429 			    tx_ring_p->tdc));
430 			NXGE_DEBUG_MSG((nxgep, TX_CTL,
431 			    "TX Descriptor ring is full: channel %d",
432 			    tx_ring_p->tdc));
433 			if (is_lso) {
434 				/*
435 				 * free the current mp and mp_chain if not FULL.
436 				 */
437 				tdc_stats->tx_no_desc++;
438 				NXGE_DEBUG_MSG((nxgep, TX_CTL,
439 				    "LSO packet: TX Descriptor ring is full: "
440 				    "channel %d",
441 				    tx_ring_p->tdc));
442 				goto nxge_start_fail_lso;
443 			} else {
444 				(void) cas32((uint32_t *)&tx_ring_p->queueing,
445 				    0, 1);
446 				tdc_stats->tx_no_desc++;
447 
448 				if (isLDOMservice(nxgep)) {
449 					tx_ring_p->tx_ring_busy = B_FALSE;
450 					if (tx_ring_p->tx_ring_offline) {
451 						(void) atomic_swap_32(
452 						    &tx_ring_p->tx_ring_offline,
453 						    NXGE_TX_RING_OFFLINED);
454 					}
455 				}
456 
457 				MUTEX_EXIT(&tx_ring_p->lock);
458 				status = 1;
459 				goto nxge_start_fail1;
460 			}
461 		}
462 	}
463 
464 	nmp = mp;
465 	i = sop_index = tx_ring_p->wr_index;
466 	nmblks = 0;
467 	ngathers = 0;
468 	pkt_len = 0;
469 	pack_len = 0;
470 	clen = 0;
471 	last_bidx = -1;
472 	good_packet = B_TRUE;
473 
474 	desc_area = tx_ring_p->tdc_desc;
475 	npi_handle = desc_area.npi_handle;
476 	npi_desc_handle.regh = (nxge_os_acc_handle_t)
477 	    DMA_COMMON_ACC_HANDLE(desc_area);
478 	tx_desc_ring_vp = (p_tx_desc_t)DMA_COMMON_VPTR(desc_area);
479 	tx_desc_dma_handle = (nxge_os_dma_handle_t)
480 	    DMA_COMMON_HANDLE(desc_area);
481 	tx_msg_ring = tx_ring_p->tx_msg_ring;
482 
483 	NXGE_DEBUG_MSG((nxgep, TX_CTL, "==> nxge_start: wr_index %d i %d",
484 	    sop_index, i));
485 
486 #ifdef	NXGE_DEBUG
487 	msgsize = msgdsize(nmp);
488 	NXGE_DEBUG_MSG((nxgep, TX_CTL,
489 	    "==> nxge_start(1): wr_index %d i %d msgdsize %d",
490 	    sop_index, i, msgsize));
491 #endif
492 	/*
493 	 * The first 16 bytes of the premapped buffer are reserved
494 	 * for header. No padding will be used.
495 	 */
496 	pkt_len = pack_len = boff = TX_PKT_HEADER_SIZE;
497 	if (nxge_tx_use_bcopy && (nxgep->niu_type != N2_NIU)) {
498 		bcopy_thresh = (nxge_bcopy_thresh - TX_PKT_HEADER_SIZE);
499 	} else {
500 		bcopy_thresh = (TX_BCOPY_SIZE - TX_PKT_HEADER_SIZE);
501 	}
502 	while (nmp) {
503 		good_packet = B_TRUE;
504 		b_rptr = nmp->b_rptr;
505 		len = MBLKL(nmp);
506 		if (len <= 0) {
507 			nmp = nmp->b_cont;
508 			continue;
509 		}
510 		nmblks++;
511 
512 		NXGE_DEBUG_MSG((nxgep, TX_CTL, "==> nxge_start(1): nmblks %d "
513 		    "len %d pkt_len %d pack_len %d",
514 		    nmblks, len, pkt_len, pack_len));
515 		/*
516 		 * Hardware limits the transfer length to 4K for NIU and
517 		 * 4076 (TX_MAX_TRANSFER_LENGTH) for Neptune. But we just
518 		 * use TX_MAX_TRANSFER_LENGTH as the limit for both.
519 		 * If len is longer than the limit, then we break nmp into
520 		 * two chunks: Make the first chunk equal to the limit and
521 		 * the second chunk for the remaining data. If the second
522 		 * chunk is still larger than the limit, then it will be
523 		 * broken into two in the next pass.
524 		 */
525 		if (len > TX_MAX_TRANSFER_LENGTH - TX_PKT_HEADER_SIZE) {
526 			if ((t_mp = dupb(nmp)) != NULL) {
527 				nmp->b_wptr = nmp->b_rptr +
528 				    (TX_MAX_TRANSFER_LENGTH
529 				    - TX_PKT_HEADER_SIZE);
530 				t_mp->b_rptr = nmp->b_wptr;
531 				t_mp->b_cont = nmp->b_cont;
532 				nmp->b_cont = t_mp;
533 				len = MBLKL(nmp);
534 			} else {
535 				if (is_lso) {
536 					NXGE_DEBUG_MSG((nxgep, TX_CTL,
537 					    "LSO packet: dupb failed: "
538 					    "channel %d",
539 					    tx_ring_p->tdc));
540 					mp = nmp;
541 					goto nxge_start_fail_lso;
542 				} else {
543 					good_packet = B_FALSE;
544 					goto nxge_start_fail2;
545 				}
546 			}
547 		}
548 		tx_desc.value = 0;
549 		tx_desc_p = &tx_desc_ring_vp[i];
550 #ifdef	NXGE_DEBUG
551 		tx_desc_pp = &tx_desc_ring_pp[i];
552 #endif
553 		tx_msg_p = &tx_msg_ring[i];
554 #if defined(__i386)
555 		npi_desc_handle.regp = (uint32_t)tx_desc_p;
556 #else
557 		npi_desc_handle.regp = (uint64_t)tx_desc_p;
558 #endif
559 		if (!header_set &&
560 		    ((!nxge_tx_use_bcopy && (len > TX_BCOPY_SIZE)) ||
561 		    (len >= bcopy_thresh))) {
562 			header_set = B_TRUE;
563 			bcopy_thresh += TX_PKT_HEADER_SIZE;
564 			boff = 0;
565 			pack_len = 0;
566 			kaddr = (caddr_t)DMA_COMMON_VPTR(tx_msg_p->buf_dma);
567 			hdrp = (p_tx_pkt_header_t)kaddr;
568 			clen = pkt_len;
569 			dma_handle = tx_msg_p->buf_dma_handle;
570 			dma_ioaddr = DMA_COMMON_IOADDR(tx_msg_p->buf_dma);
571 			(void) ddi_dma_sync(dma_handle,
572 			    i * nxge_bcopy_thresh, nxge_bcopy_thresh,
573 			    DDI_DMA_SYNC_FORDEV);
574 
575 			tx_msg_p->flags.dma_type = USE_BCOPY;
576 			goto nxge_start_control_header_only;
577 		}
578 
579 		pkt_len += len;
580 		pack_len += len;
581 
582 		NXGE_DEBUG_MSG((nxgep, TX_CTL, "==> nxge_start(3): "
583 		    "desc entry %d "
584 		    "DESC IOADDR $%p "
585 		    "desc_vp $%p tx_desc_p $%p "
586 		    "desc_pp $%p tx_desc_pp $%p "
587 		    "len %d pkt_len %d pack_len %d",
588 		    i,
589 		    DMA_COMMON_IOADDR(desc_area),
590 		    tx_desc_ring_vp, tx_desc_p,
591 		    tx_desc_ring_pp, tx_desc_pp,
592 		    len, pkt_len, pack_len));
593 
594 		if (len < bcopy_thresh) {
595 			NXGE_DEBUG_MSG((nxgep, TX_CTL, "==> nxge_start(4): "
596 			    "USE BCOPY: "));
597 			if (nxge_tx_tiny_pack) {
598 				uint32_t blst =
599 				    TXDMA_DESC_NEXT_INDEX(i, -1,
600 				    tx_ring_p->tx_wrap_mask);
601 				NXGE_DEBUG_MSG((nxgep, TX_CTL,
602 				    "==> nxge_start(5): pack"));
603 				if ((pack_len <= bcopy_thresh) &&
604 				    (last_bidx == blst)) {
605 					NXGE_DEBUG_MSG((nxgep, TX_CTL,
606 					    "==> nxge_start: pack(6) "
607 					    "(pkt_len %d pack_len %d)",
608 					    pkt_len, pack_len));
609 					i = blst;
610 					tx_desc_p = &tx_desc_ring_vp[i];
611 #ifdef	NXGE_DEBUG
612 					tx_desc_pp = &tx_desc_ring_pp[i];
613 #endif
614 					tx_msg_p = &tx_msg_ring[i];
615 					boff = pack_len - len;
616 					ngathers--;
617 				} else if (pack_len > bcopy_thresh &&
618 				    header_set) {
619 					pack_len = len;
620 					boff = 0;
621 					bcopy_thresh = nxge_bcopy_thresh;
622 					NXGE_DEBUG_MSG((nxgep, TX_CTL,
623 					    "==> nxge_start(7): > max NEW "
624 					    "bcopy thresh %d "
625 					    "pkt_len %d pack_len %d(next)",
626 					    bcopy_thresh,
627 					    pkt_len, pack_len));
628 				}
629 				last_bidx = i;
630 			}
631 			kaddr = (caddr_t)DMA_COMMON_VPTR(tx_msg_p->buf_dma);
632 			if ((boff == TX_PKT_HEADER_SIZE) && (nmblks == 1)) {
633 				hdrp = (p_tx_pkt_header_t)kaddr;
634 				header_set = B_TRUE;
635 				NXGE_DEBUG_MSG((nxgep, TX_CTL,
636 				    "==> nxge_start(7_x2): "
637 				    "pkt_len %d pack_len %d (new hdrp $%p)",
638 				    pkt_len, pack_len, hdrp));
639 			}
640 			tx_msg_p->flags.dma_type = USE_BCOPY;
641 			kaddr += boff;
642 			NXGE_DEBUG_MSG((nxgep, TX_CTL, "==> nxge_start(8): "
643 			    "USE BCOPY: before bcopy "
644 			    "DESC IOADDR $%p entry %d "
645 			    "bcopy packets %d "
646 			    "bcopy kaddr $%p "
647 			    "bcopy ioaddr (SAD) $%p "
648 			    "bcopy clen %d "
649 			    "bcopy boff %d",
650 			    DMA_COMMON_IOADDR(desc_area), i,
651 			    tdc_stats->tx_hdr_pkts,
652 			    kaddr,
653 			    dma_ioaddr,
654 			    clen,
655 			    boff));
656 			NXGE_DEBUG_MSG((nxgep, TX_CTL, "==> nxge_start: "
657 			    "1USE BCOPY: "));
658 			NXGE_DEBUG_MSG((nxgep, TX_CTL, "==> nxge_start: "
659 			    "2USE BCOPY: "));
660 			NXGE_DEBUG_MSG((nxgep, TX_CTL, "==> nxge_start: "
661 			    "last USE BCOPY: copy from b_rptr $%p "
662 			    "to KADDR $%p (len %d offset %d",
663 			    b_rptr, kaddr, len, boff));
664 
665 			bcopy(b_rptr, kaddr, len);
666 
667 #ifdef	NXGE_DEBUG
668 			dump_len = (len > 128) ? 128: len;
669 			NXGE_DEBUG_MSG((nxgep, TX_CTL,
670 			    "==> nxge_start: dump packets "
671 			    "(After BCOPY len %d)"
672 			    "(b_rptr $%p): %s", len, nmp->b_rptr,
673 			    nxge_dump_packet((char *)nmp->b_rptr,
674 			    dump_len)));
675 #endif
676 
677 			dma_handle = tx_msg_p->buf_dma_handle;
678 			dma_ioaddr = DMA_COMMON_IOADDR(tx_msg_p->buf_dma);
679 			(void) ddi_dma_sync(dma_handle,
680 			    i * nxge_bcopy_thresh, nxge_bcopy_thresh,
681 			    DDI_DMA_SYNC_FORDEV);
682 			clen = len + boff;
683 			tdc_stats->tx_hdr_pkts++;
684 			NXGE_DEBUG_MSG((nxgep, TX_CTL, "==> nxge_start(9): "
685 			    "USE BCOPY: "
686 			    "DESC IOADDR $%p entry %d "
687 			    "bcopy packets %d "
688 			    "bcopy kaddr $%p "
689 			    "bcopy ioaddr (SAD) $%p "
690 			    "bcopy clen %d "
691 			    "bcopy boff %d",
692 			    DMA_COMMON_IOADDR(desc_area),
693 			    i,
694 			    tdc_stats->tx_hdr_pkts,
695 			    kaddr,
696 			    dma_ioaddr,
697 			    clen,
698 			    boff));
699 		} else {
700 			NXGE_DEBUG_MSG((nxgep, TX_CTL, "==> nxge_start(12): "
701 			    "USE DVMA: len %d", len));
702 			tx_msg_p->flags.dma_type = USE_DMA;
703 			dma_flags = DDI_DMA_WRITE;
704 			if (len < nxge_dma_stream_thresh) {
705 				dma_flags |= DDI_DMA_CONSISTENT;
706 			} else {
707 				dma_flags |= DDI_DMA_STREAMING;
708 			}
709 
710 			dma_handle = tx_msg_p->dma_handle;
711 			dma_status = ddi_dma_addr_bind_handle(dma_handle, NULL,
712 			    (caddr_t)b_rptr, len, dma_flags,
713 			    DDI_DMA_DONTWAIT, NULL,
714 			    &dma_cookie, &ncookies);
715 			if (dma_status == DDI_DMA_MAPPED) {
716 				dma_ioaddr = dma_cookie.dmac_laddress;
717 				len = (int)dma_cookie.dmac_size;
718 				clen = (uint32_t)dma_cookie.dmac_size;
719 				NXGE_DEBUG_MSG((nxgep, TX_CTL,
720 				    "==> nxge_start(12_1): "
721 				    "USE DVMA: len %d clen %d "
722 				    "ngathers %d",
723 				    len, clen,
724 				    ngathers));
725 #if defined(__i386)
726 				npi_desc_handle.regp = (uint32_t)tx_desc_p;
727 #else
728 				npi_desc_handle.regp = (uint64_t)tx_desc_p;
729 #endif
730 				while (ncookies > 1) {
731 					ngathers++;
732 					/*
733 					 * this is the fix for multiple
734 					 * cookies, which are basically
735 					 * a descriptor entry, we don't set
736 					 * SOP bit as well as related fields
737 					 */
738 
739 					(void) npi_txdma_desc_gather_set(
740 					    npi_desc_handle,
741 					    &tx_desc,
742 					    (ngathers -1),
743 					    mark_mode,
744 					    ngathers,
745 					    dma_ioaddr,
746 					    clen);
747 
748 					tx_msg_p->tx_msg_size = clen;
749 					NXGE_DEBUG_MSG((nxgep, TX_CTL,
750 					    "==> nxge_start:  DMA "
751 					    "ncookie %d "
752 					    "ngathers %d "
753 					    "dma_ioaddr $%p len %d"
754 					    "desc $%p descp $%p (%d)",
755 					    ncookies,
756 					    ngathers,
757 					    dma_ioaddr, clen,
758 					    *tx_desc_p, tx_desc_p, i));
759 
760 					ddi_dma_nextcookie(dma_handle,
761 					    &dma_cookie);
762 					dma_ioaddr =
763 					    dma_cookie.dmac_laddress;
764 
765 					len = (int)dma_cookie.dmac_size;
766 					clen = (uint32_t)dma_cookie.dmac_size;
767 					NXGE_DEBUG_MSG((nxgep, TX_CTL,
768 					    "==> nxge_start(12_2): "
769 					    "USE DVMA: len %d clen %d ",
770 					    len, clen));
771 
772 					i = TXDMA_DESC_NEXT_INDEX(i, 1,
773 					    tx_ring_p->tx_wrap_mask);
774 					tx_desc_p = &tx_desc_ring_vp[i];
775 
776 #if defined(__i386)
777 					npi_desc_handle.regp =
778 					    (uint32_t)tx_desc_p;
779 #else
780 					npi_desc_handle.regp =
781 					    (uint64_t)tx_desc_p;
782 #endif
783 					tx_msg_p = &tx_msg_ring[i];
784 					tx_msg_p->flags.dma_type = USE_NONE;
785 					tx_desc.value = 0;
786 
787 					ncookies--;
788 				}
789 				tdc_stats->tx_ddi_pkts++;
790 				NXGE_DEBUG_MSG((nxgep, TX_CTL, "==> nxge_start:"
791 				    "DMA: ddi packets %d",
792 				    tdc_stats->tx_ddi_pkts));
793 			} else {
794 				NXGE_ERROR_MSG((nxgep, NXGE_ERR_CTL,
795 				    "dma mapping failed for %d "
796 				    "bytes addr $%p flags %x (%d)",
797 				    len, b_rptr, status, status));
798 				good_packet = B_FALSE;
799 				tdc_stats->tx_dma_bind_fail++;
800 				tx_msg_p->flags.dma_type = USE_NONE;
801 				if (is_lso) {
802 					mp = nmp;
803 					goto nxge_start_fail_lso;
804 				} else {
805 					status = 1;
806 					goto nxge_start_fail2;
807 				}
808 			}
809 		} /* ddi dvma */
810 
811 		if (is_lso) {
812 			nmp_lso_save = nmp;
813 		}
814 		nmp = nmp->b_cont;
815 nxge_start_control_header_only:
816 #if defined(__i386)
817 		npi_desc_handle.regp = (uint32_t)tx_desc_p;
818 #else
819 		npi_desc_handle.regp = (uint64_t)tx_desc_p;
820 #endif
821 		ngathers++;
822 
823 		if (ngathers == 1) {
824 #ifdef	NXGE_DEBUG
825 			save_desc_p = &sop_tx_desc;
826 #endif
827 			sop_tx_desc_p = &sop_tx_desc;
828 			sop_tx_desc_p->value = 0;
829 			sop_tx_desc_p->bits.hdw.tr_len = clen;
830 			sop_tx_desc_p->bits.hdw.sad = dma_ioaddr >> 32;
831 			sop_tx_desc_p->bits.ldw.sad = dma_ioaddr & 0xffffffff;
832 		} else {
833 #ifdef	NXGE_DEBUG
834 			save_desc_p = &tx_desc;
835 #endif
836 			tmp_desc_p = &tx_desc;
837 			tmp_desc_p->value = 0;
838 			tmp_desc_p->bits.hdw.tr_len = clen;
839 			tmp_desc_p->bits.hdw.sad = dma_ioaddr >> 32;
840 			tmp_desc_p->bits.ldw.sad = dma_ioaddr & 0xffffffff;
841 
842 			tx_desc_p->value = tmp_desc_p->value;
843 		}
844 
845 		NXGE_DEBUG_MSG((nxgep, TX_CTL, "==> nxge_start(13): "
846 		    "Desc_entry %d ngathers %d "
847 		    "desc_vp $%p tx_desc_p $%p "
848 		    "len %d clen %d pkt_len %d pack_len %d nmblks %d "
849 		    "dma_ioaddr (SAD) $%p mark %d",
850 		    i, ngathers,
851 		    tx_desc_ring_vp, tx_desc_p,
852 		    len, clen, pkt_len, pack_len, nmblks,
853 		    dma_ioaddr, mark_mode));
854 
855 #ifdef NXGE_DEBUG
856 		npi_desc_handle.nxgep = nxgep;
857 		npi_desc_handle.function.function = nxgep->function_num;
858 		npi_desc_handle.function.instance = nxgep->instance;
859 		sad = (save_desc_p->value & TX_PKT_DESC_SAD_MASK);
860 		xfer_len = ((save_desc_p->value & TX_PKT_DESC_TR_LEN_MASK) >>
861 		    TX_PKT_DESC_TR_LEN_SHIFT);
862 
863 
864 		NXGE_DEBUG_MSG((nxgep, TX_CTL, "\n\t: value 0x%llx\n"
865 		    "\t\tsad $%p\ttr_len %d len %d\tnptrs %d\t"
866 		    "mark %d sop %d\n",
867 		    save_desc_p->value,
868 		    sad,
869 		    save_desc_p->bits.hdw.tr_len,
870 		    xfer_len,
871 		    save_desc_p->bits.hdw.num_ptr,
872 		    save_desc_p->bits.hdw.mark,
873 		    save_desc_p->bits.hdw.sop));
874 
875 		npi_txdma_dump_desc_one(npi_desc_handle, NULL, i);
876 #endif
877 
878 		tx_msg_p->tx_msg_size = clen;
879 		i = TXDMA_DESC_NEXT_INDEX(i, 1, tx_ring_p->tx_wrap_mask);
880 		if (ngathers > nxge_tx_max_gathers) {
881 			good_packet = B_FALSE;
882 			hcksum_retrieve(mp, NULL, NULL, &start_offset,
883 			    &stuff_offset, &end_offset, &value,
884 			    &cksum_flags);
885 
886 			NXGE_DEBUG_MSG((NULL, TX_CTL,
887 			    "==> nxge_start(14): pull msg - "
888 			    "len %d pkt_len %d ngathers %d",
889 			    len, pkt_len, ngathers));
890 
891 			/*
892 			 * Just give up on this packet.
893 			 */
894 			if (is_lso) {
895 				mp = nmp_lso_save;
896 				goto nxge_start_fail_lso;
897 			}
898 			status = 0;
899 			goto nxge_start_fail2;
900 		}
901 	} /* while (nmp) */
902 
903 	tx_msg_p->tx_message = mp;
904 	tx_desc_p = &tx_desc_ring_vp[sop_index];
905 #if defined(__i386)
906 	npi_desc_handle.regp = (uint32_t)tx_desc_p;
907 #else
908 	npi_desc_handle.regp = (uint64_t)tx_desc_p;
909 #endif
910 
911 	pkthdrp = (p_tx_pkt_hdr_all_t)hdrp;
912 	pkthdrp->reserved = 0;
913 	hdrp->value = 0;
914 	bcopy(&tmp_hdrp, hdrp, sizeof (tx_pkt_header_t));
915 
916 	if (pkt_len > NXGE_MTU_DEFAULT_MAX) {
917 		tdc_stats->tx_jumbo_pkts++;
918 	}
919 
920 	min_len = (ETHERMIN + TX_PKT_HEADER_SIZE + (npads * 2));
921 	if (pkt_len < min_len) {
922 		/* Assume we use bcopy to premapped buffers */
923 		kaddr = (caddr_t)DMA_COMMON_VPTR(tx_msg_p->buf_dma);
924 		NXGE_DEBUG_MSG((NULL, TX_CTL,
925 		    "==> nxge_start(14-1): < (msg_min + 16)"
926 		    "len %d pkt_len %d min_len %d bzero %d ngathers %d",
927 		    len, pkt_len, min_len, (min_len - pkt_len), ngathers));
928 		bzero((kaddr + pkt_len), (min_len - pkt_len));
929 		pkt_len = tx_msg_p->tx_msg_size = min_len;
930 
931 		sop_tx_desc_p->bits.hdw.tr_len = min_len;
932 
933 		NXGE_MEM_PIO_WRITE64(npi_desc_handle, sop_tx_desc_p->value);
934 		tx_desc_p->value = sop_tx_desc_p->value;
935 
936 		NXGE_DEBUG_MSG((NULL, TX_CTL,
937 		    "==> nxge_start(14-2): < msg_min - "
938 		    "len %d pkt_len %d min_len %d ngathers %d",
939 		    len, pkt_len, min_len, ngathers));
940 	}
941 
942 	NXGE_DEBUG_MSG((nxgep, TX_CTL, "==> nxge_start: cksum_flags 0x%x ",
943 	    cksum_flags));
944 	{
945 		uint64_t	tmp_len;
946 
947 		/* pkt_len already includes 16 + paddings!! */
948 		/* Update the control header length */
949 		tot_xfer_len = (pkt_len - TX_PKT_HEADER_SIZE);
950 		tmp_len = hdrp->value |
951 		    (tot_xfer_len << TX_PKT_HEADER_TOT_XFER_LEN_SHIFT);
952 
953 		NXGE_DEBUG_MSG((nxgep, TX_CTL,
954 		    "==> nxge_start(15_x1): setting SOP "
955 		    "tot_xfer_len 0x%llx (%d) pkt_len %d tmp_len "
956 		    "0x%llx hdrp->value 0x%llx",
957 		    tot_xfer_len, tot_xfer_len, pkt_len,
958 		    tmp_len, hdrp->value));
959 #if defined(_BIG_ENDIAN)
960 		hdrp->value = ddi_swap64(tmp_len);
961 #else
962 		hdrp->value = tmp_len;
963 #endif
964 		NXGE_DEBUG_MSG((nxgep,
965 		    TX_CTL, "==> nxge_start(15_x2): setting SOP "
966 		    "after SWAP: tot_xfer_len 0x%llx pkt_len %d "
967 		    "tmp_len 0x%llx hdrp->value 0x%llx",
968 		    tot_xfer_len, pkt_len,
969 		    tmp_len, hdrp->value));
970 	}
971 
972 	NXGE_DEBUG_MSG((nxgep, TX_CTL, "==> nxge_start(15): setting SOP "
973 	    "wr_index %d "
974 	    "tot_xfer_len (%d) pkt_len %d npads %d",
975 	    sop_index,
976 	    tot_xfer_len, pkt_len,
977 	    npads));
978 
979 	sop_tx_desc_p->bits.hdw.sop = 1;
980 	sop_tx_desc_p->bits.hdw.mark = mark_mode;
981 	sop_tx_desc_p->bits.hdw.num_ptr = ngathers;
982 
983 	NXGE_MEM_PIO_WRITE64(npi_desc_handle, sop_tx_desc_p->value);
984 
985 	NXGE_DEBUG_MSG((nxgep, TX_CTL, "==> nxge_start(16): set SOP done"));
986 
987 #ifdef NXGE_DEBUG
988 	npi_desc_handle.nxgep = nxgep;
989 	npi_desc_handle.function.function = nxgep->function_num;
990 	npi_desc_handle.function.instance = nxgep->instance;
991 
992 	NXGE_DEBUG_MSG((nxgep, TX_CTL, "\n\t: value 0x%llx\n"
993 	    "\t\tsad $%p\ttr_len %d len %d\tnptrs %d\tmark %d sop %d\n",
994 	    save_desc_p->value,
995 	    sad,
996 	    save_desc_p->bits.hdw.tr_len,
997 	    xfer_len,
998 	    save_desc_p->bits.hdw.num_ptr,
999 	    save_desc_p->bits.hdw.mark,
1000 	    save_desc_p->bits.hdw.sop));
1001 	(void) npi_txdma_dump_desc_one(npi_desc_handle, NULL, sop_index);
1002 
1003 	dump_len = (pkt_len > 128) ? 128: pkt_len;
1004 	NXGE_DEBUG_MSG((nxgep, TX_CTL,
1005 	    "==> nxge_start: dump packets(17) (after sop set, len "
1006 	    " (len/dump_len/pkt_len/tot_xfer_len) %d/%d/%d/%d):\n"
1007 	    "ptr $%p: %s", len, dump_len, pkt_len, tot_xfer_len,
1008 	    (char *)hdrp,
1009 	    nxge_dump_packet((char *)hdrp, dump_len)));
1010 	NXGE_DEBUG_MSG((nxgep, TX_CTL,
1011 	    "==> nxge_start(18): TX desc sync: sop_index %d",
1012 	    sop_index));
1013 #endif
1014 
1015 	if ((ngathers == 1) || tx_ring_p->wr_index < i) {
1016 		(void) ddi_dma_sync(tx_desc_dma_handle,
1017 		    sop_index * sizeof (tx_desc_t),
1018 		    ngathers * sizeof (tx_desc_t),
1019 		    DDI_DMA_SYNC_FORDEV);
1020 
1021 		NXGE_DEBUG_MSG((nxgep, TX_CTL, "nxge_start(19): sync 1 "
1022 		    "cs_off = 0x%02X cs_s_off = 0x%02X "
1023 		    "pkt_len %d ngathers %d sop_index %d\n",
1024 		    stuff_offset, start_offset,
1025 		    pkt_len, ngathers, sop_index));
1026 	} else { /* more than one descriptor and wrap around */
1027 		uint32_t nsdescs = tx_ring_p->tx_ring_size - sop_index;
1028 		(void) ddi_dma_sync(tx_desc_dma_handle,
1029 		    sop_index * sizeof (tx_desc_t),
1030 		    nsdescs * sizeof (tx_desc_t),
1031 		    DDI_DMA_SYNC_FORDEV);
1032 		NXGE_DEBUG_MSG((nxgep, TX_CTL, "nxge_start(20): sync 1 "
1033 		    "cs_off = 0x%02X cs_s_off = 0x%02X "
1034 		    "pkt_len %d ngathers %d sop_index %d\n",
1035 		    stuff_offset, start_offset,
1036 		    pkt_len, ngathers, sop_index));
1037 
1038 		(void) ddi_dma_sync(tx_desc_dma_handle,
1039 		    0,
1040 		    (ngathers - nsdescs) * sizeof (tx_desc_t),
1041 		    DDI_DMA_SYNC_FORDEV);
1042 		NXGE_DEBUG_MSG((nxgep, TX_CTL, "nxge_start(21): sync 2 "
1043 		    "cs_off = 0x%02X cs_s_off = 0x%02X "
1044 		    "pkt_len %d ngathers %d sop_index %d\n",
1045 		    stuff_offset, start_offset,
1046 		    pkt_len, ngathers, sop_index));
1047 	}
1048 
1049 	tail_index = tx_ring_p->wr_index;
1050 	tail_wrap = tx_ring_p->wr_index_wrap;
1051 
1052 	tx_ring_p->wr_index = i;
1053 	if (tx_ring_p->wr_index <= tail_index) {
1054 		tx_ring_p->wr_index_wrap = ((tail_wrap == B_TRUE) ?
1055 		    B_FALSE : B_TRUE);
1056 	}
1057 
1058 	NXGE_DEBUG_MSG((nxgep, TX_CTL, "==> nxge_start: TX kick: "
1059 	    "channel %d wr_index %d wrap %d ngathers %d desc_pend %d",
1060 	    tx_ring_p->tdc,
1061 	    tx_ring_p->wr_index,
1062 	    tx_ring_p->wr_index_wrap,
1063 	    ngathers,
1064 	    tx_ring_p->descs_pending));
1065 
1066 	if (is_lso) {
1067 		lso_ngathers += ngathers;
1068 		if (mp_chain != NULL) {
1069 			mp = mp_chain;
1070 			mp_chain = mp_chain->b_next;
1071 			mp->b_next = NULL;
1072 			if (nxge_lso_kick_cnt == lso_ngathers) {
1073 				tx_ring_p->descs_pending += lso_ngathers;
1074 				{
1075 					tx_ring_kick_t		kick;
1076 
1077 					kick.value = 0;
1078 					kick.bits.ldw.wrap =
1079 					    tx_ring_p->wr_index_wrap;
1080 					kick.bits.ldw.tail =
1081 					    (uint16_t)tx_ring_p->wr_index;
1082 
1083 					/* Kick the Transmit kick register */
1084 					TXDMA_REG_WRITE64(
1085 					    NXGE_DEV_NPI_HANDLE(nxgep),
1086 					    TX_RING_KICK_REG,
1087 					    (uint8_t)tx_ring_p->tdc,
1088 					    kick.value);
1089 					tdc_stats->tx_starts++;
1090 
1091 					NXGE_DEBUG_MSG((nxgep, TX_CTL,
1092 					    "==> nxge_start: more LSO: "
1093 					    "LSO_CNT %d",
1094 					    lso_ngathers));
1095 				}
1096 				lso_ngathers = 0;
1097 				ngathers = 0;
1098 				cur_index_lso = sop_index = tx_ring_p->wr_index;
1099 				lso_tail_wrap = tx_ring_p->wr_index_wrap;
1100 			}
1101 			NXGE_DEBUG_MSG((nxgep, TX_CTL,
1102 			    "==> nxge_start: lso again: "
1103 			    "lso_gathers %d ngathers %d cur_index_lso %d "
1104 			    "wr_index %d sop_index %d",
1105 			    lso_ngathers, ngathers, cur_index_lso,
1106 			    tx_ring_p->wr_index, sop_index));
1107 
1108 			NXGE_DEBUG_MSG((nxgep, TX_CTL,
1109 			    "==> nxge_start: next : count %d",
1110 			    lso_ngathers));
1111 			lso_again = B_TRUE;
1112 			goto start_again;
1113 		}
1114 		ngathers = lso_ngathers;
1115 	}
1116 
1117 	NXGE_DEBUG_MSG((nxgep, TX_CTL, "==> nxge_start: TX KICKING: "));
1118 
1119 	{
1120 		tx_ring_kick_t		kick;
1121 
1122 		kick.value = 0;
1123 		kick.bits.ldw.wrap = tx_ring_p->wr_index_wrap;
1124 		kick.bits.ldw.tail = (uint16_t)tx_ring_p->wr_index;
1125 
1126 		/* Kick start the Transmit kick register */
1127 		TXDMA_REG_WRITE64(NXGE_DEV_NPI_HANDLE(nxgep),
1128 		    TX_RING_KICK_REG,
1129 		    (uint8_t)tx_ring_p->tdc,
1130 		    kick.value);
1131 	}
1132 
1133 	tx_ring_p->descs_pending += ngathers;
1134 	tdc_stats->tx_starts++;
1135 
1136 	if (isLDOMservice(nxgep)) {
1137 		tx_ring_p->tx_ring_busy = B_FALSE;
1138 		if (tx_ring_p->tx_ring_offline) {
1139 			(void) atomic_swap_32(&tx_ring_p->tx_ring_offline,
1140 			    NXGE_TX_RING_OFFLINED);
1141 		}
1142 	}
1143 
1144 	MUTEX_EXIT(&tx_ring_p->lock);
1145 
1146 	NXGE_DEBUG_MSG((nxgep, TX_CTL, "<== nxge_start"));
1147 	return (status);
1148 
1149 nxge_start_fail_lso:
1150 	status = 0;
1151 	good_packet = B_FALSE;
1152 	if (mp != NULL)
1153 		freemsg(mp);
1154 	if (mp_chain != NULL)
1155 		freemsgchain(mp_chain);
1156 
1157 	if (!lso_again && !ngathers) {
1158 		if (isLDOMservice(nxgep)) {
1159 			tx_ring_p->tx_ring_busy = B_FALSE;
1160 			if (tx_ring_p->tx_ring_offline) {
1161 				(void) atomic_swap_32(
1162 				    &tx_ring_p->tx_ring_offline,
1163 				    NXGE_TX_RING_OFFLINED);
1164 			}
1165 		}
1166 
1167 		MUTEX_EXIT(&tx_ring_p->lock);
1168 		NXGE_DEBUG_MSG((nxgep, TX_CTL,
1169 		    "==> nxge_start: lso exit (nothing changed)"));
1170 		goto nxge_start_fail1;
1171 	}
1172 
1173 	NXGE_DEBUG_MSG((nxgep, TX_CTL,
1174 	    "==> nxge_start (channel %d): before lso "
1175 	    "lso_gathers %d ngathers %d cur_index_lso %d "
1176 	    "wr_index %d sop_index %d lso_again %d",
1177 	    tx_ring_p->tdc,
1178 	    lso_ngathers, ngathers, cur_index_lso,
1179 	    tx_ring_p->wr_index, sop_index, lso_again));
1180 
1181 	if (lso_again) {
1182 		lso_ngathers += ngathers;
1183 		ngathers = lso_ngathers;
1184 		sop_index = cur_index_lso;
1185 		tx_ring_p->wr_index = sop_index;
1186 		tx_ring_p->wr_index_wrap = lso_tail_wrap;
1187 	}
1188 
1189 	NXGE_DEBUG_MSG((nxgep, TX_CTL,
1190 	    "==> nxge_start (channel %d): after lso "
1191 	    "lso_gathers %d ngathers %d cur_index_lso %d "
1192 	    "wr_index %d sop_index %d lso_again %d",
1193 	    tx_ring_p->tdc,
1194 	    lso_ngathers, ngathers, cur_index_lso,
1195 	    tx_ring_p->wr_index, sop_index, lso_again));
1196 
1197 nxge_start_fail2:
1198 	if (good_packet == B_FALSE) {
1199 		cur_index = sop_index;
1200 		NXGE_DEBUG_MSG((nxgep, TX_CTL, "==> nxge_start: clean up"));
1201 		for (i = 0; i < ngathers; i++) {
1202 			tx_desc_p = &tx_desc_ring_vp[cur_index];
1203 #if defined(__i386)
1204 			npi_handle.regp = (uint32_t)tx_desc_p;
1205 #else
1206 			npi_handle.regp = (uint64_t)tx_desc_p;
1207 #endif
1208 			tx_msg_p = &tx_msg_ring[cur_index];
1209 			(void) npi_txdma_desc_set_zero(npi_handle, 1);
1210 			if (tx_msg_p->flags.dma_type == USE_DVMA) {
1211 				NXGE_DEBUG_MSG((nxgep, TX_CTL,
1212 				    "tx_desc_p = %X index = %d",
1213 				    tx_desc_p, tx_ring_p->rd_index));
1214 				(void) dvma_unload(tx_msg_p->dvma_handle,
1215 				    0, -1);
1216 				tx_msg_p->dvma_handle = NULL;
1217 				if (tx_ring_p->dvma_wr_index ==
1218 				    tx_ring_p->dvma_wrap_mask)
1219 					tx_ring_p->dvma_wr_index = 0;
1220 				else
1221 					tx_ring_p->dvma_wr_index++;
1222 				tx_ring_p->dvma_pending--;
1223 			} else if (tx_msg_p->flags.dma_type == USE_DMA) {
1224 				if (ddi_dma_unbind_handle(
1225 				    tx_msg_p->dma_handle)) {
1226 					cmn_err(CE_WARN, "!nxge_start: "
1227 					    "ddi_dma_unbind_handle failed");
1228 				}
1229 			}
1230 			tx_msg_p->flags.dma_type = USE_NONE;
1231 			cur_index = TXDMA_DESC_NEXT_INDEX(cur_index, 1,
1232 			    tx_ring_p->tx_wrap_mask);
1233 
1234 		}
1235 	}
1236 
1237 	if (isLDOMservice(nxgep)) {
1238 		tx_ring_p->tx_ring_busy = B_FALSE;
1239 		if (tx_ring_p->tx_ring_offline) {
1240 			(void) atomic_swap_32(&tx_ring_p->tx_ring_offline,
1241 			    NXGE_TX_RING_OFFLINED);
1242 		}
1243 	}
1244 
1245 	MUTEX_EXIT(&tx_ring_p->lock);
1246 
1247 nxge_start_fail1:
1248 	/* Add FMA to check the access handle nxge_hregh */
1249 
1250 	NXGE_DEBUG_MSG((nxgep, TX_CTL, "<== nxge_start"));
1251 	return (status);
1252 }
1253 
1254 /* Software LSO starts here */
1255 static void
1256 nxge_hcksum_retrieve(mblk_t *mp,
1257     uint32_t *start, uint32_t *stuff, uint32_t *end,
1258     uint32_t *value, uint32_t *flags)
1259 {
1260 	if (mp->b_datap->db_type == M_DATA) {
1261 		if (flags != NULL) {
1262 			*flags = DB_CKSUMFLAGS(mp) & (HCK_IPV4_HDRCKSUM |
1263 			    HCK_PARTIALCKSUM | HCK_FULLCKSUM |
1264 			    HCK_FULLCKSUM_OK);
1265 			if ((*flags & (HCK_PARTIALCKSUM |
1266 			    HCK_FULLCKSUM)) != 0) {
1267 				if (value != NULL)
1268 					*value = (uint32_t)DB_CKSUM16(mp);
1269 				if ((*flags & HCK_PARTIALCKSUM) != 0) {
1270 					if (start != NULL)
1271 						*start =
1272 						    (uint32_t)DB_CKSUMSTART(mp);
1273 					if (stuff != NULL)
1274 						*stuff =
1275 						    (uint32_t)DB_CKSUMSTUFF(mp);
1276 					if (end != NULL)
1277 						*end =
1278 						    (uint32_t)DB_CKSUMEND(mp);
1279 				}
1280 			}
1281 		}
1282 	}
1283 }
1284 
1285 static void
1286 nxge_lso_info_get(mblk_t *mp, uint32_t *mss, uint32_t *flags)
1287 {
1288 	ASSERT(DB_TYPE(mp) == M_DATA);
1289 
1290 	*mss = 0;
1291 	if (flags != NULL) {
1292 		*flags = DB_CKSUMFLAGS(mp) & HW_LSO;
1293 		if ((*flags != 0) && (mss != NULL)) {
1294 			*mss = (uint32_t)DB_LSOMSS(mp);
1295 		}
1296 		NXGE_DEBUG_MSG((NULL, TX_CTL,
1297 		    "==> nxge_lso_info_get(flag !=NULL): mss %d *flags 0x%x",
1298 		    *mss, *flags));
1299 	}
1300 
1301 	NXGE_DEBUG_MSG((NULL, TX_CTL,
1302 	    "<== nxge_lso_info_get: mss %d", *mss));
1303 }
1304 
1305 /*
1306  * Do Soft LSO on the oversized packet.
1307  *
1308  * 1. Create a chain of message for headers.
1309  * 2. Fill up header messages with proper information.
1310  * 3. Copy Eithernet, IP, and TCP headers from the original message to
1311  *    each new message with necessary adjustments.
1312  *    * Unchange the ethernet header for DIX frames. (by default)
1313  *    * IP Total Length field is updated to MSS or less(only for the last one).
1314  *    * IP Identification value is incremented by one for each packet.
1315  *    * TCP sequence Number is recalculated according to the payload length.
1316  *    * Set FIN and/or PSH flags for the *last* packet if applied.
1317  *    * TCP partial Checksum
1318  * 4. Update LSO information in the first message header.
1319  * 5. Release the original message header.
1320  */
1321 static mblk_t *
1322 nxge_do_softlso(mblk_t *mp, uint32_t mss)
1323 {
1324 	uint32_t	hckflags;
1325 	int		pktlen;
1326 	int		hdrlen;
1327 	int		segnum;
1328 	int		i;
1329 	struct ether_vlan_header *evh;
1330 	int		ehlen, iphlen, tcphlen;
1331 	struct ip	*oiph, *niph;
1332 	struct tcphdr *otcph, *ntcph;
1333 	int		available, len, left;
1334 	uint16_t	ip_id;
1335 	uint32_t	tcp_seq;
1336 #ifdef __sparc
1337 	uint32_t	tcp_seq_tmp;
1338 #endif
1339 	mblk_t		*datamp;
1340 	uchar_t		*rptr;
1341 	mblk_t		*nmp;
1342 	mblk_t		*cmp;
1343 	mblk_t		*mp_chain;
1344 	boolean_t do_cleanup = B_FALSE;
1345 	t_uscalar_t start_offset = 0;
1346 	t_uscalar_t stuff_offset = 0;
1347 	t_uscalar_t value = 0;
1348 	uint16_t	l4_len;
1349 	ipaddr_t	src, dst;
1350 	uint32_t	cksum, sum, l4cksum;
1351 
1352 	NXGE_DEBUG_MSG((NULL, TX_CTL,
1353 	    "==> nxge_do_softlso"));
1354 	/*
1355 	 * check the length of LSO packet payload and calculate the number of
1356 	 * segments to be generated.
1357 	 */
1358 	pktlen = msgsize(mp);
1359 	evh = (struct ether_vlan_header *)mp->b_rptr;
1360 
1361 	/* VLAN? */
1362 	if (evh->ether_tpid == htons(ETHERTYPE_VLAN))
1363 		ehlen = sizeof (struct ether_vlan_header);
1364 	else
1365 		ehlen = sizeof (struct ether_header);
1366 	oiph = (struct ip *)(mp->b_rptr + ehlen);
1367 	iphlen = oiph->ip_hl * 4;
1368 	otcph = (struct tcphdr *)(mp->b_rptr + ehlen + iphlen);
1369 	tcphlen = otcph->th_off * 4;
1370 
1371 	l4_len = pktlen - ehlen - iphlen;
1372 
1373 	NXGE_DEBUG_MSG((NULL, TX_CTL,
1374 	    "==> nxge_do_softlso: mss %d oiph $%p "
1375 	    "original ip_sum oiph->ip_sum 0x%x "
1376 	    "original tcp_sum otcph->th_sum 0x%x "
1377 	    "oiph->ip_len %d pktlen %d ehlen %d "
1378 	    "l4_len %d (0x%x) ip_len - iphlen %d ",
1379 	    mss,
1380 	    oiph,
1381 	    oiph->ip_sum,
1382 	    otcph->th_sum,
1383 	    ntohs(oiph->ip_len), pktlen,
1384 	    ehlen,
1385 	    l4_len,
1386 	    l4_len,
1387 	    ntohs(oiph->ip_len) - iphlen));
1388 
1389 	/* IPv4 + TCP */
1390 	if (!(oiph->ip_v == IPV4_VERSION)) {
1391 		NXGE_ERROR_MSG((NULL, NXGE_ERR_CTL,
1392 		    "<== nxge_do_softlso: not IPV4 "
1393 		    "oiph->ip_len %d pktlen %d ehlen %d tcphlen %d",
1394 		    ntohs(oiph->ip_len), pktlen, ehlen,
1395 		    tcphlen));
1396 		freemsg(mp);
1397 		return (NULL);
1398 	}
1399 
1400 	if (!(oiph->ip_p == IPPROTO_TCP)) {
1401 		NXGE_ERROR_MSG((NULL, NXGE_ERR_CTL,
1402 		    "<== nxge_do_softlso: not TCP "
1403 		    "oiph->ip_len %d pktlen %d ehlen %d tcphlen %d",
1404 		    ntohs(oiph->ip_len), pktlen, ehlen,
1405 		    tcphlen));
1406 		freemsg(mp);
1407 		return (NULL);
1408 	}
1409 
1410 	if (!(ntohs(oiph->ip_len) == pktlen - ehlen)) {
1411 		NXGE_ERROR_MSG((NULL, NXGE_ERR_CTL,
1412 		    "<== nxge_do_softlso: len not matched  "
1413 		    "oiph->ip_len %d pktlen %d ehlen %d tcphlen %d",
1414 		    ntohs(oiph->ip_len), pktlen, ehlen,
1415 		    tcphlen));
1416 		freemsg(mp);
1417 		return (NULL);
1418 	}
1419 
1420 	otcph = (struct tcphdr *)(mp->b_rptr + ehlen + iphlen);
1421 	tcphlen = otcph->th_off * 4;
1422 
1423 	/* TCP flags can not include URG, RST, or SYN */
1424 	VERIFY((otcph->th_flags & (TH_SYN | TH_RST | TH_URG)) == 0);
1425 
1426 	hdrlen = ehlen + iphlen + tcphlen;
1427 
1428 	VERIFY(MBLKL(mp) >= hdrlen);
1429 
1430 	if (MBLKL(mp) > hdrlen) {
1431 		datamp = mp;
1432 		rptr = mp->b_rptr + hdrlen;
1433 	} else { /* = */
1434 		datamp = mp->b_cont;
1435 		rptr = datamp->b_rptr;
1436 	}
1437 
1438 	NXGE_DEBUG_MSG((NULL, TX_CTL,
1439 	    "nxge_do_softlso: otcph $%p pktlen: %d, "
1440 	    "hdrlen %d ehlen %d iphlen %d tcphlen %d "
1441 	    "mblkl(mp): %d, mblkl(datamp): %d",
1442 	    otcph,
1443 	    pktlen, hdrlen, ehlen, iphlen, tcphlen,
1444 	    (int)MBLKL(mp), (int)MBLKL(datamp)));
1445 
1446 	hckflags = 0;
1447 	nxge_hcksum_retrieve(mp,
1448 	    &start_offset, &stuff_offset, &value, NULL, &hckflags);
1449 
1450 	dst = oiph->ip_dst.s_addr;
1451 	src = oiph->ip_src.s_addr;
1452 
1453 	cksum = (dst >> 16) + (dst & 0xFFFF) +
1454 	    (src >> 16) + (src & 0xFFFF);
1455 	l4cksum = cksum + IP_TCP_CSUM_COMP;
1456 
1457 	sum = l4_len + l4cksum;
1458 	sum = (sum & 0xFFFF) + (sum >> 16);
1459 
1460 	NXGE_DEBUG_MSG((NULL, TX_CTL,
1461 	    "==> nxge_do_softlso: dst 0x%x src 0x%x sum 0x%x ~new 0x%x "
1462 	    "hckflags 0x%x start_offset %d stuff_offset %d "
1463 	    "value (original) 0x%x th_sum 0x%x "
1464 	    "pktlen %d l4_len %d (0x%x) "
1465 	    "MBLKL(mp): %d, MBLKL(datamp): %d dump header %s",
1466 	    dst, src,
1467 	    (sum & 0xffff), (~sum & 0xffff),
1468 	    hckflags, start_offset, stuff_offset,
1469 	    value, otcph->th_sum,
1470 	    pktlen,
1471 	    l4_len,
1472 	    l4_len,
1473 	    ntohs(oiph->ip_len) - (int)MBLKL(mp),
1474 	    (int)MBLKL(datamp),
1475 	    nxge_dump_packet((char *)evh, 12)));
1476 
1477 	/*
1478 	 * Start to process.
1479 	 */
1480 	available = pktlen - hdrlen;
1481 	segnum = (available - 1) / mss + 1;
1482 
1483 	NXGE_DEBUG_MSG((NULL, TX_CTL,
1484 	    "==> nxge_do_softlso: pktlen %d "
1485 	    "MBLKL(mp): %d, MBLKL(datamp): %d "
1486 	    "available %d mss %d segnum %d",
1487 	    pktlen, (int)MBLKL(mp), (int)MBLKL(datamp),
1488 	    available,
1489 	    mss,
1490 	    segnum));
1491 
1492 	VERIFY(segnum >= 2);
1493 
1494 	/*
1495 	 * Try to pre-allocate all header messages
1496 	 */
1497 	mp_chain = NULL;
1498 	for (i = 0; i < segnum; i++) {
1499 		if ((nmp = allocb(hdrlen, 0)) == NULL) {
1500 			/* Clean up the mp_chain */
1501 			while (mp_chain != NULL) {
1502 				nmp = mp_chain;
1503 				mp_chain = mp_chain->b_next;
1504 				freemsg(nmp);
1505 			}
1506 			NXGE_DEBUG_MSG((NULL, TX_CTL,
1507 			    "<== nxge_do_softlso: "
1508 			    "Could not allocate enough messages for headers!"));
1509 			freemsg(mp);
1510 			return (NULL);
1511 		}
1512 		nmp->b_next = mp_chain;
1513 		mp_chain = nmp;
1514 
1515 		NXGE_DEBUG_MSG((NULL, TX_CTL,
1516 		    "==> nxge_do_softlso: "
1517 		    "mp $%p nmp $%p mp_chain $%p mp_chain->b_next $%p",
1518 		    mp, nmp, mp_chain, mp_chain->b_next));
1519 	}
1520 
1521 	NXGE_DEBUG_MSG((NULL, TX_CTL,
1522 	    "==> nxge_do_softlso: mp $%p nmp $%p mp_chain $%p",
1523 	    mp, nmp, mp_chain));
1524 
1525 	/*
1526 	 * Associate payload with new packets
1527 	 */
1528 	cmp = mp_chain;
1529 	left = available;
1530 	while (cmp != NULL) {
1531 		nmp = dupb(datamp);
1532 		if (nmp == NULL) {
1533 			do_cleanup = B_TRUE;
1534 			NXGE_DEBUG_MSG((NULL, TX_CTL,
1535 			    "==>nxge_do_softlso: "
1536 			    "Can not dupb(datamp), have to do clean up"));
1537 			goto cleanup_allocated_msgs;
1538 		}
1539 
1540 		NXGE_DEBUG_MSG((NULL, TX_CTL,
1541 		    "==> nxge_do_softlso: (loop) before mp $%p cmp $%p "
1542 		    "dupb nmp $%p len %d left %d msd %d ",
1543 		    mp, cmp, nmp, len, left, mss));
1544 
1545 		cmp->b_cont = nmp;
1546 		nmp->b_rptr = rptr;
1547 		len = (left < mss) ? left : mss;
1548 		left -= len;
1549 
1550 		NXGE_DEBUG_MSG((NULL, TX_CTL,
1551 		    "==> nxge_do_softlso: (loop) after mp $%p cmp $%p "
1552 		    "dupb nmp $%p len %d left %d mss %d ",
1553 		    mp, cmp, nmp, len, left, mss));
1554 		NXGE_DEBUG_MSG((NULL, TX_CTL,
1555 		    "nxge_do_softlso: before available: %d, "
1556 		    "left: %d, len: %d, segnum: %d MBLK(nmp): %d",
1557 		    available, left, len, segnum, (int)MBLKL(nmp)));
1558 
1559 		len -= MBLKL(nmp);
1560 		NXGE_DEBUG_MSG((NULL, TX_CTL,
1561 		    "nxge_do_softlso: after available: %d, "
1562 		    "left: %d, len: %d, segnum: %d MBLK(nmp): %d",
1563 		    available, left, len, segnum, (int)MBLKL(nmp)));
1564 
1565 		while (len > 0) {
1566 			mblk_t *mmp = NULL;
1567 
1568 			NXGE_DEBUG_MSG((NULL, TX_CTL,
1569 			    "nxge_do_softlso: (4) len > 0 available: %d, "
1570 			    "left: %d, len: %d, segnum: %d MBLK(nmp): %d",
1571 			    available, left, len, segnum, (int)MBLKL(nmp)));
1572 
1573 			if (datamp->b_cont != NULL) {
1574 				datamp = datamp->b_cont;
1575 				rptr = datamp->b_rptr;
1576 				mmp = dupb(datamp);
1577 				if (mmp == NULL) {
1578 					do_cleanup = B_TRUE;
1579 					NXGE_DEBUG_MSG((NULL, TX_CTL,
1580 					    "==> nxge_do_softlso: "
1581 					    "Can not dupb(datamp) (1), :"
1582 					    "have to do clean up"));
1583 					NXGE_DEBUG_MSG((NULL, TX_CTL,
1584 					    "==> nxge_do_softlso: "
1585 					    "available: %d, left: %d, "
1586 					    "len: %d, MBLKL(nmp): %d",
1587 					    available, left, len,
1588 					    (int)MBLKL(nmp)));
1589 					goto cleanup_allocated_msgs;
1590 				}
1591 			} else {
1592 				NXGE_ERROR_MSG((NULL, NXGE_ERR_CTL,
1593 				    "==> nxge_do_softlso: "
1594 				    "(1)available: %d, left: %d, "
1595 				    "len: %d, MBLKL(nmp): %d",
1596 				    available, left, len,
1597 				    (int)MBLKL(nmp)));
1598 				cmn_err(CE_PANIC,
1599 				    "==> nxge_do_softlso: "
1600 				    "Pointers must have been corrupted!\n"
1601 				    "datamp: $%p, nmp: $%p, rptr: $%p",
1602 				    (void *)datamp,
1603 				    (void *)nmp,
1604 				    (void *)rptr);
1605 			}
1606 			nmp->b_cont = mmp;
1607 			nmp = mmp;
1608 			len -= MBLKL(nmp);
1609 		}
1610 		if (len < 0) {
1611 			nmp->b_wptr += len;
1612 			rptr = nmp->b_wptr;
1613 			NXGE_DEBUG_MSG((NULL, TX_CTL,
1614 			    "(5) len < 0 (less than 0)"
1615 			    "available: %d, left: %d, len: %d, MBLKL(nmp): %d",
1616 			    available, left, len, (int)MBLKL(nmp)));
1617 
1618 		} else if (len == 0) {
1619 			if (datamp->b_cont != NULL) {
1620 				NXGE_DEBUG_MSG((NULL, TX_CTL,
1621 				    "(5) len == 0"
1622 				    "available: %d, left: %d, len: %d, "
1623 				    "MBLKL(nmp): %d",
1624 				    available, left, len, (int)MBLKL(nmp)));
1625 				datamp = datamp->b_cont;
1626 				rptr = datamp->b_rptr;
1627 			} else {
1628 				NXGE_DEBUG_MSG((NULL, TX_CTL,
1629 				    "(6)available b_cont == NULL : %d, "
1630 				    "left: %d, len: %d, MBLKL(nmp): %d",
1631 				    available, left, len, (int)MBLKL(nmp)));
1632 
1633 				VERIFY(cmp->b_next == NULL);
1634 				VERIFY(left == 0);
1635 				break; /* Done! */
1636 			}
1637 		}
1638 		cmp = cmp->b_next;
1639 
1640 		NXGE_DEBUG_MSG((NULL, TX_CTL,
1641 		    "(7) do_softlso: "
1642 		    "next mp in mp_chain available len != 0 : %d, "
1643 		    "left: %d, len: %d, MBLKL(nmp): %d",
1644 		    available, left, len, (int)MBLKL(nmp)));
1645 	}
1646 
1647 	/*
1648 	 * From now, start to fill up all headers for the first message
1649 	 * Hardware checksum flags need to be updated separately for FULLCKSUM
1650 	 * and PARTIALCKSUM cases. For full checksum, copy the original flags
1651 	 * into every new packet is enough. But for HCK_PARTIALCKSUM, all
1652 	 * required fields need to be updated properly.
1653 	 */
1654 	nmp = mp_chain;
1655 	bcopy(mp->b_rptr, nmp->b_rptr, hdrlen);
1656 	nmp->b_wptr = nmp->b_rptr + hdrlen;
1657 	niph = (struct ip *)(nmp->b_rptr + ehlen);
1658 	niph->ip_len = htons(mss + iphlen + tcphlen);
1659 	ip_id = ntohs(niph->ip_id);
1660 	ntcph = (struct tcphdr *)(nmp->b_rptr + ehlen + iphlen);
1661 #ifdef __sparc
1662 	bcopy((char *)&ntcph->th_seq, &tcp_seq_tmp, 4);
1663 	tcp_seq = ntohl(tcp_seq_tmp);
1664 #else
1665 	tcp_seq = ntohl(ntcph->th_seq);
1666 #endif
1667 
1668 	ntcph->th_flags &= ~(TH_FIN | TH_PUSH | TH_RST);
1669 
1670 	DB_CKSUMFLAGS(nmp) = (uint16_t)hckflags;
1671 	DB_CKSUMSTART(nmp) = start_offset;
1672 	DB_CKSUMSTUFF(nmp) = stuff_offset;
1673 
1674 	/* calculate IP checksum and TCP pseudo header checksum */
1675 	niph->ip_sum = 0;
1676 	niph->ip_sum = (uint16_t)nxge_csgen((uint16_t *)niph, iphlen);
1677 
1678 	l4_len = mss + tcphlen;
1679 	sum = htons(l4_len) + l4cksum;
1680 	sum = (sum & 0xFFFF) + (sum >> 16);
1681 	ntcph->th_sum = (sum & 0xffff);
1682 
1683 	NXGE_DEBUG_MSG((NULL, TX_CTL,
1684 	    "==> nxge_do_softlso: first mp $%p (mp_chain $%p) "
1685 	    "mss %d pktlen %d l4_len %d (0x%x) "
1686 	    "MBLKL(mp): %d, MBLKL(datamp): %d "
1687 	    "ip_sum 0x%x "
1688 	    "th_sum 0x%x sum 0x%x ) "
1689 	    "dump first ip->tcp %s",
1690 	    nmp, mp_chain,
1691 	    mss,
1692 	    pktlen,
1693 	    l4_len,
1694 	    l4_len,
1695 	    (int)MBLKL(mp), (int)MBLKL(datamp),
1696 	    niph->ip_sum,
1697 	    ntcph->th_sum,
1698 	    sum,
1699 	    nxge_dump_packet((char *)niph, 52)));
1700 
1701 	cmp = nmp;
1702 	while ((nmp = nmp->b_next)->b_next != NULL) {
1703 		NXGE_DEBUG_MSG((NULL, TX_CTL,
1704 		    "==>nxge_do_softlso: middle l4_len %d ", l4_len));
1705 		bcopy(cmp->b_rptr, nmp->b_rptr, hdrlen);
1706 		nmp->b_wptr = nmp->b_rptr + hdrlen;
1707 		niph = (struct ip *)(nmp->b_rptr + ehlen);
1708 		niph->ip_id = htons(++ip_id);
1709 		niph->ip_len = htons(mss + iphlen + tcphlen);
1710 		ntcph = (struct tcphdr *)(nmp->b_rptr + ehlen + iphlen);
1711 		tcp_seq += mss;
1712 
1713 		ntcph->th_flags &= ~(TH_FIN | TH_PUSH | TH_RST | TH_URG);
1714 
1715 #ifdef __sparc
1716 		tcp_seq_tmp = htonl(tcp_seq);
1717 		bcopy(&tcp_seq_tmp, (char *)&ntcph->th_seq, 4);
1718 #else
1719 		ntcph->th_seq = htonl(tcp_seq);
1720 #endif
1721 		DB_CKSUMFLAGS(nmp) = (uint16_t)hckflags;
1722 		DB_CKSUMSTART(nmp) = start_offset;
1723 		DB_CKSUMSTUFF(nmp) = stuff_offset;
1724 
1725 		/* calculate IP checksum and TCP pseudo header checksum */
1726 		niph->ip_sum = 0;
1727 		niph->ip_sum = (uint16_t)nxge_csgen((uint16_t *)niph, iphlen);
1728 		ntcph->th_sum = (sum & 0xffff);
1729 
1730 		NXGE_DEBUG_MSG((NULL, TX_CTL,
1731 		    "==> nxge_do_softlso: middle ip_sum 0x%x "
1732 		    "th_sum 0x%x "
1733 		    " mp $%p (mp_chain $%p) pktlen %d "
1734 		    "MBLKL(mp): %d, MBLKL(datamp): %d ",
1735 		    niph->ip_sum,
1736 		    ntcph->th_sum,
1737 		    nmp, mp_chain,
1738 		    pktlen, (int)MBLKL(mp), (int)MBLKL(datamp)));
1739 	}
1740 
1741 	/* Last segment */
1742 	/*
1743 	 * Set FIN and/or PSH flags if present only in the last packet.
1744 	 * The ip_len could be different from prior packets.
1745 	 */
1746 	bcopy(cmp->b_rptr, nmp->b_rptr, hdrlen);
1747 	nmp->b_wptr = nmp->b_rptr + hdrlen;
1748 	niph = (struct ip *)(nmp->b_rptr + ehlen);
1749 	niph->ip_id = htons(++ip_id);
1750 	niph->ip_len = htons(msgsize(nmp->b_cont) + iphlen + tcphlen);
1751 	ntcph = (struct tcphdr *)(nmp->b_rptr + ehlen + iphlen);
1752 	tcp_seq += mss;
1753 #ifdef __sparc
1754 	tcp_seq_tmp = htonl(tcp_seq);
1755 	bcopy(&tcp_seq_tmp, (char *)&ntcph->th_seq, 4);
1756 #else
1757 	ntcph->th_seq = htonl(tcp_seq);
1758 #endif
1759 	ntcph->th_flags = (otcph->th_flags & ~TH_URG);
1760 
1761 	DB_CKSUMFLAGS(nmp) = (uint16_t)hckflags;
1762 	DB_CKSUMSTART(nmp) = start_offset;
1763 	DB_CKSUMSTUFF(nmp) = stuff_offset;
1764 
1765 	/* calculate IP checksum and TCP pseudo header checksum */
1766 	niph->ip_sum = 0;
1767 	niph->ip_sum = (uint16_t)nxge_csgen((uint16_t *)niph, iphlen);
1768 
1769 	l4_len = ntohs(niph->ip_len) - iphlen;
1770 	sum = htons(l4_len) + l4cksum;
1771 	sum = (sum & 0xFFFF) + (sum >> 16);
1772 	ntcph->th_sum = (sum & 0xffff);
1773 
1774 	NXGE_DEBUG_MSG((NULL, TX_CTL,
1775 	    "==> nxge_do_softlso: last next "
1776 	    "niph->ip_sum 0x%x "
1777 	    "ntcph->th_sum 0x%x sum 0x%x "
1778 	    "dump last ip->tcp %s "
1779 	    "cmp $%p mp $%p (mp_chain $%p) pktlen %d (0x%x) "
1780 	    "l4_len %d (0x%x) "
1781 	    "MBLKL(mp): %d, MBLKL(datamp): %d ",
1782 	    niph->ip_sum,
1783 	    ntcph->th_sum, sum,
1784 	    nxge_dump_packet((char *)niph, 52),
1785 	    cmp, nmp, mp_chain,
1786 	    pktlen, pktlen,
1787 	    l4_len,
1788 	    l4_len,
1789 	    (int)MBLKL(mp), (int)MBLKL(datamp)));
1790 
1791 cleanup_allocated_msgs:
1792 	if (do_cleanup) {
1793 		NXGE_DEBUG_MSG((NULL, TX_CTL,
1794 		    "==> nxge_do_softlso: "
1795 		    "Failed allocating messages, "
1796 		    "have to clean up and fail!"));
1797 		while (mp_chain != NULL) {
1798 			nmp = mp_chain;
1799 			mp_chain = mp_chain->b_next;
1800 			freemsg(nmp);
1801 		}
1802 	}
1803 	/*
1804 	 * We're done here, so just free the original message and return the
1805 	 * new message chain, that could be NULL if failed, back to the caller.
1806 	 */
1807 	freemsg(mp);
1808 
1809 	NXGE_DEBUG_MSG((NULL, TX_CTL,
1810 	    "<== nxge_do_softlso:mp_chain $%p", mp_chain));
1811 	return (mp_chain);
1812 }
1813 
1814 /*
1815  * Will be called before NIC driver do further operation on the message.
1816  * The input message may include LSO information, if so, go to softlso logic
1817  * to eliminate the oversized LSO packet for the incapable underlying h/w.
1818  * The return could be the same non-LSO message or a message chain for LSO case.
1819  *
1820  * The driver needs to call this function per packet and process the whole chain
1821  * if applied.
1822  */
1823 static mblk_t *
1824 nxge_lso_eliminate(mblk_t *mp)
1825 {
1826 	uint32_t lsoflags;
1827 	uint32_t mss;
1828 
1829 	NXGE_DEBUG_MSG((NULL, TX_CTL,
1830 	    "==>nxge_lso_eliminate:"));
1831 	nxge_lso_info_get(mp, &mss, &lsoflags);
1832 
1833 	if (lsoflags & HW_LSO) {
1834 		mblk_t *nmp;
1835 
1836 		NXGE_DEBUG_MSG((NULL, TX_CTL,
1837 		    "==>nxge_lso_eliminate:"
1838 		    "HW_LSO:mss %d mp $%p",
1839 		    mss, mp));
1840 		if ((nmp = nxge_do_softlso(mp, mss)) != NULL) {
1841 			NXGE_DEBUG_MSG((NULL, TX_CTL,
1842 			    "<== nxge_lso_eliminate: "
1843 			    "LSO: nmp not NULL nmp $%p mss %d mp $%p",
1844 			    nmp, mss, mp));
1845 			return (nmp);
1846 		} else {
1847 			NXGE_DEBUG_MSG((NULL, TX_CTL,
1848 			    "<== nxge_lso_eliminate_ "
1849 			    "LSO: failed nmp NULL nmp $%p mss %d mp $%p",
1850 			    nmp, mss, mp));
1851 			return (NULL);
1852 		}
1853 	}
1854 
1855 	NXGE_DEBUG_MSG((NULL, TX_CTL,
1856 	    "<== nxge_lso_eliminate"));
1857 	return (mp);
1858 }
1859 
1860 static uint32_t
1861 nxge_csgen(uint16_t *adr, int len)
1862 {
1863 	int		i, odd;
1864 	uint32_t	sum = 0;
1865 	uint32_t	c = 0;
1866 
1867 	odd = len % 2;
1868 	for (i = 0; i < (len / 2); i++) {
1869 		sum += (adr[i] & 0xffff);
1870 	}
1871 	if (odd) {
1872 		sum += adr[len / 2] & 0xff00;
1873 	}
1874 	while ((c = ((sum & 0xffff0000) >> 16)) != 0) {
1875 		sum &= 0xffff;
1876 		sum += c;
1877 	}
1878 	return (~sum & 0xffff);
1879 }
1880