xref: /titanic_41/usr/src/uts/common/io/ntxn/nic_cmn.h (revision 93c20f2609342fd05f6625f16dfcb9348e7977f2)
1 /*
2  * CDDL HEADER START
3  *
4  * The contents of this file are subject to the terms of the
5  * Common Development and Distribution License (the "License").
6  * You may not use this file except in compliance with the License.
7  *
8  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9  * or http://www.opensolaris.org/os/licensing.
10  * See the License for the specific language governing permissions
11  * and limitations under the License.
12  *
13  * When distributing Covered Code, include this CDDL HEADER in each
14  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15  * If applicable, add the following below this CDDL HEADER, with the
16  * fields enclosed by brackets "[]" replaced with your own identifying
17  * information: Portions Copyright [yyyy] [name of copyright owner]
18  *
19  * CDDL HEADER END
20  */
21 /*
22  * Copyright 2008 NetXen, Inc.  All rights reserved.
23  * Use is subject to license terms.
24  */
25 #ifndef UNM_NIC_CMN_H
26 #define	UNM_NIC_CMN_H
27 
28 #ifndef sun
29 #include "unm_nic_config.h"
30 #include "unm_compiler_defs.h"
31 #endif
32 
33 #define	IP_ALIGNMENT_BYTES		2  /* make ip aligned on 16byteaddr */
34 #define	P2_MAX_MTU			(8000)
35 #define	P3_MAX_MTU			(9600)
36 #define	NX_ETHERMTU			1500
37 #define	NX_MAX_ETHERHDR			32 /* This contains some padding */
38 
39 #define	NX_RX_NORMAL_BUF_MAX_LEN	(NX_MAX_ETHERHDR + NX_ETHERMTU)
40 #define	NX_P2_RX_JUMBO_BUF_MAX_LEN	(NX_MAX_ETHERHDR + P2_MAX_MTU)
41 #define	NX_P3_RX_JUMBO_BUF_MAX_LEN	(NX_MAX_ETHERHDR + P3_MAX_MTU)
42 
43 #define	MAX_RX_LRO_BUFFER_LENGTH	((8*1024) - 512)
44 #define	RX_LRO_DMA_MAP_LEN		(MAX_RX_LRO_BUFFER_LENGTH -\
45 					    IP_ALIGNMENT_BYTES)
46 
47 /* Opcodes to be used with the commands */
48 #define	TX_ETHER_PKT	0x01
49 /* The following opcodes are for IP checksum    */
50 #define	TX_TCP_PKT		0x02
51 #define	TX_UDP_PKT		0x03
52 #define	TX_IP_PKT		0x04
53 #define	TX_TCP_LSO		0x05
54 #define	TX_IPSEC		0x06
55 #define	TX_IPSEC_CMD	0x07
56 
57 #define	NETXEN_MAC_NOOP		0
58 #define	NETXEN_MAC_ADD		1
59 #define	NETXEN_MAC_DEL		2
60 
61 /* The following opcodes are for internal consumption. */
62 #define	UNM_CONTROL_OP		0x10
63 #define	PEGNET_REQUEST		0x11
64 #define	NX_HOST_REQUEST		0x13
65 #define	NX_NIC_REQUEST		0x14
66 #define	NX_NIC_LRO_REQUEST	0x15
67 
68 #define	NX_MAC_EVENT		0x1
69 
70 enum {
71 	NX_NIC_H2C_OPCODE_START = 0,
72 	NX_NIC_H2C_OPCODE_CONFIG_RSS,
73 	NX_NIC_H2C_OPCODE_CONFIG_RSS_TBL,
74 	NX_NIC_H2C_OPCODE_CONFIG_INTR_COALESCE,
75 	NX_NIC_H2C_OPCODE_CONFIG_LED,
76 	NX_NIC_H2C_OPCODE_CONFIG_PROMISCUOUS,
77 	NX_NIC_H2C_OPCODE_CONFIG_L2_MAC,
78 	NX_NIC_H2C_OPCODE_LRO_REQUEST,
79 	NX_NIC_H2C_OPCODE_GET_SNMP_STATS,
80 	NX_NIC_H2C_OPCODE_PROXY_START_REQUEST,
81 	NX_NIC_H2C_OPCODE_PROXY_STOP_REQUEST,
82 	NX_NIC_H2C_OPCODE_PROXY_SET_MTU,
83 	NX_NIC_H2C_OPCODE_PROXY_SET_VPORT_MISS_MODE,
84 	NX_H2P_OPCODE_GET_FINGER_PRINT_REQUEST,
85 	NX_H2P_OPCODE_INSTALL_LICENSE_REQUEST,
86 	NX_H2P_OPCODE_GET_LICENSE_CAPABILITY_REQUEST,
87 	NX_NIC_H2C_OPCODE_GET_NET_STATS,
88 	NX_NIC_H2C_OPCODE_LAST
89 };
90 
91 #define	VPORT_MISS_MODE_DROP			0 /* drop all unmatched */
92 #define	VPORT_MISS_MODE_ACCEPT_ALL		1 /* accept all packets */
93 #define	VPORT_MISS_MODE_ACCEPT_MULTI	2 /* accept unmatched multicast */
94 
95 #ifdef UNM_RSS
96 #define	RSS_CNTRL_CMD		0x20
97 #endif
98 #define	MAX_NUM_CARDS		4
99 #define	MAX_NUM_PORTS		4 /* Deprecated. donot use this */
100 #define	MAX_NIU_PORTS		MAX_NUM_PORTS
101 #define	PORT1				0
102 #define	PORT2				1
103 #define	PORT3				2
104 #define	PORT4				3
105 
106 
107 #define	DESC_CHAIN		0xFF /* descriptor command continuation */
108 
109 #define	MAX_BUFFERS_PER_CMD		16
110 #define	MAX_BUFFERS_PER_DESC	4
111 
112 #define	NX_P2_C0				0x24
113 #define	NX_P2_C1				0x25
114 
115 #define	DUMMY_BUF_UNINIT	0x55555555
116 #define	DUMMY_BUF_INIT		0
117 
118 /*
119  * Following are the states of the Phantom. Phantom will set them and
120  * Host will read to check if the fields are correct.
121  */
122 #define	PHAN_INITIALIZE_START		0xff00
123 #define	PHAN_INITIALIZE_FAILED		0xffff
124 #define	PHAN_INITIALIZE_COMPLETE	0xff01
125 
126 /* Host writes the following to notify that it has done the init-handshake */
127 #define	PHAN_INITIALIZE_ACK			0xf00f
128 
129 /* Following defines will be used in the status descriptor */
130 #define	TX_ETHER_PKT_COMPLETE  0xB  /* same for both commands */
131 
132 #define	NUM_RCV_DESC_RINGS		3 /* No of Rcv Descriptor contexts */
133 
134 /* descriptor types */
135 #define	RCV_DESC_NORMAL			0x01
136 #define	RCV_DESC_JUMBO			0x02
137 #define	RCV_DESC_LRO			0x04
138 #define	RCV_DESC_NORMAL_CTXID	0
139 #define	RCV_DESC_JUMBO_CTXID	1
140 #define	RCV_DESC_LRO_CTXID		2
141 
142 #define	RCV_DESC_TYPE(ID) \
143 	((ID == RCV_DESC_JUMBO_CTXID) ? RCV_DESC_JUMBO :  \
144 	    ((ID == RCV_DESC_LRO_CTXID) ? RCV_DESC_LRO : (RCV_DESC_NORMAL)))
145 
146 #define	RCV_DESC_TYPE_NAME(ID) \
147 	((ID	==	RCV_DESC_JUMBO_CTXID)	?	"Jumbo"	:	\
148 	(ID == RCV_DESC_LRO_CTXID)    ? "LRO"    :  \
149 	(ID == RCV_DESC_NORMAL_CTXID) ? "Normal" : "Unknown")
150 
151 #define	MAX_CMD_DESCRIPTORS			4096
152 #define	MAX_CMD_DESCRIPTORS_HOST	(MAX_CMD_DESCRIPTORS / 4)
153 
154 #define	MAX_RCV_DESCRIPTORS			8192
155 #define	MAX_JUMBO_RCV_DESCRIPTORS	1024
156 #define	MAX_LRO_RCV_DESCRIPTORS		16
157 
158 #define	NX_MAX_SUPPORTED_RDS_SIZE	(32 * 1024)
159 #define	NX_MAX_SUPPORTED_JUMBO_RDS_SIZE	(4 * 1024)
160 
161 #define	PHAN_PEG_RCV_INITIALIZED		0xff01
162 #define	PHAN_PEG_RCV_START_INITIALIZE	0xff00
163 
164 #define	get_next_index(index, length)  ((((index)  + 1) == length)?0:(index) +1)
165 
166 #define	get_index_range(index, length, count)	\
167 	((((index) + (count)) >= length)? \
168 		(((index)  + (count))-(length)):((index) + (count)))
169 
170 #define	UNM_FLOW_TICKS_PER_SEC    2048
171 #define	UNM_FLOW_TO_TV_SHIFT_SEC  11
172 #define	UNM_FLOW_TO_TV_SHIFT_USEC 9
173 #define	UNM_FLOW_TICK_USEC   (1000000ULL/UNM_FLOW_TICKS_PER_SEC)
174 #define	UNM_GLOBAL_TICKS_PER_SEC  (4*UNM_FLOW_TICKS_PER_SEC)
175 #define	UNM_GLOBAL_TICK_USEC (1000000ULL/UNM_GLOBAL_TICKS_PER_SEC)
176 
177 
178 /*
179  * Following data structures describe the descriptors that will be used.
180  * Added fileds of tcpHdrSize and ipHdrSize, The driver needs to do it only when
181  * we are doing LSO (above the 1500 size packet) only.
182  * This is an overhead but we need it. Let me know if you have questions.
183  */
184 
185 /*
186  * the size of reference handle been changed to 16 bits to pass the MSS fields
187  * for the LSO packet
188  */
189 
190 #define	FLAGS_CHECKSUM_ENABLED		0x01
191 #define	FLAGS_LSO_ENABLED			0x02
192 #define	FLAGS_IPSEC_SA_ADD			0x04
193 #define	FLAGS_IPSEC_SA_DELETE		0x08
194 #define	FLAGS_VLAN_TAGGED			0x10
195 
196 #if UNM_CONF_PROCESSOR == UNM_CONF_X86
197 
198 #ifndef U64
199 typedef unsigned long long U64;
200 typedef uint32_t U32;
201 typedef uint16_t U16;
202 typedef uint8_t  U8;
203 #endif
204 
205 #endif
206 
207 #define	NUM_SUPPORTED_RINGSETS	4
208 #define	MAX_RING_CTX			4
209 #define	UNM_CTX_SIGNATURE		0xdee0
210 #define	UNM_CTX_RESET			0xbad0
211 #define	UNM_CTX_D3_RESET		0xacc0
212 
213 /* define opcode for ctx_msg */
214 #define	RX_PRODUCER				0
215 #define	RX_PRODUCER_JUMBO		1
216 #define	RX_PRODUCER_LRO			2
217 #define	TX_PRODUCER				3
218 #define	UPDATE_STATUS_CONSUMER	4
219 #define	RESET_CTX				5
220 
221 #define	NUM_DB_CODE				6
222 
223 #define	UNM_RCV_PRODUCER(ringid)	(ringid)
224 #define	UNM_CMD_PRODUCER			TX_PRODUCER
225 #define	UNM_RCV_STATUS_CONSUMER		UPDATE_STATUS_CONSUMER
226 
227 typedef struct __msg
228 {
229     __uint32_t  PegId:2,   // 0x2 for tx and 01 for rx.
230 			    privId:1, // must be 1
231 			    Count:15, // for doorbell
232 			    CtxId:10, // Ctx_id
233 			    Opcode:4; /* opcode */
234 }ctx_msg, CTX_MSG, *PCTX_MSG;
235 
236 typedef struct __int_msg
237 {
238     __uint32_t  Count:18, // INT
239 			    ConsumerIdx:10,
240 			    CtxId:4; // Ctx_id
241 
242 }int_msg, INT_MSG, *PINT_MSG;
243 
244 /* For use in CRB_MPORT_MODE */
245 #define	MPORT_SINGLE_FUNCTION_MODE	0x1111
246 #define	MPORT_MULTI_FUNCTION_MODE	0x2222
247 
248 typedef struct _RcvContext
249 {
250 	__uint32_t		RcvRingAddrLo;
251 	__uint32_t		RcvRingAddrHi;
252 	__uint32_t		RcvRingSize;
253 	__uint32_t		Rsrv;
254 }RcvContext;
255 
256 typedef struct PREALIGN(64) _RingContext
257 {
258 
259 	/* one command ring */
260 	__uint64_t		CMD_CONSUMER_OFFSET;
261 	__uint32_t		CmdRingAddrLo;
262 	__uint32_t		CmdRingAddrHi;
263 	__uint32_t		CmdRingSize;
264 	__uint32_t		Rsrv;
265 
266 	/* three receive rings */
267 	RcvContext		RcvContext[3];
268 
269 	/* one status ring */
270 	__uint32_t		StsRingAddrLo;
271 	__uint32_t		StsRingAddrHi;
272 	__uint32_t		StsRingSize;
273 
274 	__uint32_t		CtxId;
275 
276     __uint64_t		D3_STATE_REGISTER;
277     __uint32_t		DummyDmaAddrLo;
278     __uint32_t		DummyDmaAddrHi;
279 
280 }POSTALIGN(64) RingContext, RING_CTX, *PRING_CTX;
281 
282 #ifdef UNM_RSS
283 /*
284  * RSS_SreInfo{} has the information for SRE to calculate the hash value
285  * Will be passed by the host=> as part of comd descriptor...
286  */
287 
288 #if UNM_CONF_PROCESSOR == UNM_CONF_X86
289 typedef struct _RSS_SreInfo {
290 	U32		HashKeySize;
291 	U32		HashInformation;
292 	char	key[40];
293 }RSS_SreInfo;
294 #endif
295 
296 /*
297  * The following Descriptor is used to send RSS commands to the
298  * PEG.... to be do the SRE registers..
299  */
300 typedef struct PREALIGN(64) _rssCmdDesc
301 {
302 
303 	/*
304 	 * To keep the opcode at the same location as
305 	 * the cmdDescType0, we will have to breakup the key into
306 	 * 2 areas.... Dont like it but for now will do... FSL
307 	 */
308 
309 #if UNM_CONF_PROCESSOR == UNM_CONF_X86
310 	U8		Key0[16];
311 
312 	U64		HashMethod:32,
313 			HashKeySize:8,
314 			Unused:	16,
315 			opcode:8;
316 
317 	U8		Key1[24];
318 	U64		Unused1;
319 	U64		Unused2;
320 #else
321 
322 	unm_msgword_t		Key0[2];
323 	unm_halfmsgword_t	HashMethod;
324     unm_halfmsgword_t
325 						HashKeySize:8,
326 						Unused:16,
327 						opcode:8;
328 
329     unm_msgword_t    Key1[3];
330     unm_msgword_t    Unused1;
331     unm_msgword_t    Unused2;
332 
333 #endif
334 
335 } POSTALIGN(64) rssCmdDesc_t;
336 
337 
338 #endif /* UNM_RSS */
339 
340 
341 typedef struct PREALIGN(64) cmdDescType0
342 {
343 	union {
344 		struct {
345 			__uint32_t	tcpHdrOffset:8, /* For LSO only */
346 						ipHdrOffset:8,  // For LSO only
347 						flags:7, /* as defined above */
348 			/* This location/size must not change... */
349 						opcode:6,
350 						Unused:3;
351 			/* total number of segments (buffers */
352 			__uint32_t	numOfBuffers:8,
353 			/* for this packet. (could be more than 4) */
354 
355 						/* Total size of the packet */
356 						totalLength:24;
357 	}s1;
358 	__uint64_t	word0;
359 	}u1;
360 
361     union {
362 		struct {
363 			__uint32_t AddrLowPart2;
364 			__uint32_t AddrHighPart2;
365 		}s1;
366 		__uint64_t AddrBuffer2;
367 		__uint64_t	word1;
368 	}u2;
369 
370 	union {
371 		struct {
372 					/* changed to U16 to add mss */
373 			__uint32_t	referenceHandle:16,
374 					/* passed by NDIS_PACKET for LSO */
375 						mss:16;
376 			__uint32_t	port:4,
377 						ctx_id:4,
378 					/* LSO only : MAC+IP+TCP Hdr size */
379 						totalHdrLength:8,
380 					/* IPSec offoad only */
381 						connID:16;
382 		}s1;
383 		__uint64_t	word2;
384 	}u3;
385 
386 	union {
387 		struct {
388 			__uint32_t AddrLowPart3;
389 			__uint32_t AddrHighPart3;
390 		}s1;
391 		__uint64_t AddrBuffer3;
392 		__uint64_t	word3;
393 	}u4;
394 
395 	union {
396 		struct {
397 			__uint32_t AddrLowPart1;
398 			__uint32_t AddrHighPart1;
399 		}s1;
400 		__uint64_t AddrBuffer1;
401 		__uint64_t	word4;
402 	}u5;
403 
404 	union {
405 		struct {
406 			__uint32_t	buffer1Length:16,
407 						buffer2Length:16;
408 			__uint32_t  buffer3Length:16,
409 						buffer4Length:16;
410 		}s1;
411 		__uint64_t	word5;
412 	}u6;
413 
414 	union {
415 		struct {
416 			__uint32_t AddrLowPart4;
417 			__uint32_t AddrHighPart4;
418 		}s1;
419 		__uint64_t AddrBuffer4;
420 		__uint64_t	word6;
421 	}u7;
422 
423     __uint64_t unused;
424 
425 } POSTALIGN(64) cmdDescType0_t;
426 
427 /* Note: sizeof(rcvDesc) should always be a mutliple of 2 */
428 typedef struct rcvDesc
429 {
430     __uint32_t	referenceHandle:16,
431 				flags:16;
432     __uint32_t
433 		/* allocated buffer length (usually 2K) */
434 				bufferLength:32;
435 	__uint64_t	AddrBuffer;
436 }  rcvDesc_t;
437 
438 /* for status field in statusDesc_t */
439 #define	STATUS_NEED_CKSUM		(1)
440 #define	STATUS_CKSUM_OK			(2)
441 #define	STATUS_CKSUM_NOT_OK		(3)
442 
443 /* owner bits of statusDesc_t */
444 #define	STATUS_OWNER_HOST		(1ULL)
445 #define	STATUS_OWNER_PHANTOM	(2ULL)
446 #define	HOST_STATUS_DESC		((STATUS_OWNER_HOST) << 48)
447 #define	PHANTOM_STATUS_DESC		((STATUS_OWNER_PHANTOM) << 48)
448 
449 #define	UNM_PROT_IP			(1)
450 #define	UNM_PROT_UNKNOWN	(0)
451 
452 /* LRO specific bits of statusDesc_t */
453 #define	LRO_LAST_FRAG			(1)
454 #define	LRO_NORMAL_FRAG			(0)
455 #define	LRO_LAST_FRAG_DESC		((LRO_LAST_FRAG)<<63)
456 #define	LRO_NORMAL_FRAG_DESC	((LRO_NORMAL_FRAG)<<63)
457 
458 typedef struct PREALIGN(16) statusDesc {
459     union {
460 		struct {
461 					/* initially to be used but noe now */
462 			__uint32_t	port:4,
463 					/* completion status may not have use */
464 						status:4,
465 					/* type/index of descriptor ring */
466 						type:4,
467 					/* NIC mode...no use yet */
468 						totalLength:16,
469 					/* handle for the associated packet */
470 						referenceHandle_lo:4;
471 					/* handle for the associated packet */
472 			__uint32_t	referenceHandle_hi:12,
473 					/* Pkt protocol */
474 						prot:4,
475 						pkt_offset:5,
476 /*
477  * This indicates the num of descriptors part of this descriptor chain.
478  */
479 						descCnt:3,
480 						owner:2,
481 						opcode:6;
482 
483 			__uint32_t	HashValue;
484 			__uint16_t	vlan;
485 			__uint8_t	HashType;
486 
487 		union {
488 			/*
489 			 * For LRO count is set
490 			 * Last LRO fragment is set when it is
491 			 * the last frag as the name says.
492 			 */
493 			__uint8_t	lro_frag:7, last_lro_frag:1;
494 
495 			/*
496 			 * Used to indicate direction in case
497 			 * of captured packets. Egress will
498 			 * contain EPG input, while ingress
499 			 * contains an skb copy.
500 			 */
501 #define	NX_CAP_DIRN_OUT	1
502 #define	NX_CAP_DIRN_IN	2
503 			__uint8_t direction;
504 
505 			/*
506 			 * Currently for Legacy this is 0.
507 			 */
508 			__uint8_t	nr_frags;
509 		}u11;
510 
511 		}s1;
512 		__uint64_t	 body[2];
513 		}u1;
514 
515 } POSTALIGN(16) statusDesc_t;
516 
517 
518 #define	STATUS_OWNER_NAME(sd) \
519 	(((sd)->u1.s1.owner == STATUS_OWNER_HOST) ? "Host" : "Phantom")
520 
521 #ifdef	UNM_IPSECOFFLOAD
522 
523 #define	MAX_IPSEC_SAS			1024
524 #define	RECEIVE_IPSEC_SA_BASE	0x8000
525 
526 /*
527  * IPSEC related structures and defines
528  */
529 
530 /* Values for DIrFlag in the ipsec_sa_t structure below: */
531 #define	UNM_IPSEC_SA_DIR_INBOUND	1
532 #define	UNM_IPSEC_SA_DIR_OUTBOUND	2
533 
534 /* Values for Operation Field below: */
535 #define	UNM_IPSEC_SA_AUTHENTICATE	1
536 #define	UNM_IPSEC_SA_ENDECRYPT		2
537 
538 /* COnfidential Algorithm Types: */
539 #define	UNM_IPSEC_CONF_NONE			0    // NULL encryption?
540 #define	UNM_IPSEC_CONF_DES			1
541 #define	UNM_IPSEC_CONF_RESERVED		2
542 #define	UNM_IPSEC_CONF_3DES			3
543 
544 /* Integrity algorithm (AH) types: */
545 #define	UNM_IPSEC_INTEG_NONE	0
546 #define	UNM_IPSEC_INTEG_MD5		1
547 #define	UNM_IPSEC_INTEG_SHA1	2
548 
549 #define	UNM_PROTOCOL_OFFSET		0x9    // from ip header begin, in bytes
550 #define	UNM_PKT_TYPE_AH			0x33
551 #define	UNM_PKT_TYPE_ESP		0x32
552 
553 
554 /* 96 bits of output for MD5/SHA1 algorithms */
555 #define	UNM_AHOUTPUT_LENGTH		12
556 /*
557  * 8 bytes (64 bits) of ICV value for each block of DES_CBC
558  * at the begin of ESP payload
559  */
560 #define	UNM_DES_ICV_LENGTH		8
561 
562 #if UNM_CONF_PROCESSOR == UNM_CONF_X86
563 
564 typedef struct PREALIGN(512) s_ipsec_sa {
565     U32	SrcAddr;
566 	U32	SrcMask;
567 	U32	DestAddr;
568 	U32	DestMask;
569 	U32	Protocol:8,
570 		DirFlag:4,
571 		IntegCtxInit:2,
572 		ConfCtxInit:2,
573 		No_of_keys:8,
574 		Operation:8;
575 	U32	IntegAlg:8,
576 		IntegKeyLen:8,
577 		ConfAlg:8,
578 		ConfAlgKeyLen:8;
579 	U32	SAIndex;
580 	U32	SPI_Id;
581 	U64	Key1[124];
582 } POSTALIGN(512) unm_ipsec_sa_t;
583 
584 #else
585 
586 typedef struct PREALIGN(512) s_ipsec_sa {
587 	unm_halfmsgword_t	SrcAddr;
588 	unm_halfmsgword_t	SrcMask;
589 	unm_halfmsgword_t	DestAddr;
590 	unm_halfmsgword_t	DestMask;
591 	unm_halfmsgword_t	Protocol:8,
592 						DirFlag:4,
593 						IntegCtxInit:2,
594 						ConfCtxInit:2,
595 						No_of_keys:8,
596 						Operation:8;
597 	unm_halfmsgword_t	IntegAlg:8,
598 						IntegKeyLen:8,
599 						ConfAlg:8,
600 						ConfAlgKeyLen:8;
601 	unm_halfmsgword_t	SAIndex:32;
602 	unm_halfmsgword_t	SPI_Id:32;
603 	/* to round up to 1K of structure */
604 	unm_msgword_t		Key1[124];
605 } POSTALIGN(512) unm_ipsec_sa_t;
606 
607 #endif /* NOT-X86 */
608 
609 /* Other common header formats that may be needed */
610 
611 typedef struct _unm_ip_header_s {
612 	U32	HdrVer:8,
613 		diffser:8,
614 		TotalLength:16;
615 	U32	ipId:16,
616 		flagfrag:16;
617 	U32	TTL:8,
618 		Protocol:8,
619 		Chksum:16;
620 	U32	srcaddr;
621 	U32	destaddr;
622 } unm_ip_header_t;
623 
624 typedef struct _unm_ah_header_s {
625 	U32	NextProto:8,
626 		length:8,
627 		reserved:16;
628     U32    SPI;
629     U32    seqno;
630     U16    ICV;
631     U16    ICV1;
632     U16    ICV2;
633     U16    ICV3;
634     U16    ICV4;
635     U16    ICV5;
636 } unm_ah_header_t;
637 
638 typedef struct _unm_esp_hdr_s {
639     U32 SPI;
640     U32 seqno;
641 } unm_esp_hdr_t;
642 
643 #endif /* UNM_IPSECOFFLOAD */
644 
645 /*
646  * Defines for various loop counts. These determine the behaviour of the
647  * system. The classic tradeoff between latency and throughput.
648  */
649 
650 /*
651  * MAX_DMA_LOOPCOUNT : After how many interations do we start the dma for
652  * the status descriptors.
653  */
654 #define	MAX_DMA_LOOPCOUNT    (32)
655 
656 /*
657  * MAX_TX_DMA_LOOP_COUNT : After how many interations do we start the dma for
658  * the command descriptors.
659  */
660 #define	MAX_TX_DMA_LOOP_COUNT    1000
661 
662 /*
663  * MAX_RCV_BUFS : Max number Rx packets that can be buffered before DMA/INT
664  */
665 #define	MAX_RCV_BUFS	(4096)
666 
667 /*
668  * XXX;shouldnt be exposed in nic_cmn.h
669  * DMA_MAX_RCV_BUFS : Max number Rx packets that can be buffered before DMA
670  */
671 #define	DMA_MAX_RCV_BUFS	(4096)
672 
673 /*
674  * XXX;shouldnt be exposed in nic_cmn.h
675  * MAX_DMA_ENTRIES : Max number Rx dma entries can be in dma list
676  */
677 #define	MAX_DMA_ENTRIES		(4096)
678 
679 
680 /*
681  * MAX_INTR_LOOPCOUNT : After how many iterations do we interrupt the
682  * host ?
683  */
684 #define	MAX_INTR_LOOPCOUNT		(1024)
685 
686 /*
687  * XMIT_LOOP_THRESHOLD : How many times do we spin before we process the
688  * transmit buffers.
689  */
690 #define	XMIT_LOOP_THRESHOLD		0x20
691 
692 /*
693  * XMIT_DESC_THRESHOLD : How many descriptors pending before we process
694  * the descriptors.
695  */
696 #define	XMIT_DESC_THRESHOLD		0x4
697 
698 /*
699  * TX_DMA_THRESHOLD : When do we start the dma of the command descriptors.
700  * We need these number of command descriptors, or we need to exceed the
701  * loop count.   P1 only.
702  */
703 #define	TX_DMA_THRESHOLD		16
704 
705 #if defined(UNM_IP_FILTER)
706 /*
707  * Commands. Must match the definitions in nic/Linux/include/unm_nic_ioctl.h
708  */
709 enum {
710     UNM_IP_FILTER_CLEAR = 1,
711     UNM_IP_FILTER_ADD,
712     UNM_IP_FILTER_DEL,
713     UNM_IP_FILTER_SHOW
714 };
715 
716 #define	MAX_FILTER_ENTRIES		16
717 
718 typedef struct {
719     __int32_t count;
720     __uint32_t ip_addr[15];
721 } unm_ip_filter_t;
722 #endif /* UNM_IP_FILTER */
723 
724 enum {
725     UNM_RCV_PEG_0 = 0,
726     UNM_RCV_PEG_1
727 };
728 
729 #endif /* !UNM_NIC_CMN_H */
730