1 /* 2 * CDDL HEADER START 3 * 4 * The contents of this file are subject to the terms of the 5 * Common Development and Distribution License (the "License"). 6 * You may not use this file except in compliance with the License. 7 * 8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 9 * or http://www.opensolaris.org/os/licensing. 10 * See the License for the specific language governing permissions 11 * and limitations under the License. 12 * 13 * When distributing Covered Code, include this CDDL HEADER in each 14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 15 * If applicable, add the following below this CDDL HEADER, with the 16 * fields enclosed by brackets "[]" replaced with your own identifying 17 * information: Portions Copyright [yyyy] [name of copyright owner] 18 * 19 * CDDL HEADER END 20 */ 21 22 /* 23 * Copyright 2009 Sun Microsystems, Inc. All rights reserved. 24 * Use is subject to license terms. 25 */ 26 27 #ifndef _SYS_NGE_H 28 #define _SYS_NGE_H 29 30 #ifdef __cplusplus 31 extern "C" { 32 #endif 33 34 35 #include <sys/types.h> 36 #include <sys/stream.h> 37 #include <sys/strsun.h> 38 #include <sys/strsubr.h> 39 #include <sys/stat.h> 40 #include <sys/pci.h> 41 #include <sys/note.h> 42 #include <sys/modctl.h> 43 #include <sys/kstat.h> 44 #include <sys/ethernet.h> 45 #include <sys/pattr.h> 46 #include <sys/errno.h> 47 #include <sys/dlpi.h> 48 #include <sys/devops.h> 49 #include <sys/debug.h> 50 #include <sys/conf.h> 51 #include <sys/callb.h> 52 53 #include <netinet/ip6.h> 54 55 #include <inet/common.h> 56 #include <inet/ip.h> 57 #include <netinet/udp.h> 58 #include <inet/mi.h> 59 #include <inet/nd.h> 60 61 #include <sys/ddi.h> 62 #include <sys/sunddi.h> 63 64 #include <sys/mac_provider.h> 65 #include <sys/mac_ether.h> 66 67 /* 68 * Reconfiguring the network devices requires the net_config privilege 69 * in Solaris 10+. 70 */ 71 extern int secpolicy_net_config(const cred_t *, boolean_t); 72 73 #include <sys/netlb.h> 74 #include <sys/miiregs.h> 75 76 #include "nge_chip.h" 77 78 #define PIO_ADDR(ngep, offset) ((void *)((caddr_t)(ngep)->io_regs+(offset))) 79 /* 80 * Copy an ethernet address 81 */ 82 #define ethaddr_copy(src, dst) bcopy((src), (dst), ETHERADDRL) 83 #define ether_eq(a, b) (bcmp((caddr_t)(a), (caddr_t)(b), (ETHERADDRL)) == 0) 84 85 #define BIS(w, b) (((w) & (b)) ? B_TRUE : B_FALSE) 86 #define BIC(w, b) (((w) & (b)) ? B_FALSE : B_TRUE) 87 #define UPORDOWN(x) ((x) ? "up" : "down") 88 89 #define NGE_DRIVER_NAME "nge" 90 91 /* 92 * 'Progress' bit flags ... 93 */ 94 #define PROGRESS_CFG 0x0001 /* config space mapped */ 95 #define PROGRESS_REGS 0x0002 /* registers mapped */ 96 #define PROGRESS_BUFS 0x0004 /* registers mapped */ 97 #define PROGRESS_RESCHED 0x0008 /* resched softint registered */ 98 #define PROGRESS_FACTOTUM 0x0010 /* factotum softint registered */ 99 #define PROGRESS_SWINT 0x0020 /* s/w interrupt registered */ 100 #define PROGRESS_INTR 0x0040 /* h/w interrupt registered */ 101 /* and mutexen initialised */ 102 #define PROGRESS_HWINT 0x0080 103 #define PROGRESS_PHY 0x0100 /* PHY initialised */ 104 #define PROGRESS_NDD 0x0200 /* NDD parameters set up */ 105 #define PROGRESS_KSTATS 0x0400 /* kstats created */ 106 #define PROGRESS_READY 0x0800 /* ready for work */ 107 108 #define NGE_HW_ERR 0x00 109 #define NGE_HW_LINK 0x01 110 #define NGE_HW_BM 0x02 111 #define NGE_HW_RCHAN 0x03 112 #define NGE_HW_TCHAN 0x04 113 #define NGE_HW_ROM 0x05 114 #define NGE_SW_PROBLEM_ID 0x06 115 116 117 /* 118 * NOTES: 119 * 120 * #defines: 121 * 122 * NGE_PCI_CONFIG_RNUMBER and NGE_PCI_OPREGS_RNUMBER are the 123 * register-set numbers to use for the config space registers 124 * and the operating registers respectively. On an OBP-based 125 * machine, regset 0 refers to CONFIG space, and regset 1 will 126 * be the operating registers in MEMORY space. If an expansion 127 * ROM is fitted, it may appear as a further register set. 128 * 129 * NGE_DMA_MODE defines the mode (STREAMING/CONSISTENT) used 130 * for the data buffers. The descriptors are always set up 131 * in CONSISTENT mode. 132 * 133 * NGE_HEADROOM defines how much space we'll leave in allocated 134 * mblks before the first valid data byte. This should be chosen 135 * to be 2 modulo 4, so that once the ethernet header (14 bytes) 136 * has been stripped off, the packet data will be 4-byte aligned. 137 * The remaining space can be used by upstream modules to prepend 138 * any headers required. 139 */ 140 141 142 #define NGE_PCI_OPREGS_RNUMBER 1 143 #define NGE_DMA_MODE DDI_DMA_STREAMING 144 #define NGE_HEADROOM 6 145 #define ETHER_HEAD_LEN 14 146 #ifndef VTAG_SIZE 147 #define VTAG_SIZE 4 148 #endif 149 150 #define NGE_HALFTICK 268435456LL /* 2**28 ns! */ 151 #define NGE_CYCLIC_PERIOD (4*NGE_HALFTICK) /* ~0.5s */ 152 153 #define NGE_DEFAULT_MTU 1500 154 #define NGE_DEFAULT_SDU 1518 155 #define NGE_MTU_2500 2500 156 #define NGE_MTU_4500 4500 157 #define NGE_MAX_MTU 9000 158 #define NGE_MAX_SDU 9018 159 160 #define NGE_DESC_MIN 0x200 161 162 #define NGE_STD_BUFSZ 1792 163 #define NGE_JB2500_BUFSZ (3*1024) 164 #define NGE_JB4500_BUFSZ (5*1024) 165 #define NGE_JB9000_BUFSZ (9*1024) 166 167 #define NGE_SEND_SLOTS_DESC_1024 1024 168 #define NGE_SEND_SLOTS_DESC_3072 3072 169 #define NGE_SEND_JB2500_SLOTS_DESC 3072 170 #define NGE_SEND_JB4500_SLOTS_DESC 2048 171 #define NGE_SEND_JB9000_SLOTS_DESC 1024 172 #define NGE_SEND_LOWMEM_SLOTS_DESC 1024 173 #define NGE_SEND_SLOTS_BUF 3072 174 175 #define NGE_RECV_SLOTS_DESC_1024 1024 176 #define NGE_RECV_SLOTS_DESC_3072 3072 177 #define NGE_RECV_JB2500_SLOTS_DESC 3072 178 #define NGE_RECV_JB4500_SLOTS_DESC 2048 179 #define NGE_RECV_JB9000_SLOTS_DESC 1024 180 #define NGE_RECV_LOWMEM_SLOTS_DESC 1024 181 #define NGE_RECV_SLOTS_BUF 6144 182 183 #define NGE_SPLIT_32 32 184 #define NGE_SPLIT_96 96 185 #define NGE_SPLIT_256 256 186 187 #define NGE_RX_COPY_SIZE 512 188 #define NGE_TX_COPY_SIZE 512 189 #define NGE_MAP_FRAGS 3 190 #define NGE_MAX_COOKIES 3 191 #define NGE_MAX_DMA_HDR (4*1024) 192 193 /* Used by interrupt moderation */ 194 #define NGE_POLL_QUIET_TIME 100 195 #define NGE_POLL_BUSY_TIME 2 196 #define NGE_TX_N_INTR 128 197 198 /* 199 * NGE-specific ioctls ... 200 */ 201 #define NGE_IOC ((((('N' << 8) + 'G') << 8) + 'E') << 8) 202 203 /* 204 * PHY register read/write ioctls, used by cable test software 205 */ 206 #define NGE_MII_READ (NGE_IOC|1) 207 #define NGE_MII_WRITE (NGE_IOC|2) 208 209 /* 210 * SEEPROM read/write ioctls, for use by SEEPROM upgrade utility 211 * 212 * Note: SEEPROMs can only be accessed as 32-bit words, so <see_addr> 213 * must be a multiple of 4. Not all systems have a SEEPROM fitted! 214 */ 215 #define NGE_SEE_READ (NGE_IOC|3) 216 #define NGE_SEE_WRITE (NGE_IOC|4) 217 218 219 /* 220 * These diagnostic IOCTLS are enabled only in DEBUG drivers 221 */ 222 #define NGE_DIAG (NGE_IOC|5) /* currently a no-op */ 223 #define NGE_PEEK (NGE_IOC|6) 224 #define NGE_POKE (NGE_IOC|7) 225 #define NGE_PHY_RESET (NGE_IOC|8) 226 #define NGE_SOFT_RESET (NGE_IOC|9) 227 #define NGE_HARD_RESET (NGE_IOC|10) 228 229 230 enum NGE_HW_OP { 231 NGE_CLEAR = 0, 232 NGE_SET 233 }; 234 235 /* 236 * Required state according to GLD 237 */ 238 enum nge_mac_state { 239 NGE_MAC_UNKNOWN, 240 NGE_MAC_RESET, 241 NGE_MAC_STOPPED, 242 NGE_MAC_STARTED, 243 NGE_MAC_UNATTACH 244 }; 245 enum loop_type { 246 NGE_LOOP_NONE = 0, 247 NGE_LOOP_EXTERNAL_100, 248 NGE_LOOP_EXTERNAL_10, 249 NGE_LOOP_INTERNAL_PHY, 250 }; 251 252 /* 253 * (Internal) return values from send_msg subroutines 254 */ 255 enum send_status { 256 SEND_COPY_FAIL = -1, /* => GLD_NORESOURCES */ 257 SEND_MAP_FAIL, /* => GLD_NORESOURCES */ 258 SEND_COPY_SUCESS, /* OK, msg queued */ 259 SEND_MAP_SUCCESS /* OK, free msg */ 260 }; 261 262 /* 263 * (Internal) return values from ioctl subroutines 264 */ 265 enum ioc_reply { 266 IOC_INVAL = -1, /* bad, NAK with EINVAL */ 267 IOC_DONE, /* OK, reply sent */ 268 IOC_ACK, /* OK, just send ACK */ 269 IOC_REPLY, /* OK, just send reply */ 270 IOC_RESTART_ACK, /* OK, restart & ACK */ 271 IOC_RESTART_REPLY /* OK, restart & reply */ 272 }; 273 274 enum nge_pp_type { 275 NGE_PP_SPACE_CFG = 0, 276 NGE_PP_SPACE_REG, 277 NGE_PP_SPACE_NIC, 278 NGE_PP_SPACE_MII, 279 NGE_PP_SPACE_NGE, 280 NGE_PP_SPACE_TXDESC, 281 NGE_PP_SPACE_TXBUFF, 282 NGE_PP_SPACE_RXDESC, 283 NGE_PP_SPACE_RXBUFF, 284 NGE_PP_SPACE_STATISTICS, 285 NGE_PP_SPACE_SEEPROM, 286 NGE_PP_SPACE_FLASH 287 }; 288 289 /* 290 * Flag to kstat type 291 */ 292 enum nge_kstat_type { 293 NGE_KSTAT_RAW = 0, 294 NGE_KSTAT_STATS, 295 NGE_KSTAT_CHIPID, 296 NGE_KSTAT_DEBUG, 297 NGE_KSTAT_COUNT 298 }; 299 300 301 /* 302 * Actual state of the nvidia's chip 303 */ 304 enum nge_chip_state { 305 NGE_CHIP_FAULT = -2, /* fault, need reset */ 306 NGE_CHIP_ERROR, /* error, want reset */ 307 NGE_CHIP_INITIAL, /* Initial state only */ 308 NGE_CHIP_RESET, /* reset, need init */ 309 NGE_CHIP_STOPPED, /* Tx/Rx stopped */ 310 NGE_CHIP_RUNNING /* with interrupts */ 311 }; 312 313 enum nge_eeprom_size { 314 EEPROM_1K = 0, 315 EEPROM_2K, 316 EEPROM_4K, 317 EEPROM_8K, 318 EEPROM_16K, 319 EEPROM_32K, 320 EEPROM_64K 321 }; 322 323 enum nge_eeprom_access_wid { 324 ACCESS_8BIT = 0, 325 ACCESS_16BIT 326 }; 327 328 /* 329 * MDIO operation 330 */ 331 enum nge_mdio_operation { 332 NGE_MDIO_READ = 0, 333 NGE_MDIO_WRITE 334 }; 335 336 /* 337 * Speed selection 338 */ 339 enum nge_speed { 340 UNKOWN_SPEED = 0, 341 NGE_10M, 342 NGE_100M, 343 NGE_1000M 344 }; 345 346 /* 347 * Duplex selection 348 */ 349 enum nge_duplex { 350 UNKOWN_DUPLEX = 0, 351 NGE_HD, 352 NGE_FD 353 }; 354 355 typedef struct { 356 ether_addr_t addr; /* in canonical form */ 357 uint8_t spare; 358 uint8_t set; /* nonzero => valid */ 359 } nge_mac_addr_t; 360 361 struct nge; 362 363 364 #define CHIP_FLAG_COPPER 0x40 365 366 /* 367 * Collection of physical-layer functions to: 368 * (re)initialise the physical layer 369 * update it to match software settings 370 * check for link status change 371 */ 372 typedef struct { 373 boolean_t (*phys_restart)(struct nge *); 374 void (*phys_update)(struct nge *); 375 boolean_t (*phys_check)(struct nge *); 376 } phys_ops_t; 377 378 struct nge_see_rw { 379 uint32_t see_addr; /* Byte offset within SEEPROM */ 380 uint32_t see_data; /* Data read/data to write */ 381 }; 382 383 typedef struct { 384 uint64_t pp_acc_size; /* in bytes: 1,2,4,8 */ 385 uint64_t pp_acc_space; /* See #defines below */ 386 uint64_t pp_acc_offset; 387 uint64_t pp_acc_data; /* output for peek */ 388 /* input for poke */ 389 } nge_peekpoke_t; 390 391 typedef uintptr_t nge_regno_t; /* register # (offset) */ 392 393 typedef struct _mul_list { 394 struct _mul_list *next; 395 uint32_t ref_cnt; 396 ether_addr_t mul_addr; 397 }mul_item, *pmul_item; 398 399 /* 400 * Describes one chunk of allocated DMA-able memory 401 * 402 * In some cases, this is a single chunk as allocated from the system; 403 * but we also use this structure to represent slices carved off such 404 * a chunk. Even when we don't really need all the information, we 405 * use this structure as a convenient way of correlating the various 406 * ways of looking at a piece of memory (kernel VA, IO space DVMA, 407 * handle+offset, etc). 408 */ 409 typedef struct dma_area 410 { 411 412 caddr_t private; /* pointer to nge */ 413 frtn_t rx_recycle; /* recycle function */ 414 mblk_t *mp; 415 ddi_acc_handle_t acc_hdl; /* handle for memory */ 416 void *mem_va; /* CPU VA of memory */ 417 uint32_t nslots; /* number of slots */ 418 uint32_t size; /* size per slot */ 419 size_t alength; /* allocated size */ 420 /* >= product of above */ 421 ddi_dma_handle_t dma_hdl; /* DMA handle */ 422 offset_t offset; /* relative to handle */ 423 ddi_dma_cookie_t cookie; /* associated cookie */ 424 uint32_t ncookies; 425 uint32_t signature; /* buffer signature */ 426 /* for deciding to free */ 427 /* or to reuse buffers */ 428 boolean_t rx_delivered; /* hold by upper layer */ 429 struct dma_area *next; 430 } dma_area_t; 431 432 #define HOST_OWN 0x00000000 433 #define CONTROLER_OWN 0x00000001 434 #define NGE_END_PACKET 0x00000002 435 436 437 typedef struct nge_dmah_node 438 { 439 struct nge_dmah_node *next; 440 ddi_dma_handle_t hndl; 441 } nge_dmah_node_t; 442 443 typedef struct nge_dmah_list 444 { 445 nge_dmah_node_t *head; 446 nge_dmah_node_t *tail; 447 } nge_dmah_list_t; 448 449 /* 450 * Software version of the Recv Descriptor 451 * There's one of these for each recv buffer (up to 512 per ring) 452 */ 453 typedef struct sw_rx_sbd { 454 455 dma_area_t desc; /* (const) related h/w */ 456 /* descriptor area */ 457 dma_area_t *bufp; /* (const) related */ 458 /* buffer area */ 459 uint8_t flags; 460 } sw_rx_sbd_t; 461 462 /* 463 * Software version of the send Buffer Descriptor 464 * There's one of these for each send buffer (up to 512 per ring) 465 */ 466 typedef struct sw_tx_sbd { 467 468 dma_area_t desc; /* (const) related h/w */ 469 /* descriptor area */ 470 dma_area_t pbuf; /* (const) related */ 471 /* buffer area */ 472 void (*tx_recycle)(struct sw_tx_sbd *); 473 uint32_t flags; 474 mblk_t *mp; /* related mblk, if any */ 475 nge_dmah_list_t mp_hndl; 476 uint32_t frags; 477 uint32_t ncookies; /* dma cookie number */ 478 479 } sw_tx_sbd_t; 480 481 /* 482 * Software Receive Buffer (Producer) Ring Control Block 483 * There's one of these for each receiver producer ring (up to 3), 484 * but each holds buffers of a different size. 485 */ 486 typedef struct buff_ring { 487 488 uint64_t nslots; /* descriptor area */ 489 struct nge *ngep; /* (const) containing */ 490 /* driver soft state */ 491 /* initialise same */ 492 uint64_t rx_hold; 493 sw_rx_sbd_t *sw_rbds; /* software descriptors */ 494 sw_rx_sbd_t *free_rbds; /* free ring */ 495 dma_area_t *free_list; /* available buffer queue */ 496 dma_area_t *recycle_list; /* recycling buffer queue */ 497 kmutex_t recycle_lock[1]; 498 uint32_t buf_sign; /* buffer ring signature */ 499 /* for deciding to free */ 500 /* or to reuse buffers */ 501 boolean_t rx_bcopy; 502 } buff_ring_t; 503 504 /* 505 * Software Receive (Return) Ring Control Block 506 * There's one of these for each receiver return ring (up to 16). 507 */ 508 typedef struct recv_ring { 509 /* 510 * The elements flagged (const) in the comments below are 511 * set up once during initialiation and thereafter unchanged. 512 */ 513 dma_area_t desc; /* (const) related h/w */ 514 /* descriptor area */ 515 struct nge *ngep; /* (const) containing */ 516 /* driver soft state */ 517 uint16_t prod_index; /* (const) ptr to h/w */ 518 /* "producer index" */ 519 mac_resource_handle_t handle; 520 } recv_ring_t; 521 522 523 524 /* 525 * Software Send Ring Control Block 526 * There's one of these for each of (up to) 1 send rings 527 */ 528 typedef struct send_ring { 529 /* 530 * The elements flagged (const) in the comments below are 531 * set up once during initialiation and thereafter unchanged. 532 */ 533 dma_area_t desc; /* (const) related h/w */ 534 /* descriptor area */ 535 dma_area_t buf[NGE_SEND_SLOTS_BUF]; 536 /* buffer area(s) */ 537 struct nge *ngep; /* (const) containing */ 538 /* driver soft state */ 539 540 uint32_t tx_hwmark; 541 uint32_t tx_lwmark; 542 543 /* 544 * The tx_lock must be held when updating 545 * the s/w producer index 546 * (tx_next) 547 */ 548 kmutex_t tx_lock[1]; /* serialize h/w update */ 549 uint32_t tx_next; /* next slot to use */ 550 uint32_t tx_flow; 551 552 /* 553 * These counters/indexes are manipulated in the transmit 554 * path using atomics rather than mutexes for speed 555 */ 556 uint32_t tx_free; /* # of slots available */ 557 558 /* 559 * index (tc_next). 560 */ 561 kmutex_t tc_lock[1]; 562 uint32_t tc_next; /* next slot to recycle */ 563 /* ("consumer index") */ 564 565 sw_tx_sbd_t *sw_sbds; /* software descriptors */ 566 567 kmutex_t dmah_lock; 568 nge_dmah_list_t dmah_free; 569 nge_dmah_node_t dmahndl[NGE_MAX_DMA_HDR]; 570 571 } send_ring_t; 572 573 574 typedef struct { 575 uint32_t businfo; /* from private reg */ 576 uint16_t command; /* saved during attach */ 577 578 uint16_t vendor; /* vendor-id */ 579 uint16_t device; /* device-id */ 580 uint16_t subven; /* subsystem-vendor-id */ 581 uint16_t subdev; /* subsystem-id */ 582 uint8_t class_code; 583 uint8_t revision; /* revision-id */ 584 uint8_t clsize; /* cache-line-size */ 585 uint8_t latency; /* latency-timer */ 586 uint8_t flags; 587 588 uint16_t phy_type; /* Fiber module type */ 589 uint64_t hw_mac_addr; /* from chip register */ 590 nge_mac_addr_t vendor_addr; /* transform of same */ 591 } chip_info_t; 592 593 594 typedef struct { 595 offset_t index; 596 char *name; 597 } nge_ksindex_t; 598 599 typedef struct { 600 uint64_t tso_err_mss; 601 uint64_t tso_dis; 602 uint64_t tso_err_nosum; 603 uint64_t tso_err_hov; 604 uint64_t tso_err_huf; 605 uint64_t tso_err_l2; 606 uint64_t tso_err_ip; 607 uint64_t tso_err_l4; 608 uint64_t tso_err_tcp; 609 uint64_t hsum_err_ip; 610 uint64_t hsum_err_l4; 611 }fe_statistics_t; 612 613 /* 614 * statistics parameters to tune the driver 615 */ 616 typedef struct { 617 uint64_t intr_count; 618 uint64_t intr_lval; 619 uint64_t recv_realloc; 620 uint64_t poll_time; 621 uint64_t recy_free; 622 uint64_t recv_count; 623 uint64_t xmit_count; 624 uint64_t obytes; 625 uint64_t rbytes; 626 uint64_t mp_alloc_err; 627 uint64_t dma_alloc_err; 628 uint64_t kmem_alloc_err; 629 uint64_t load_context; 630 uint64_t ip_hwsum_err; 631 uint64_t tcp_hwsum_err; 632 uint64_t rx_nobuffer; 633 uint64_t rx_err; 634 uint64_t tx_stop_err; 635 uint64_t tx_stall; 636 uint64_t tx_rsrv_fail; 637 uint64_t tx_resched; 638 fe_statistics_t fe_err; 639 }nge_sw_statistics_t; 640 641 typedef struct { 642 nge_hw_statistics_t hw_statistics; 643 nge_sw_statistics_t sw_statistics; 644 }nge_statistics_t; 645 646 struct nge_desc_attr { 647 648 size_t rxd_size; 649 size_t txd_size; 650 651 ddi_dma_attr_t *dma_attr; 652 ddi_dma_attr_t *tx_dma_attr; 653 654 void (*rxd_fill)(void *, const ddi_dma_cookie_t *, size_t); 655 uint32_t (*rxd_check)(const void *, size_t *); 656 657 void (*txd_fill)(void *, const ddi_dma_cookie_t *, size_t, 658 uint32_t, boolean_t); 659 660 uint32_t (*txd_check)(const void *); 661 }; 662 663 typedef struct nge_desc_attr nge_desc_attr_t; 664 665 /* 666 * Structure used to hold the device-specific config parameters. 667 * The setting of such parameters may not consistent with the 668 * hardware feature of the device. It's used for software purpose. 669 */ 670 typedef struct nge_dev_spec_param { 671 boolean_t msi; /* specifies msi support */ 672 boolean_t msi_x; /* specifies msi_x support */ 673 boolean_t vlan; /* specifies vlan support */ 674 boolean_t advanced_pm; /* advanced power management support */ 675 boolean_t mac_addr_order; /* mac address order */ 676 boolean_t tx_pause_frame; /* specifies tx pause frame support */ 677 boolean_t rx_pause_frame; /* specifies rx pause frame support */ 678 boolean_t jumbo; /* jumbo frame support */ 679 boolean_t tx_rx_64byte; /* set the max tx/rx prd fetch size */ 680 boolean_t rx_hw_checksum; /* specifies tx hw checksum feature */ 681 uint32_t tx_hw_checksum; /* specifies rx hw checksum feature */ 682 uint32_t desc_type; /* specifies descriptor type */ 683 uint32_t rx_desc_num; /* specifies rx descriptor number */ 684 uint32_t tx_desc_num; /* specifies tx descriptor number */ 685 uint32_t nge_split; /* specifies the split number */ 686 } nge_dev_spec_param_t; 687 688 typedef struct nge { 689 /* 690 * These fields are set by attach() and unchanged thereafter ... 691 */ 692 dev_info_t *devinfo; /* device instance */ 693 mac_handle_t mh; /* mac module handle */ 694 chip_info_t chipinfo; 695 ddi_acc_handle_t cfg_handle; /* DDI I/O handle */ 696 ddi_acc_handle_t io_handle; /* DDI I/O handle */ 697 void *io_regs; /* mapped registers */ 698 699 ddi_periodic_t periodic_id; /* periodical callback */ 700 uint32_t factotum_flag; 701 ddi_softint_handle_t factotum_hdl; /* factotum callback */ 702 ddi_softint_handle_t resched_hdl; /* reschedule callback */ 703 uint_t soft_pri; 704 705 ddi_intr_handle_t *htable; /* for array of interrupts */ 706 int intr_type; /* type of interrupt */ 707 int intr_actual_cnt; /* alloc intrs count */ 708 int intr_req_cnt; /* request intrs count */ 709 uint_t intr_pri; /* interrupt priority */ 710 int intr_cap; /* interrupt capabilities */ 711 712 uint32_t progress; /* attach tracking */ 713 uint32_t debug; /* flag to debug function */ 714 715 char ifname[8]; /* "nge0" ... "nge999" */ 716 717 718 enum nge_mac_state nge_mac_state; /* definitions above */ 719 enum nge_chip_state nge_chip_state; /* definitions above */ 720 boolean_t promisc; 721 boolean_t record_promisc; 722 boolean_t suspended; 723 724 int resched_needed; 725 uint32_t default_mtu; 726 uint32_t max_sdu; 727 uint32_t buf_size; 728 uint32_t rx_desc; 729 uint32_t tx_desc; 730 uint32_t rx_buf; 731 uint32_t nge_split; 732 uint32_t watchdog; 733 uint32_t lowmem_mode; 734 735 736 /* 737 * Runtime read-write data starts here ... 738 * 1 Receive Rings 739 * 1 Send Rings 740 * 741 * Note: they're not necessarily all used. 742 */ 743 struct buff_ring buff[1]; 744 struct recv_ring recv[1]; 745 struct send_ring send[1]; 746 747 748 kmutex_t genlock[1]; 749 krwlock_t rwlock[1]; 750 kmutex_t softlock[1]; 751 uint32_t intr_masks; 752 boolean_t poll; 753 boolean_t ch_intr_mode; 754 boolean_t intr_moderation; 755 uint32_t recv_count; 756 uint32_t quiet_time; 757 uint32_t busy_time; 758 uint32_t stint_count; 759 uint32_t sw_intr_intv; 760 nge_mac_addr_t cur_uni_addr; 761 uint32_t rx_datahwm; 762 uint32_t rx_prdlwm; 763 uint32_t rx_prdhwm; 764 uint32_t rx_def; 765 uint32_t desc_mode; 766 767 mul_item *pcur_mulist; 768 nge_mac_addr_t cur_mul_addr; 769 nge_mac_addr_t cur_mul_mask; 770 771 nge_desc_attr_t desc_attr; 772 773 /* 774 * Link state data (protected by genlock) 775 */ 776 int32_t link_state; /* See GLD #defines */ 777 uint32_t stall_cknum; /* Stall check number */ 778 779 uint32_t phy_xmii_addr; 780 uint32_t phy_id; 781 uint32_t phy_mode; 782 const phys_ops_t *physops; 783 uint16_t phy_gen_status; 784 785 uint32_t param_loop_mode; 786 787 kstat_t *nge_kstats[NGE_KSTAT_COUNT]; 788 nge_statistics_t statistics; 789 790 nge_dev_spec_param_t dev_spec_param; 791 792 uint32_t param_en_pause:1, 793 param_en_asym_pause:1, 794 param_en_1000hdx:1, 795 param_en_1000fdx:1, 796 param_en_100fdx:1, 797 param_en_100hdx:1, 798 param_en_10fdx:1, 799 param_en_10hdx:1, 800 param_adv_autoneg:1, 801 param_adv_pause:1, 802 param_adv_asym_pause:1, 803 param_adv_1000fdx:1, 804 param_adv_1000hdx:1, 805 param_adv_100fdx:1, 806 param_adv_100hdx:1, 807 param_adv_10fdx:1, 808 param_adv_10hdx:1, 809 param_lp_autoneg:1, 810 param_lp_pause:1, 811 param_lp_asym_pause:1, 812 param_lp_1000fdx:1, 813 param_lp_1000hdx:1, 814 param_lp_100fdx:1, 815 param_lp_100hdx:1, 816 param_lp_10fdx:1, 817 param_lp_10hdx:1, 818 param_link_up:1, 819 param_link_autoneg:1, 820 param_link_rx_pause:1, 821 param_link_tx_pause:1, 822 param_pad_to_32:2; 823 uint64_t param_link_speed; 824 link_duplex_t param_link_duplex; 825 int param_txbcopy_threshold; 826 int param_rxbcopy_threshold; 827 int param_recv_max_packet; 828 int param_poll_quiet_time; 829 int param_poll_busy_time; 830 int param_rx_intr_hwater; 831 int param_rx_intr_lwater; 832 int param_tx_n_intr; 833 } nge_t; 834 835 extern const nge_ksindex_t nge_statistics[]; 836 837 /* 838 * Sync a DMA area described by a dma_area_t 839 */ 840 #define DMA_SYNC(area, flag) ((void) ddi_dma_sync((area).dma_hdl, \ 841 (area).offset, (area).alength, (flag))) 842 843 /* 844 * Find the (kernel virtual) address of block of memory 845 * described by a dma_area_t 846 */ 847 #define DMA_VPTR(area) ((area).mem_va) 848 849 /* 850 * Zero a block of memory described by a dma_area_t 851 */ 852 #define DMA_ZERO(area) bzero(DMA_VPTR(area), (area).alength) 853 854 /* 855 * Next/Prev value of a cyclic index 856 */ 857 #define NEXT(index, limit) ((index) + 1 < (limit) ? (index) + 1 : 0) 858 #define PREV(index, limit) (0 == (index) ? (limit - 1) : (index) - 1) 859 860 #define NEXT_INDEX(ndx, num, lim)\ 861 (((ndx) + (num) < (lim)) ? ((ndx) + (num)) : ((ndx) + (num) - (lim))) 862 863 864 /* 865 * Property lookups 866 */ 867 #define NGE_PROP_EXISTS(d, n) ddi_prop_exists(DDI_DEV_T_ANY, (d), \ 868 DDI_PROP_DONTPASS, (n)) 869 #define NGE_PROP_GET_INT(d, n) ddi_prop_get_int(DDI_DEV_T_ANY, (d), \ 870 DDI_PROP_DONTPASS, (n), -1) 871 872 873 /* 874 * Debugging ... 875 */ 876 #ifdef DEBUG 877 #define NGE_DEBUGGING 1 878 #else 879 #define NGE_DEBUGGING 0 880 #endif /* DEBUG */ 881 882 /* 883 * Bit flags in the 'debug' word ... 884 */ 885 #define NGE_DBG_STOP 0x00000001 /* early debug_enter() */ 886 #define NGE_DBG_TRACE 0x00000002 /* general flow tracing */ 887 888 #define NGE_DBG_MII 0x00000010 /* low-level MII access */ 889 #define NGE_DBG_CHIP 0x00000020 /* low(ish)-level code */ 890 891 #define NGE_DBG_RECV 0x00000100 /* receive-side code */ 892 #define NGE_DBG_SEND 0x00000200 /* packet-send code */ 893 894 #define NGE_DBG_INIT 0x00100000 /* initialisation */ 895 #define NGE_DBG_NEMO 0x00200000 /* MAC layer entry points */ 896 #define NGE_DBG_STATS 0x00400000 /* statistics */ 897 898 #define NGE_DBG_BADIOC 0x01000000 /* unknown ioctls */ 899 900 #define NGE_DBG_NDD 0x10000000 /* NDD operations */ 901 902 903 904 /* 905 * 'Do-if-debugging' macro. The parameter <command> should be one or more 906 * C statements (but without the *final* semicolon), which will either be 907 * compiled inline or completely ignored, depending on the NGE_DEBUGGING 908 * compile-time flag. 909 * 910 * You should get a compile-time error (at least on a DEBUG build) if 911 * your statement isn't actually a statement, rather than unexpected 912 * run-time behaviour caused by unintended matching of if-then-elses etc. 913 * 914 * Note that the NGE_DDB() macro itself can only be used as a statement, 915 * not an expression, and should always be followed by a semicolon. 916 */ 917 #if NGE_DEBUGGING 918 #define NGE_DDB(command) do { \ 919 { command; } \ 920 _NOTE(CONSTANTCONDITION) \ 921 } while (0) 922 #else /* NGE_DEBUGGING */ 923 #define NGE_DDB(command) 924 /* 925 * Old way of debugging. This is a poor way, as it leeaves empty 926 * statements that cause lint to croak. 927 * #define NGE_DDB(command) do { \ 928 * { _NOTE(EMPTY); } \ 929 * _NOTE(CONSTANTCONDITION) \ 930 * } while (0) 931 */ 932 #endif /* NGE_DEBUGGING */ 933 934 /* 935 * 'Internal' macros used to construct the TRACE/DEBUG macros below. 936 * These provide the primitive conditional-call capability required. 937 * Note: the parameter <args> is a parenthesised list of the actual 938 * printf-style arguments to be passed to the debug function ... 939 */ 940 #define NGE_XDB(b, w, f, args) NGE_DDB(if ((b) & (w)) f args) 941 #define NGE_GDB(b, args) NGE_XDB(b, nge_debug, (*nge_gdb()), args) 942 #define NGE_LDB(b, args) NGE_XDB(b, ngep->debug, \ 943 (*nge_db(ngep)), args) 944 #define NGE_CDB(f, args) NGE_XDB(NGE_DBG, ngep->debug, f, args) 945 946 /* 947 * Conditional-print macros. 948 * 949 * Define NGE_DBG to be the relevant member of the set of NGE_DBG_* values 950 * above before using the NGE_GDEBUG() or NGE_DEBUG() macros. The 'G' 951 * versions look at the Global debug flag word (nge_debug); the non-G 952 * versions look in the per-instance data (ngep->debug) and so require a 953 * variable called 'ngep' to be in scope (and initialised!) before use. 954 * 955 * You could redefine NGE_TRC too if you really need two different 956 * flavours of debugging output in the same area of code, but I don't 957 * really recommend it. 958 * 959 * Note: the parameter <args> is a parenthesised list of the actual 960 * arguments to be passed to the debug function, usually a printf-style 961 * format string and corresponding values to be formatted. 962 */ 963 964 #define NGE_TRC NGE_DBG_TRACE 965 966 #define NGE_GTRACE(args) NGE_GDB(NGE_TRC, args) 967 #define NGE_GDEBUG(args) NGE_GDB(NGE_DBG, args) 968 #define NGE_TRACE(args) NGE_LDB(NGE_TRC, args) 969 #define NGE_DEBUG(args) NGE_LDB(NGE_DBG, args) 970 971 /* 972 * Debug-only action macros 973 */ 974 975 976 #define NGE_REPORT(args) NGE_DDB(nge_log args) 977 978 boolean_t nge_atomic_decrease(uint64_t *count_p, uint64_t n); 979 void nge_atomic_increase(uint64_t *count_p, uint64_t n); 980 981 int nge_alloc_dma_mem(nge_t *ngep, size_t memsize, 982 ddi_device_acc_attr_t *attr_p, uint_t dma_flags, dma_area_t *dma_p); 983 void nge_free_dma_mem(dma_area_t *dma_p); 984 int nge_restart(nge_t *ngep); 985 void nge_wake_factotum(nge_t *ngep); 986 987 uint8_t nge_reg_get8(nge_t *ngep, nge_regno_t regno); 988 void nge_reg_put8(nge_t *ngep, nge_regno_t regno, uint8_t data); 989 uint16_t nge_reg_get16(nge_t *ngep, nge_regno_t regno); 990 void nge_reg_put16(nge_t *ngep, nge_regno_t regno, uint16_t data); 991 uint32_t nge_reg_get32(nge_t *ngep, nge_regno_t regno); 992 void nge_reg_put32(nge_t *ngep, nge_regno_t regno, uint32_t data); 993 uint_t nge_chip_factotum(caddr_t args1, caddr_t args2); 994 void nge_chip_cfg_init(nge_t *ngep, chip_info_t *infop, boolean_t reset); 995 void nge_init_dev_spec_param(nge_t *ngep); 996 int nge_chip_stop(nge_t *ngep, boolean_t fault); 997 void nge_restore_mac_addr(nge_t *ngep); 998 int nge_chip_reset(nge_t *ngep); 999 int nge_chip_start(nge_t *ngep); 1000 void nge_chip_sync(nge_t *ngep); 1001 1002 uint_t nge_chip_intr(caddr_t arg1, caddr_t arg2); 1003 enum ioc_reply nge_chip_ioctl(nge_t *ngep, mblk_t *mp, struct iocblk *iocp); 1004 1005 void nge_phys_init(nge_t *ngep); 1006 boolean_t nge_phy_reset(nge_t *ngep); 1007 uint16_t nge_mii_get16(nge_t *ngep, nge_regno_t regno); 1008 void nge_mii_put16(nge_t *ngep, nge_regno_t regno, uint16_t data); 1009 1010 void nge_recv_recycle(caddr_t arg); 1011 void nge_receive(nge_t *ngep); 1012 1013 uint_t nge_reschedule(caddr_t args1, caddr_t args2); 1014 mblk_t *nge_m_tx(void *arg, mblk_t *mp); 1015 1016 void nge_tx_recycle(nge_t *ngep, boolean_t is_intr); 1017 void nge_tx_recycle_all(nge_t *ngep); 1018 1019 int nge_nd_init(nge_t *ngep); 1020 void nge_nd_cleanup(nge_t *ngep); 1021 1022 1023 void nge_init_kstats(nge_t *ngep, int instance); 1024 void nge_fini_kstats(nge_t *ngep); 1025 int nge_m_stat(void *arg, uint_t stat, uint64_t *val); 1026 1027 uint32_t nge_atomic_shl32(uint32_t *sp, uint_t count); 1028 1029 void nge_log(nge_t *ngep, const char *fmt, ...); 1030 void nge_problem(nge_t *ngep, const char *fmt, ...); 1031 void nge_error(nge_t *ngep, const char *fmt, ...); 1032 void 1033 nge_report(nge_t *ngep, uint8_t error_id); 1034 1035 void (*nge_db(nge_t *ngep))(const char *fmt, ...); 1036 void (*nge_gdb(void))(const char *fmt, ...); 1037 extern uint32_t nge_debug; 1038 1039 /* 1040 * DESC MODE 2 1041 */ 1042 1043 extern void nge_sum_rxd_fill(void *, const ddi_dma_cookie_t *, size_t); 1044 extern uint32_t nge_sum_rxd_check(const void *, size_t *); 1045 1046 extern void nge_sum_txd_fill(void *, const ddi_dma_cookie_t *, 1047 size_t, uint32_t, boolean_t); 1048 extern uint32_t nge_sum_txd_check(const void *); 1049 1050 /* 1051 * DESC MODE 3 1052 */ 1053 1054 extern void nge_hot_rxd_fill(void *, const ddi_dma_cookie_t *, size_t); 1055 extern uint32_t nge_hot_rxd_check(const void *, size_t *); 1056 1057 extern void nge_hot_txd_fill(void *, const ddi_dma_cookie_t *, 1058 size_t, uint32_t, boolean_t); 1059 extern uint32_t nge_hot_txd_check(const void *); 1060 1061 #ifdef __cplusplus 1062 } 1063 #endif 1064 1065 #endif /* _SYS_NGE_H */ 1066