xref: /titanic_41/usr/src/uts/common/io/ixgbe/ixgbe_x540.h (revision 721df37ded2cce623b0249cc35a872c3ce291b9b)
1 /******************************************************************************
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3   Copyright (c) 2001-2012, Intel Corporation
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32 ******************************************************************************/
33 /*$FreeBSD$*/
34 
35 #ifndef _IXGBE_X540_H_
36 #define _IXGBE_X540_H_
37 
38 #include "ixgbe_type.h"
39 
40 s32 ixgbe_get_link_capabilities_X540(struct ixgbe_hw *hw,
41 				     ixgbe_link_speed *speed, bool *autoneg);
42 enum ixgbe_media_type ixgbe_get_media_type_X540(struct ixgbe_hw *hw);
43 s32 ixgbe_setup_mac_link_X540(struct ixgbe_hw *hw, ixgbe_link_speed speed,
44 			      bool autoneg, bool link_up_wait_to_complete);
45 s32 ixgbe_reset_hw_X540(struct ixgbe_hw *hw);
46 s32 ixgbe_start_hw_X540(struct ixgbe_hw *hw);
47 u32 ixgbe_get_supported_physical_layer_X540(struct ixgbe_hw *hw);
48 
49 s32 ixgbe_init_eeprom_params_X540(struct ixgbe_hw *hw);
50 s32 ixgbe_read_eerd_X540(struct ixgbe_hw *hw, u16 offset, u16 *data);
51 s32 ixgbe_read_eerd_buffer_X540(struct ixgbe_hw *hw, u16 offset, u16 words,
52 				u16 *data);
53 s32 ixgbe_write_eewr_X540(struct ixgbe_hw *hw, u16 offset, u16 data);
54 s32 ixgbe_write_eewr_buffer_X540(struct ixgbe_hw *hw, u16 offset, u16 words,
55 				 u16 *data);
56 s32 ixgbe_update_eeprom_checksum_X540(struct ixgbe_hw *hw);
57 s32 ixgbe_validate_eeprom_checksum_X540(struct ixgbe_hw *hw, u16 *checksum_val);
58 u16 ixgbe_calc_eeprom_checksum_X540(struct ixgbe_hw *hw);
59 
60 s32 ixgbe_acquire_swfw_sync_X540(struct ixgbe_hw *hw, u16 mask);
61 void ixgbe_release_swfw_sync_X540(struct ixgbe_hw *hw, u16 mask);
62 
63 s32 ixgbe_blink_led_start_X540(struct ixgbe_hw *hw, u32 index);
64 s32 ixgbe_blink_led_stop_X540(struct ixgbe_hw *hw, u32 index);
65 #endif /* _IXGBE_X540_H_ */
66