1 /* 2 * CDDL HEADER START 3 * 4 * The contents of this file are subject to the terms of the 5 * Common Development and Distribution License (the "License"). 6 * You may not use this file except in compliance with the License. 7 * 8 * You can obtain a copy of the license at: 9 * http://www.opensolaris.org/os/licensing. 10 * See the License for the specific language governing permissions 11 * and limitations under the License. 12 * 13 * When using or redistributing this file, you may do so under the 14 * License only. No other modification of this header is permitted. 15 * 16 * If applicable, add the following below this CDDL HEADER, with the 17 * fields enclosed by brackets "[]" replaced with your own identifying 18 * information: Portions Copyright [yyyy] [name of copyright owner] 19 * 20 * CDDL HEADER END 21 */ 22 23 /* 24 * Copyright(c) 2007-2010 Intel Corporation. All rights reserved. 25 */ 26 27 /* 28 * Copyright (c) 2008, 2010, Oracle and/or its affiliates. All rights reserved. 29 */ 30 31 /* IntelVersion: 1.95 scm_061610_003709 */ 32 33 #ifndef _IXGBE_COMMON_H 34 #define _IXGBE_COMMON_H 35 36 #include "ixgbe_type.h" 37 #ifndef IXGBE_WRITE_REG64 38 #define IXGBE_WRITE_REG64(hw, reg, value) \ 39 do { \ 40 IXGBE_WRITE_REG(hw, reg, (u32) value); \ 41 IXGBE_WRITE_REG(hw, reg + 4, (u32) (value >> 32)); \ 42 } while (0) 43 #endif /* IXGBE_WRITE_REG64 */ 44 45 u32 ixgbe_get_pcie_msix_count_generic(struct ixgbe_hw *hw); 46 47 s32 ixgbe_init_ops_generic(struct ixgbe_hw *hw); 48 s32 ixgbe_init_hw_generic(struct ixgbe_hw *hw); 49 s32 ixgbe_start_hw_generic(struct ixgbe_hw *hw); 50 s32 ixgbe_clear_hw_cntrs_generic(struct ixgbe_hw *hw); 51 s32 ixgbe_read_pba_num_generic(struct ixgbe_hw *hw, u32 *pba_num); 52 s32 ixgbe_get_mac_addr_generic(struct ixgbe_hw *hw, u8 *mac_addr); 53 s32 ixgbe_get_bus_info_generic(struct ixgbe_hw *hw); 54 void ixgbe_set_lan_id_multi_port_pcie(struct ixgbe_hw *hw); 55 s32 ixgbe_stop_adapter_generic(struct ixgbe_hw *hw); 56 57 s32 ixgbe_led_on_generic(struct ixgbe_hw *hw, u32 index); 58 s32 ixgbe_led_off_generic(struct ixgbe_hw *hw, u32 index); 59 60 s32 ixgbe_init_eeprom_params_generic(struct ixgbe_hw *hw); 61 s32 ixgbe_write_eeprom_generic(struct ixgbe_hw *hw, u16 offset, u16 data); 62 s32 ixgbe_read_eerd_generic(struct ixgbe_hw *hw, u16 offset, u16 *data); 63 s32 ixgbe_read_eeprom_bit_bang_generic(struct ixgbe_hw *hw, u16 offset, 64 u16 *data); 65 u16 ixgbe_calc_eeprom_checksum_generic(struct ixgbe_hw *hw); 66 s32 ixgbe_validate_eeprom_checksum_generic(struct ixgbe_hw *hw, 67 u16 *checksum_val); 68 s32 ixgbe_update_eeprom_checksum_generic(struct ixgbe_hw *hw); 69 s32 ixgbe_poll_eerd_eewr_done(struct ixgbe_hw *hw, u32 ee_reg); 70 71 s32 ixgbe_set_rar_generic(struct ixgbe_hw *hw, u32 index, u8 *addr, u32 vmdq, 72 u32 enable_addr); 73 s32 ixgbe_clear_rar_generic(struct ixgbe_hw *hw, u32 index); 74 s32 ixgbe_init_rx_addrs_generic(struct ixgbe_hw *hw); 75 s32 ixgbe_update_mc_addr_list_generic(struct ixgbe_hw *hw, u8 *mc_addr_list, 76 u32 mc_addr_count, 77 ixgbe_mc_addr_itr func); 78 s32 ixgbe_update_uc_addr_list_generic(struct ixgbe_hw *hw, u8 *addr_list, 79 u32 addr_count, ixgbe_mc_addr_itr func); 80 s32 ixgbe_enable_mc_generic(struct ixgbe_hw *hw); 81 s32 ixgbe_disable_mc_generic(struct ixgbe_hw *hw); 82 s32 ixgbe_enable_rx_dma_generic(struct ixgbe_hw *hw, u32 regval); 83 84 s32 ixgbe_setup_fc(struct ixgbe_hw *hw, s32 packetbuf_num); 85 s32 ixgbe_fc_enable_generic(struct ixgbe_hw *hw, s32 packtetbuf_num); 86 s32 ixgbe_fc_autoneg(struct ixgbe_hw *hw); 87 88 s32 ixgbe_validate_mac_addr(u8 *mac_addr); 89 s32 ixgbe_acquire_swfw_sync(struct ixgbe_hw *hw, u16 mask); 90 void ixgbe_release_swfw_sync(struct ixgbe_hw *hw, u16 mask); 91 s32 ixgbe_disable_pcie_master(struct ixgbe_hw *hw); 92 93 s32 ixgbe_blink_led_start_generic(struct ixgbe_hw *hw, u32 index); 94 s32 ixgbe_blink_led_stop_generic(struct ixgbe_hw *hw, u32 index); 95 96 s32 ixgbe_get_san_mac_addr_generic(struct ixgbe_hw *hw, u8 *san_mac_addr); 97 s32 ixgbe_set_san_mac_addr_generic(struct ixgbe_hw *hw, u8 *san_mac_addr); 98 99 s32 ixgbe_set_vmdq_generic(struct ixgbe_hw *hw, u32 rar, u32 vmdq); 100 s32 ixgbe_clear_vmdq_generic(struct ixgbe_hw *hw, u32 rar, u32 vmdq); 101 s32 ixgbe_insert_mac_addr_generic(struct ixgbe_hw *hw, u8 *addr, u32 vmdq); 102 s32 ixgbe_init_uta_tables_generic(struct ixgbe_hw *hw); 103 s32 ixgbe_set_vfta_generic(struct ixgbe_hw *hw, u32 vlan, 104 u32 vind, bool vlan_on); 105 s32 ixgbe_clear_vfta_generic(struct ixgbe_hw *hw); 106 107 s32 ixgbe_check_mac_link_generic(struct ixgbe_hw *hw, 108 ixgbe_link_speed *speed, bool *link_up, bool link_up_wait_to_complete); 109 110 s32 ixgbe_get_wwn_prefix_generic(struct ixgbe_hw *hw, u16 *wwnn_prefix, 111 u16 *wwpn_prefix); 112 s32 ixgbe_get_fcoe_boot_status_generic(struct ixgbe_hw *hw, u16 *bs); 113 114 #endif /* _IXGBE_COMMON_H */ 115