xref: /titanic_41/usr/src/uts/common/io/ixgbe/ixgbe_api.h (revision b3697b90e692e3e5d859fb77d285d4c056d99eda) 
1 /*
2  * CDDL HEADER START
3  *
4  * The contents of this file are subject to the terms of the
5  * Common Development and Distribution License (the "License").
6  * You may not use this file except in compliance with the License.
7  *
8  * You can obtain a copy of the license at:
9  *      http://www.opensolaris.org/os/licensing.
10  * See the License for the specific language governing permissions
11  * and limitations under the License.
12  *
13  * When using or redistributing this file, you may do so under the
14  * License only. No other modification of this header is permitted.
15  *
16  * If applicable, add the following below this CDDL HEADER, with the
17  * fields enclosed by brackets "[]" replaced with your own identifying
18  * information: Portions Copyright [yyyy] [name of copyright owner]
19  *
20  * CDDL HEADER END
21  */
22 
23 /*
24  * Copyright(c) 2007-2010 Intel Corporation. All rights reserved.
25  */
26 
27 /*
28  * Copyright (c) 2008, 2010, Oracle and/or its affiliates. All rights reserved.
29  */
30 
31 /* IntelVersion: 1.82 scm_061610_003709 */
32 
33 #ifndef _IXGBE_API_H
34 #define	_IXGBE_API_H
35 
36 #include "ixgbe_type.h"
37 
38 s32 ixgbe_init_shared_code(struct ixgbe_hw *hw);
39 
40 s32 ixgbe_set_mac_type(struct ixgbe_hw *hw);
41 s32 ixgbe_init_hw(struct ixgbe_hw *hw);
42 s32 ixgbe_reset_hw(struct ixgbe_hw *hw);
43 s32 ixgbe_start_hw(struct ixgbe_hw *hw);
44 void ixgbe_enable_relaxed_ordering(struct ixgbe_hw *hw);
45 s32 ixgbe_clear_hw_cntrs(struct ixgbe_hw *hw);
46 enum ixgbe_media_type ixgbe_get_media_type(struct ixgbe_hw *hw);
47 s32 ixgbe_get_mac_addr(struct ixgbe_hw *hw, u8 *mac_addr);
48 s32 ixgbe_get_bus_info(struct ixgbe_hw *hw);
49 u32 ixgbe_get_num_of_tx_queues(struct ixgbe_hw *hw);
50 u32 ixgbe_get_num_of_rx_queues(struct ixgbe_hw *hw);
51 s32 ixgbe_stop_adapter(struct ixgbe_hw *hw);
52 s32 ixgbe_read_pba_num(struct ixgbe_hw *hw, u32 *pba_num);
53 
54 s32 ixgbe_identify_phy(struct ixgbe_hw *hw);
55 s32 ixgbe_reset_phy(struct ixgbe_hw *hw);
56 s32 ixgbe_read_phy_reg(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type,
57     u16 *phy_data);
58 s32 ixgbe_write_phy_reg(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type,
59     u16 phy_data);
60 
61 s32 ixgbe_setup_phy_link(struct ixgbe_hw *hw);
62 s32 ixgbe_check_phy_link(struct ixgbe_hw *hw,
63     ixgbe_link_speed *speed, bool *link_up);
64 s32 ixgbe_setup_phy_link_speed(struct ixgbe_hw *hw, ixgbe_link_speed speed,
65     bool autoneg, bool autoneg_wait_to_complete);
66 void ixgbe_disable_tx_laser(struct ixgbe_hw *hw);
67 void ixgbe_enable_tx_laser(struct ixgbe_hw *hw);
68 void ixgbe_flap_tx_laser(struct ixgbe_hw *hw);
69 s32 ixgbe_setup_link(struct ixgbe_hw *hw, ixgbe_link_speed speed,
70     bool autoneg, bool autoneg_wait_to_complete);
71 s32 ixgbe_check_link(struct ixgbe_hw *hw, ixgbe_link_speed *speed,
72     bool *link_up, bool link_up_wait_to_complete);
73 s32 ixgbe_get_link_capabilities(struct ixgbe_hw *hw, ixgbe_link_speed *speed,
74     bool *autoneg);
75 s32 ixgbe_led_on(struct ixgbe_hw *hw, u32 index);
76 s32 ixgbe_led_off(struct ixgbe_hw *hw, u32 index);
77 s32 ixgbe_blink_led_start(struct ixgbe_hw *hw, u32 index);
78 s32 ixgbe_blink_led_stop(struct ixgbe_hw *hw, u32 index);
79 
80 s32 ixgbe_init_eeprom_params(struct ixgbe_hw *hw);
81 s32 ixgbe_write_eeprom(struct ixgbe_hw *hw, u16 offset, u16 data);
82 s32 ixgbe_read_eeprom(struct ixgbe_hw *hw, u16 offset, u16 *data);
83 s32 ixgbe_validate_eeprom_checksum(struct ixgbe_hw *hw, u16 *checksum_val);
84 s32 ixgbe_update_eeprom_checksum(struct ixgbe_hw *hw);
85 
86 s32 ixgbe_insert_mac_addr(struct ixgbe_hw *hw, u8 *addr, u32 vmdq);
87 s32 ixgbe_set_rar(struct ixgbe_hw *hw, u32 index, u8 *addr, u32 vmdq,
88     u32 enable_addr);
89 s32 ixgbe_clear_rar(struct ixgbe_hw *hw, u32 index);
90 s32 ixgbe_set_vmdq(struct ixgbe_hw *hw, u32 rar, u32 vmdq);
91 s32 ixgbe_clear_vmdq(struct ixgbe_hw *hw, u32 rar, u32 vmdq);
92 s32 ixgbe_init_rx_addrs(struct ixgbe_hw *hw);
93 u32 ixgbe_get_num_rx_addrs(struct ixgbe_hw *hw);
94 s32 ixgbe_update_uc_addr_list(struct ixgbe_hw *hw, u8 *addr_list,
95     u32 addr_count, ixgbe_mc_addr_itr func);
96 s32 ixgbe_update_mc_addr_list(struct ixgbe_hw *hw, u8 *mc_addr_list,
97     u32 mc_addr_count, ixgbe_mc_addr_itr func);
98 void ixgbe_add_uc_addr(struct ixgbe_hw *hw, u8 *addr_list, u32 vmdq);
99 s32 ixgbe_enable_mc(struct ixgbe_hw *hw);
100 s32 ixgbe_disable_mc(struct ixgbe_hw *hw);
101 s32 ixgbe_clear_vfta(struct ixgbe_hw *hw);
102 s32 ixgbe_set_vfta(struct ixgbe_hw *hw, u32 vlan, u32 vind, bool vlan_on);
103 
104 s32 ixgbe_fc_enable(struct ixgbe_hw *hw, s32 packetbuf_num);
105 
106 void ixgbe_set_mta(struct ixgbe_hw *hw, u8 *mc_addr);
107 s32 ixgbe_get_phy_firmware_version(struct ixgbe_hw *hw,
108     u16 *firmware_version);
109 s32 ixgbe_read_analog_reg8(struct ixgbe_hw *hw, u32 reg, u8 *val);
110 s32 ixgbe_write_analog_reg8(struct ixgbe_hw *hw, u32 reg, u8 val);
111 s32 ixgbe_init_uta_tables(struct ixgbe_hw *hw);
112 s32 ixgbe_read_i2c_eeprom(struct ixgbe_hw *hw, u8 byte_offset, u8 *eeprom_data);
113 u32 ixgbe_get_supported_physical_layer(struct ixgbe_hw *hw);
114 s32 ixgbe_enable_rx_dma(struct ixgbe_hw *hw, u32 regval);
115 s32 ixgbe_reinit_fdir_tables_82599(struct ixgbe_hw *hw);
116 s32 ixgbe_init_fdir_signature_82599(struct ixgbe_hw *hw, u32 pballoc);
117 s32 ixgbe_init_fdir_perfect_82599(struct ixgbe_hw *hw, u32 pballoc);
118 s32 ixgbe_fdir_add_signature_filter_82599(struct ixgbe_hw *hw,
119     struct ixgbe_atr_input *input, u8 queue);
120 s32 ixgbe_fdir_add_perfect_filter_82599(struct ixgbe_hw *hw,
121     struct ixgbe_atr_input *input, struct ixgbe_atr_input_masks *masks,
122     u16 soft_id, u8 queue);
123 u16 ixgbe_atr_compute_hash_82599(struct ixgbe_atr_input *input, u32 key);
124 s32 ixgbe_atr_set_vlan_id_82599(struct ixgbe_atr_input *input, u16 vlan_id);
125 s32 ixgbe_atr_set_src_ipv4_82599(struct ixgbe_atr_input *input, u32 src_addr);
126 s32 ixgbe_atr_set_dst_ipv4_82599(struct ixgbe_atr_input *input, u32 dst_addr);
127 s32 ixgbe_atr_set_src_ipv6_82599(struct ixgbe_atr_input *input, u32 src_addr_1,
128     u32 src_addr_2, u32 src_addr_3, u32 src_addr_4);
129 s32 ixgbe_atr_set_dst_ipv6_82599(struct ixgbe_atr_input *input, u32 dst_addr_1,
130     u32 dst_addr_2, u32 dst_addr_3, u32 dst_addr_4);
131 s32 ixgbe_atr_set_src_port_82599(struct ixgbe_atr_input *input, u16 src_port);
132 s32 ixgbe_atr_set_dst_port_82599(struct ixgbe_atr_input *input, u16 dst_port);
133 s32 ixgbe_atr_set_flex_byte_82599(struct ixgbe_atr_input *input, u16 flex_byte);
134 s32 ixgbe_atr_set_vm_pool_82599(struct ixgbe_atr_input *input, u8 vm_pool);
135 s32 ixgbe_atr_set_l4type_82599(struct ixgbe_atr_input *input, u8 l4type);
136 s32 ixgbe_atr_get_vlan_id_82599(struct ixgbe_atr_input *input, u16 *vlan_id);
137 s32 ixgbe_atr_get_src_ipv4_82599(struct ixgbe_atr_input *input, u32 *src_addr);
138 s32 ixgbe_atr_get_dst_ipv4_82599(struct ixgbe_atr_input *input, u32 *dst_addr);
139 s32 ixgbe_atr_get_src_ipv6_82599(struct ixgbe_atr_input *input, u32 *src_addr_1,
140     u32 *src_addr_2, u32 *src_addr_3, u32 *src_addr_4);
141 s32 ixgbe_atr_get_dst_ipv6_82599(struct ixgbe_atr_input *input, u32 *dst_addr_1,
142     u32 *dst_addr_2, u32 *dst_addr_3, u32 *dst_addr_4);
143 s32 ixgbe_atr_get_src_port_82599(struct ixgbe_atr_input *input, u16 *src_port);
144 s32 ixgbe_atr_get_dst_port_82599(struct ixgbe_atr_input *input, u16 *dst_port);
145 s32 ixgbe_atr_get_flex_byte_82599(struct ixgbe_atr_input *input,
146     u16 *flex_byte);
147 s32 ixgbe_atr_get_vm_pool_82599(struct ixgbe_atr_input *input, u8 *vm_pool);
148 s32 ixgbe_atr_get_l4type_82599(struct ixgbe_atr_input *input, u8 *l4type);
149 s32 ixgbe_read_i2c_byte(struct ixgbe_hw *hw, u8 byte_offset, u8 dev_addr,
150     u8 *data);
151 s32 ixgbe_write_i2c_byte(struct ixgbe_hw *hw, u8 byte_offset, u8 dev_addr,
152     u8 data);
153 s32 ixgbe_write_i2c_eeprom(struct ixgbe_hw *hw, u8 byte_offset, u8 eeprom_data);
154 s32 ixgbe_get_san_mac_addr(struct ixgbe_hw *hw, u8 *san_mac_addr);
155 s32 ixgbe_set_san_mac_addr(struct ixgbe_hw *hw, u8 *san_mac_addr);
156 s32 ixgbe_get_device_caps(struct ixgbe_hw *hw, u16 *device_caps);
157 s32 ixgbe_acquire_swfw_semaphore(struct ixgbe_hw *hw, u16 mask);
158 void ixgbe_release_swfw_semaphore(struct ixgbe_hw *hw, u16 mask);
159 s32 ixgbe_get_wwn_prefix(struct ixgbe_hw *hw, u16 *wwnn_prefix,
160     u16 *wwpn_prefix);
161 s32 ixgbe_get_fcoe_boot_status(struct ixgbe_hw *hw, u16 *bs);
162 
163 #endif /* _IXGBE_API_H */
164