xref: /titanic_41/usr/src/uts/common/io/ixgbe/ixgbe_api.h (revision 9a0e82381c494d655823a54fc713a8c2a571131c) 
1 /*
2  * CDDL HEADER START
3  *
4  * Copyright(c) 2007-2009 Intel Corporation. All rights reserved.
5  * The contents of this file are subject to the terms of the
6  * Common Development and Distribution License (the "License").
7  * You may not use this file except in compliance with the License.
8  *
9  * You can obtain a copy of the license at:
10  *      http://www.opensolaris.org/os/licensing.
11  * See the License for the specific language governing permissions
12  * and limitations under the License.
13  *
14  * When using or redistributing this file, you may do so under the
15  * License only. No other modification of this header is permitted.
16  *
17  * If applicable, add the following below this CDDL HEADER, with the
18  * fields enclosed by brackets "[]" replaced with your own identifying
19  * information: Portions Copyright [yyyy] [name of copyright owner]
20  *
21  * CDDL HEADER END
22  */
23 
24 /*
25  * Copyright 2009 Sun Microsystems, Inc.  All rights reserved.
26  * Use is subject to license terms.
27  */
28 
29 /* IntelVersion: 1.73 v2-7-8_2009-4-7  */
30 
31 #ifndef _IXGBE_API_H
32 #define	_IXGBE_API_H
33 
34 #include "ixgbe_type.h"
35 
36 s32 ixgbe_init_shared_code(struct ixgbe_hw *hw);
37 
38 s32 ixgbe_set_mac_type(struct ixgbe_hw *hw);
39 s32 ixgbe_init_hw(struct ixgbe_hw *hw);
40 s32 ixgbe_reset_hw(struct ixgbe_hw *hw);
41 s32 ixgbe_start_hw(struct ixgbe_hw *hw);
42 s32 ixgbe_clear_hw_cntrs(struct ixgbe_hw *hw);
43 enum ixgbe_media_type ixgbe_get_media_type(struct ixgbe_hw *hw);
44 s32 ixgbe_get_mac_addr(struct ixgbe_hw *hw, u8 *mac_addr);
45 s32 ixgbe_get_bus_info(struct ixgbe_hw *hw);
46 u32 ixgbe_get_num_of_tx_queues(struct ixgbe_hw *hw);
47 u32 ixgbe_get_num_of_rx_queues(struct ixgbe_hw *hw);
48 s32 ixgbe_stop_adapter(struct ixgbe_hw *hw);
49 s32 ixgbe_read_pba_num(struct ixgbe_hw *hw, u32 *pba_num);
50 
51 s32 ixgbe_identify_phy(struct ixgbe_hw *hw);
52 s32 ixgbe_reset_phy(struct ixgbe_hw *hw);
53 s32 ixgbe_read_phy_reg(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type,
54     u16 *phy_data);
55 s32 ixgbe_write_phy_reg(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type,
56     u16 phy_data);
57 
58 s32 ixgbe_setup_phy_link(struct ixgbe_hw *hw);
59 s32 ixgbe_check_phy_link(struct ixgbe_hw *hw,
60     ixgbe_link_speed *speed, bool *link_up);
61 s32 ixgbe_setup_phy_link_speed(struct ixgbe_hw *hw, ixgbe_link_speed speed,
62     bool autoneg, bool autoneg_wait_to_complete);
63 s32 ixgbe_setup_link(struct ixgbe_hw *hw);
64 s32 ixgbe_setup_link_speed(struct ixgbe_hw *hw, ixgbe_link_speed speed,
65     bool autoneg, bool autoneg_wait_to_complete);
66 s32 ixgbe_check_link(struct ixgbe_hw *hw, ixgbe_link_speed *speed,
67     bool *link_up, bool link_up_wait_to_complete);
68 s32 ixgbe_get_link_capabilities(struct ixgbe_hw *hw, ixgbe_link_speed *speed,
69     bool *autoneg);
70 s32 ixgbe_led_on(struct ixgbe_hw *hw, u32 index);
71 s32 ixgbe_led_off(struct ixgbe_hw *hw, u32 index);
72 s32 ixgbe_blink_led_start(struct ixgbe_hw *hw, u32 index);
73 s32 ixgbe_blink_led_stop(struct ixgbe_hw *hw, u32 index);
74 
75 s32 ixgbe_init_eeprom_params(struct ixgbe_hw *hw);
76 s32 ixgbe_write_eeprom(struct ixgbe_hw *hw, u16 offset, u16 data);
77 s32 ixgbe_read_eeprom(struct ixgbe_hw *hw, u16 offset, u16 *data);
78 s32 ixgbe_validate_eeprom_checksum(struct ixgbe_hw *hw, u16 *checksum_val);
79 s32 ixgbe_update_eeprom_checksum(struct ixgbe_hw *hw);
80 
81 s32 ixgbe_insert_mac_addr(struct ixgbe_hw *hw, u8 *addr, u32 vmdq);
82 s32 ixgbe_set_rar(struct ixgbe_hw *hw, u32 index, u8 *addr, u32 vmdq,
83     u32 enable_addr);
84 s32 ixgbe_clear_rar(struct ixgbe_hw *hw, u32 index);
85 s32 ixgbe_set_vmdq(struct ixgbe_hw *hw, u32 rar, u32 vmdq);
86 s32 ixgbe_clear_vmdq(struct ixgbe_hw *hw, u32 rar, u32 vmdq);
87 s32 ixgbe_init_rx_addrs(struct ixgbe_hw *hw);
88 u32 ixgbe_get_num_rx_addrs(struct ixgbe_hw *hw);
89 s32 ixgbe_update_uc_addr_list(struct ixgbe_hw *hw, u8 *addr_list,
90     u32 addr_count, ixgbe_mc_addr_itr func);
91 s32 ixgbe_update_mc_addr_list(struct ixgbe_hw *hw, u8 *mc_addr_list,
92     u32 mc_addr_count, ixgbe_mc_addr_itr func);
93 s32 ixgbe_enable_mc(struct ixgbe_hw *hw);
94 s32 ixgbe_disable_mc(struct ixgbe_hw *hw);
95 s32 ixgbe_clear_vfta(struct ixgbe_hw *hw);
96 s32 ixgbe_set_vfta(struct ixgbe_hw *hw, u32 vlan, u32 vind, bool vlan_on);
97 
98 s32 ixgbe_fc_enable(struct ixgbe_hw *hw, s32 packetbuf_num);
99 
100 void ixgbe_set_mta(struct ixgbe_hw *hw, u8 *mc_addr);
101 s32 ixgbe_get_phy_firmware_version(struct ixgbe_hw *hw,
102     u16 *firmware_version);
103 s32 ixgbe_read_analog_reg8(struct ixgbe_hw *hw, u32 reg, u8 *val);
104 s32 ixgbe_write_analog_reg8(struct ixgbe_hw *hw, u32 reg, u8 val);
105 s32 ixgbe_init_uta_tables(struct ixgbe_hw *hw);
106 s32 ixgbe_read_i2c_eeprom(struct ixgbe_hw *hw, u8 byte_offset, u8 *eeprom_data);
107 u32 ixgbe_get_supported_physical_layer(struct ixgbe_hw *hw);
108 s32 ixgbe_enable_rx_dma(struct ixgbe_hw *hw, u32 regval);
109 s32 ixgbe_reinit_fdir_tables_82599(struct ixgbe_hw *hw);
110 s32 ixgbe_init_fdir_signature_82599(struct ixgbe_hw *hw, u32 pballoc);
111 s32 ixgbe_init_fdir_perfect_82599(struct ixgbe_hw *hw, u32 pballoc);
112 s32 ixgbe_fdir_add_signature_filter_82599(struct ixgbe_hw *hw,
113     struct ixgbe_atr_input *input, u8 queue);
114 s32 ixgbe_fdir_add_perfect_filter_82599(struct ixgbe_hw *hw,
115     struct ixgbe_atr_input *input, u16 soft_id, u8 queue);
116 u16 ixgbe_atr_compute_hash_82599(struct ixgbe_atr_input *input, u32 key);
117 s32 ixgbe_atr_set_vlan_id_82599(struct ixgbe_atr_input *input, u16 vlan_id);
118 s32 ixgbe_atr_set_src_ipv4_82599(struct ixgbe_atr_input *input, u32 src_addr);
119 s32 ixgbe_atr_set_dst_ipv4_82599(struct ixgbe_atr_input *input, u32 dst_addr);
120 s32 ixgbe_atr_set_src_ipv6_82599(struct ixgbe_atr_input *input, u32 src_addr_1,
121     u32 src_addr_2, u32 src_addr_3, u32 src_addr_4);
122 s32 ixgbe_atr_set_dst_ipv6_82599(struct ixgbe_atr_input *input, u32 dst_addr_1,
123     u32 dst_addr_2, u32 dst_addr_3, u32 dst_addr_4);
124 s32 ixgbe_atr_set_src_port_82599(struct ixgbe_atr_input *input, u16 src_port);
125 s32 ixgbe_atr_set_dst_port_82599(struct ixgbe_atr_input *input, u16 dst_port);
126 s32 ixgbe_atr_set_flex_byte_82599(struct ixgbe_atr_input *input, u16 flex_byte);
127 s32 ixgbe_atr_set_vm_pool_82599(struct ixgbe_atr_input *input, u8 vm_pool);
128 s32 ixgbe_atr_set_l4type_82599(struct ixgbe_atr_input *input, u8 l4type);
129 s32 ixgbe_atr_get_vlan_id_82599(struct ixgbe_atr_input *input, u16 *vlan_id);
130 s32 ixgbe_atr_get_src_ipv4_82599(struct ixgbe_atr_input *input, u32 *src_addr);
131 s32 ixgbe_atr_get_dst_ipv4_82599(struct ixgbe_atr_input *input, u32 *dst_addr);
132 s32 ixgbe_atr_get_src_ipv6_82599(struct ixgbe_atr_input *input, u32 *src_addr_1,
133     u32 *src_addr_2, u32 *src_addr_3, u32 *src_addr_4);
134 s32 ixgbe_atr_get_dst_ipv6_82599(struct ixgbe_atr_input *input, u32 *dst_addr_1,
135     u32 *dst_addr_2, u32 *dst_addr_3, u32 *dst_addr_4);
136 s32 ixgbe_atr_get_src_port_82599(struct ixgbe_atr_input *input, u16 *src_port);
137 s32 ixgbe_atr_get_dst_port_82599(struct ixgbe_atr_input *input, u16 *dst_port);
138 s32 ixgbe_atr_get_flex_byte_82599(struct ixgbe_atr_input *input,
139     u16 *flex_byte);
140 s32 ixgbe_atr_get_vm_pool_82599(struct ixgbe_atr_input *input, u8 *vm_pool);
141 s32 ixgbe_atr_get_l4type_82599(struct ixgbe_atr_input *input, u8 *l4type);
142 s32 ixgbe_read_i2c_byte(struct ixgbe_hw *hw, u8 byte_offset, u8 dev_addr,
143     u8 *data);
144 s32 ixgbe_write_i2c_byte(struct ixgbe_hw *hw, u8 byte_offset, u8 dev_addr,
145     u8 data);
146 s32 ixgbe_write_i2c_eeprom(struct ixgbe_hw *hw, u8 byte_offset, u8 eeprom_data);
147 s32 ixgbe_get_san_mac_addr(struct ixgbe_hw *hw, u8 *san_mac_addr);
148 s32 ixgbe_set_san_mac_addr(struct ixgbe_hw *hw, u8 *san_mac_addr);
149 s32 ixgbe_get_device_caps(struct ixgbe_hw *hw, u16 *device_caps);
150 
151 #endif /* _IXGBE_API_H */
152