1 /* 2 * CDDL HEADER START 3 * 4 * Copyright(c) 2007-2008 Intel Corporation. All rights reserved. 5 * The contents of this file are subject to the terms of the 6 * Common Development and Distribution License (the "License"). 7 * You may not use this file except in compliance with the License. 8 * 9 * You can obtain a copy of the license at: 10 * http://www.opensolaris.org/os/licensing. 11 * See the License for the specific language governing permissions 12 * and limitations under the License. 13 * 14 * When using or redistributing this file, you may do so under the 15 * License only. No other modification of this header is permitted. 16 * 17 * If applicable, add the following below this CDDL HEADER, with the 18 * fields enclosed by brackets "[]" replaced with your own identifying 19 * information: Portions Copyright [yyyy] [name of copyright owner] 20 * 21 * CDDL HEADER END 22 */ 23 24 /* 25 * Copyright 2008 Sun Microsystems, Inc. All rights reserved. 26 * Use is subject to license terms of the CDDL. 27 */ 28 29 /* IntelVersion: 1.50 v2008-03-04 */ 30 31 #ifndef _IXGBE_API_H 32 #define _IXGBE_API_H 33 34 #pragma ident "%Z%%M% %I% %E% SMI" 35 36 #include "ixgbe_type.h" 37 38 s32 ixgbe_init_shared_code(struct ixgbe_hw *hw); 39 40 s32 ixgbe_set_mac_type(struct ixgbe_hw *hw); 41 s32 ixgbe_init_hw(struct ixgbe_hw *hw); 42 s32 ixgbe_reset_hw(struct ixgbe_hw *hw); 43 s32 ixgbe_start_hw(struct ixgbe_hw *hw); 44 s32 ixgbe_clear_hw_cntrs(struct ixgbe_hw *hw); 45 enum ixgbe_media_type ixgbe_get_media_type(struct ixgbe_hw *hw); 46 s32 ixgbe_get_mac_addr(struct ixgbe_hw *hw, u8 *mac_addr); 47 s32 ixgbe_get_bus_info(struct ixgbe_hw *hw); 48 u32 ixgbe_get_num_of_tx_queues(struct ixgbe_hw *hw); 49 u32 ixgbe_get_num_of_rx_queues(struct ixgbe_hw *hw); 50 s32 ixgbe_stop_adapter(struct ixgbe_hw *hw); 51 s32 ixgbe_read_pba_num(struct ixgbe_hw *hw, u32 *pba_num); 52 53 s32 ixgbe_identify_phy(struct ixgbe_hw *hw); 54 s32 ixgbe_reset_phy(struct ixgbe_hw *hw); 55 s32 ixgbe_read_phy_reg(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type, 56 u16 *phy_data); 57 s32 ixgbe_write_phy_reg(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type, 58 u16 phy_data); 59 60 s32 ixgbe_setup_phy_link(struct ixgbe_hw *hw); 61 s32 ixgbe_check_phy_link(struct ixgbe_hw *hw, 62 ixgbe_link_speed *speed, bool *link_up); 63 s32 ixgbe_setup_phy_link_speed(struct ixgbe_hw *hw, ixgbe_link_speed speed, 64 bool autoneg, bool autoneg_wait_to_complete); 65 s32 ixgbe_setup_link(struct ixgbe_hw *hw); 66 s32 ixgbe_setup_link_speed(struct ixgbe_hw *hw, ixgbe_link_speed speed, 67 bool autoneg, bool autoneg_wait_to_complete); 68 s32 ixgbe_check_link(struct ixgbe_hw *hw, ixgbe_link_speed *speed, 69 bool *link_up); 70 s32 ixgbe_get_link_capabilities(struct ixgbe_hw *hw, ixgbe_link_speed *speed, 71 bool *autoneg); 72 s32 ixgbe_led_on(struct ixgbe_hw *hw, u32 index); 73 s32 ixgbe_led_off(struct ixgbe_hw *hw, u32 index); 74 s32 ixgbe_blink_led_start(struct ixgbe_hw *hw, u32 index); 75 s32 ixgbe_blink_led_stop(struct ixgbe_hw *hw, u32 index); 76 77 s32 ixgbe_init_eeprom_params(struct ixgbe_hw *hw); 78 s32 ixgbe_write_eeprom(struct ixgbe_hw *hw, u16 offset, u16 data); 79 s32 ixgbe_read_eeprom(struct ixgbe_hw *hw, u16 offset, u16 *data); 80 s32 ixgbe_validate_eeprom_checksum(struct ixgbe_hw *hw, u16 *checksum_val); 81 s32 ixgbe_update_eeprom_checksum(struct ixgbe_hw *hw); 82 83 s32 ixgbe_set_rar(struct ixgbe_hw *hw, u32 index, u8 *addr, u32 vmdq, 84 u32 enable_addr); 85 s32 ixgbe_set_vmdq(struct ixgbe_hw *hw, u32 rar, u32 vmdq); 86 s32 ixgbe_init_rx_addrs(struct ixgbe_hw *hw); 87 u32 ixgbe_get_num_rx_addrs(struct ixgbe_hw *hw); 88 s32 ixgbe_update_uc_addr_list(struct ixgbe_hw *hw, u8 *addr_list, 89 u32 addr_count, ixgbe_mc_addr_itr func); 90 s32 ixgbe_update_mc_addr_list(struct ixgbe_hw *hw, u8 *mc_addr_list, 91 u32 mc_addr_count, ixgbe_mc_addr_itr func); 92 s32 ixgbe_enable_mc(struct ixgbe_hw *hw); 93 s32 ixgbe_disable_mc(struct ixgbe_hw *hw); 94 s32 ixgbe_clear_vfta(struct ixgbe_hw *hw); 95 s32 ixgbe_set_vfta(struct ixgbe_hw *hw, u32 vlan, u32 vind, bool vlan_on); 96 97 s32 ixgbe_setup_fc(struct ixgbe_hw *hw, s32 packetbuf_num); 98 99 void ixgbe_set_mta(struct ixgbe_hw *hw, u8 *mc_addr); 100 s32 ixgbe_get_phy_firmware_version(struct ixgbe_hw *hw, 101 u16 *firmware_version); 102 s32 ixgbe_read_analog_reg8(struct ixgbe_hw *hw, u32 reg, u8 *val); 103 s32 ixgbe_write_analog_reg8(struct ixgbe_hw *hw, u32 reg, u8 val); 104 105 #endif /* _IXGBE_API_H */ 106