1 /****************************************************************************** 2 3 Copyright (c) 2001-2012, Intel Corporation 4 All rights reserved. 5 6 Redistribution and use in source and binary forms, with or without 7 modification, are permitted provided that the following conditions are met: 8 9 1. Redistributions of source code must retain the above copyright notice, 10 this list of conditions and the following disclaimer. 11 12 2. Redistributions in binary form must reproduce the above copyright 13 notice, this list of conditions and the following disclaimer in the 14 documentation and/or other materials provided with the distribution. 15 16 3. Neither the name of the Intel Corporation nor the names of its 17 contributors may be used to endorse or promote products derived from 18 this software without specific prior written permission. 19 20 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 21 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 23 ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 24 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30 POSSIBILITY OF SUCH DAMAGE. 31 32 ******************************************************************************/ 33 /*$FreeBSD$*/ 34 35 #include "ixgbe_api.h" 36 #include "ixgbe_common.h" 37 38 extern s32 ixgbe_init_ops_82598(struct ixgbe_hw *hw); 39 extern s32 ixgbe_init_ops_82599(struct ixgbe_hw *hw); 40 41 /** 42 * ixgbe_init_shared_code - Initialize the shared code 43 * @hw: pointer to hardware structure 44 * 45 * This will assign function pointers and assign the MAC type and PHY code. 46 * Does not touch the hardware. This function must be called prior to any 47 * other function in the shared code. The ixgbe_hw structure should be 48 * memset to 0 prior to calling this function. The following fields in 49 * hw structure should be filled in prior to calling this function: 50 * hw_addr, back, device_id, vendor_id, subsystem_device_id, 51 * subsystem_vendor_id, and revision_id 52 **/ 53 s32 ixgbe_init_shared_code(struct ixgbe_hw *hw) 54 { 55 s32 status; 56 57 DEBUGFUNC("ixgbe_init_shared_code"); 58 59 /* 60 * Set the mac type 61 */ 62 (void) ixgbe_set_mac_type(hw); 63 64 switch (hw->mac.type) { 65 case ixgbe_mac_82598EB: 66 status = ixgbe_init_ops_82598(hw); 67 break; 68 case ixgbe_mac_82599EB: 69 status = ixgbe_init_ops_82599(hw); 70 break; 71 default: 72 status = IXGBE_ERR_DEVICE_NOT_SUPPORTED; 73 break; 74 } 75 76 return status; 77 } 78 79 /** 80 * ixgbe_set_mac_type - Sets MAC type 81 * @hw: pointer to the HW structure 82 * 83 * This function sets the mac type of the adapter based on the 84 * vendor ID and device ID stored in the hw structure. 85 **/ 86 s32 ixgbe_set_mac_type(struct ixgbe_hw *hw) 87 { 88 s32 ret_val = IXGBE_SUCCESS; 89 90 DEBUGFUNC("ixgbe_set_mac_type\n"); 91 92 if (hw->vendor_id == IXGBE_INTEL_VENDOR_ID) { 93 switch (hw->device_id) { 94 case IXGBE_DEV_ID_82598: 95 case IXGBE_DEV_ID_82598_BX: 96 case IXGBE_DEV_ID_82598AF_SINGLE_PORT: 97 case IXGBE_DEV_ID_82598AF_DUAL_PORT: 98 case IXGBE_DEV_ID_82598AT: 99 case IXGBE_DEV_ID_82598AT2: 100 case IXGBE_DEV_ID_82598EB_CX4: 101 case IXGBE_DEV_ID_82598_CX4_DUAL_PORT: 102 case IXGBE_DEV_ID_82598_DA_DUAL_PORT: 103 case IXGBE_DEV_ID_82598_SR_DUAL_PORT_EM: 104 case IXGBE_DEV_ID_82598EB_XF_LR: 105 case IXGBE_DEV_ID_82598EB_SFP_LOM: 106 hw->mac.type = ixgbe_mac_82598EB; 107 break; 108 case IXGBE_DEV_ID_82599_KX4: 109 case IXGBE_DEV_ID_82599_KX4_MEZZ: 110 case IXGBE_DEV_ID_82599_XAUI_LOM: 111 case IXGBE_DEV_ID_82599_COMBO_BACKPLANE: 112 case IXGBE_DEV_ID_82599_KR: 113 case IXGBE_DEV_ID_82599_SFP: 114 case IXGBE_DEV_ID_82599_BACKPLANE_FCOE: 115 case IXGBE_DEV_ID_82599_SFP_FCOE: 116 case IXGBE_DEV_ID_82599_SFP_EM: 117 case IXGBE_DEV_ID_82599_SFP_SF2: 118 case IXGBE_DEV_ID_82599EN_SFP: 119 case IXGBE_DEV_ID_82599_CX4: 120 case IXGBE_DEV_ID_82599_T3_LOM: 121 hw->mac.type = ixgbe_mac_82599EB; 122 break; 123 default: 124 ret_val = IXGBE_ERR_DEVICE_NOT_SUPPORTED; 125 break; 126 } 127 } else { 128 ret_val = IXGBE_ERR_DEVICE_NOT_SUPPORTED; 129 } 130 131 DEBUGOUT2("ixgbe_set_mac_type found mac: %d, returns: %d\n", 132 hw->mac.type, ret_val); 133 return ret_val; 134 } 135 136 /** 137 * ixgbe_init_hw - Initialize the hardware 138 * @hw: pointer to hardware structure 139 * 140 * Initialize the hardware by resetting and then starting the hardware 141 **/ 142 s32 ixgbe_init_hw(struct ixgbe_hw *hw) 143 { 144 return ixgbe_call_func(hw, hw->mac.ops.init_hw, (hw), 145 IXGBE_NOT_IMPLEMENTED); 146 } 147 148 /** 149 * ixgbe_reset_hw - Performs a hardware reset 150 * @hw: pointer to hardware structure 151 * 152 * Resets the hardware by resetting the transmit and receive units, masks and 153 * clears all interrupts, performs a PHY reset, and performs a MAC reset 154 **/ 155 s32 ixgbe_reset_hw(struct ixgbe_hw *hw) 156 { 157 return ixgbe_call_func(hw, hw->mac.ops.reset_hw, (hw), 158 IXGBE_NOT_IMPLEMENTED); 159 } 160 161 /** 162 * ixgbe_start_hw - Prepares hardware for Rx/Tx 163 * @hw: pointer to hardware structure 164 * 165 * Starts the hardware by filling the bus info structure and media type, 166 * clears all on chip counters, initializes receive address registers, 167 * multicast table, VLAN filter table, calls routine to setup link and 168 * flow control settings, and leaves transmit and receive units disabled 169 * and uninitialized. 170 **/ 171 s32 ixgbe_start_hw(struct ixgbe_hw *hw) 172 { 173 return ixgbe_call_func(hw, hw->mac.ops.start_hw, (hw), 174 IXGBE_NOT_IMPLEMENTED); 175 } 176 177 /** 178 * ixgbe_enable_relaxed_ordering - Enables tx relaxed ordering, 179 * which is disabled by default in ixgbe_start_hw(); 180 * 181 * @hw: pointer to hardware structure 182 * 183 * Enable relaxed ordering; 184 **/ 185 void ixgbe_enable_relaxed_ordering(struct ixgbe_hw *hw) 186 { 187 if (hw->mac.ops.enable_relaxed_ordering) 188 hw->mac.ops.enable_relaxed_ordering(hw); 189 } 190 191 /** 192 * ixgbe_clear_hw_cntrs - Clear hardware counters 193 * @hw: pointer to hardware structure 194 * 195 * Clears all hardware statistics counters by reading them from the hardware 196 * Statistics counters are clear on read. 197 **/ 198 s32 ixgbe_clear_hw_cntrs(struct ixgbe_hw *hw) 199 { 200 return ixgbe_call_func(hw, hw->mac.ops.clear_hw_cntrs, (hw), 201 IXGBE_NOT_IMPLEMENTED); 202 } 203 204 /** 205 * ixgbe_get_media_type - Get media type 206 * @hw: pointer to hardware structure 207 * 208 * Returns the media type (fiber, copper, backplane) 209 **/ 210 enum ixgbe_media_type ixgbe_get_media_type(struct ixgbe_hw *hw) 211 { 212 return ixgbe_call_func(hw, hw->mac.ops.get_media_type, (hw), 213 ixgbe_media_type_unknown); 214 } 215 216 /** 217 * ixgbe_get_mac_addr - Get MAC address 218 * @hw: pointer to hardware structure 219 * @mac_addr: Adapter MAC address 220 * 221 * Reads the adapter's MAC address from the first Receive Address Register 222 * (RAR0) A reset of the adapter must have been performed prior to calling 223 * this function in order for the MAC address to have been loaded from the 224 * EEPROM into RAR0 225 **/ 226 s32 ixgbe_get_mac_addr(struct ixgbe_hw *hw, u8 *mac_addr) 227 { 228 return ixgbe_call_func(hw, hw->mac.ops.get_mac_addr, 229 (hw, mac_addr), IXGBE_NOT_IMPLEMENTED); 230 } 231 232 /** 233 * ixgbe_get_san_mac_addr - Get SAN MAC address 234 * @hw: pointer to hardware structure 235 * @san_mac_addr: SAN MAC address 236 * 237 * Reads the SAN MAC address from the EEPROM, if it's available. This is 238 * per-port, so set_lan_id() must be called before reading the addresses. 239 **/ 240 s32 ixgbe_get_san_mac_addr(struct ixgbe_hw *hw, u8 *san_mac_addr) 241 { 242 return ixgbe_call_func(hw, hw->mac.ops.get_san_mac_addr, 243 (hw, san_mac_addr), IXGBE_NOT_IMPLEMENTED); 244 } 245 246 /** 247 * ixgbe_set_san_mac_addr - Write a SAN MAC address 248 * @hw: pointer to hardware structure 249 * @san_mac_addr: SAN MAC address 250 * 251 * Writes A SAN MAC address to the EEPROM. 252 **/ 253 s32 ixgbe_set_san_mac_addr(struct ixgbe_hw *hw, u8 *san_mac_addr) 254 { 255 return ixgbe_call_func(hw, hw->mac.ops.set_san_mac_addr, 256 (hw, san_mac_addr), IXGBE_NOT_IMPLEMENTED); 257 } 258 259 /** 260 * ixgbe_get_device_caps - Get additional device capabilities 261 * @hw: pointer to hardware structure 262 * @device_caps: the EEPROM word for device capabilities 263 * 264 * Reads the extra device capabilities from the EEPROM 265 **/ 266 s32 ixgbe_get_device_caps(struct ixgbe_hw *hw, u16 *device_caps) 267 { 268 return ixgbe_call_func(hw, hw->mac.ops.get_device_caps, 269 (hw, device_caps), IXGBE_NOT_IMPLEMENTED); 270 } 271 272 /** 273 * ixgbe_get_wwn_prefix - Get alternative WWNN/WWPN prefix from the EEPROM 274 * @hw: pointer to hardware structure 275 * @wwnn_prefix: the alternative WWNN prefix 276 * @wwpn_prefix: the alternative WWPN prefix 277 * 278 * This function will read the EEPROM from the alternative SAN MAC address 279 * block to check the support for the alternative WWNN/WWPN prefix support. 280 **/ 281 s32 ixgbe_get_wwn_prefix(struct ixgbe_hw *hw, u16 *wwnn_prefix, 282 u16 *wwpn_prefix) 283 { 284 return ixgbe_call_func(hw, hw->mac.ops.get_wwn_prefix, 285 (hw, wwnn_prefix, wwpn_prefix), 286 IXGBE_NOT_IMPLEMENTED); 287 } 288 289 /** 290 * ixgbe_get_fcoe_boot_status - Get FCOE boot status from EEPROM 291 * @hw: pointer to hardware structure 292 * @bs: the fcoe boot status 293 * 294 * This function will read the FCOE boot status from the iSCSI FCOE block 295 **/ 296 s32 ixgbe_get_fcoe_boot_status(struct ixgbe_hw *hw, u16 *bs) 297 { 298 return ixgbe_call_func(hw, hw->mac.ops.get_fcoe_boot_status, 299 (hw, bs), 300 IXGBE_NOT_IMPLEMENTED); 301 } 302 303 /** 304 * ixgbe_get_bus_info - Set PCI bus info 305 * @hw: pointer to hardware structure 306 * 307 * Sets the PCI bus info (speed, width, type) within the ixgbe_hw structure 308 **/ 309 s32 ixgbe_get_bus_info(struct ixgbe_hw *hw) 310 { 311 return ixgbe_call_func(hw, hw->mac.ops.get_bus_info, (hw), 312 IXGBE_NOT_IMPLEMENTED); 313 } 314 315 /** 316 * ixgbe_get_num_of_tx_queues - Get Tx queues 317 * @hw: pointer to hardware structure 318 * 319 * Returns the number of transmit queues for the given adapter. 320 **/ 321 u32 ixgbe_get_num_of_tx_queues(struct ixgbe_hw *hw) 322 { 323 return hw->mac.max_tx_queues; 324 } 325 326 /** 327 * ixgbe_get_num_of_rx_queues - Get Rx queues 328 * @hw: pointer to hardware structure 329 * 330 * Returns the number of receive queues for the given adapter. 331 **/ 332 u32 ixgbe_get_num_of_rx_queues(struct ixgbe_hw *hw) 333 { 334 return hw->mac.max_rx_queues; 335 } 336 337 /** 338 * ixgbe_stop_adapter - Disable Rx/Tx units 339 * @hw: pointer to hardware structure 340 * 341 * Sets the adapter_stopped flag within ixgbe_hw struct. Clears interrupts, 342 * disables transmit and receive units. The adapter_stopped flag is used by 343 * the shared code and drivers to determine if the adapter is in a stopped 344 * state and should not touch the hardware. 345 **/ 346 s32 ixgbe_stop_adapter(struct ixgbe_hw *hw) 347 { 348 return ixgbe_call_func(hw, hw->mac.ops.stop_adapter, (hw), 349 IXGBE_NOT_IMPLEMENTED); 350 } 351 352 /** 353 * ixgbe_read_pba_string - Reads part number string from EEPROM 354 * @hw: pointer to hardware structure 355 * @pba_num: stores the part number string from the EEPROM 356 * @pba_num_size: part number string buffer length 357 * 358 * Reads the part number string from the EEPROM. 359 **/ 360 s32 ixgbe_read_pba_string(struct ixgbe_hw *hw, u8 *pba_num, u32 pba_num_size) 361 { 362 return ixgbe_read_pba_string_generic(hw, pba_num, pba_num_size); 363 } 364 365 /** 366 * ixgbe_read_pba_length - Reads part number string length from EEPROM 367 * @hw: pointer to hardware structure 368 * @pba_num_size: part number string buffer length 369 * 370 * Reads the part number length from the EEPROM. 371 * Returns expected buffer size in pba_num_size. 372 **/ 373 s32 ixgbe_read_pba_length(struct ixgbe_hw *hw, u32 *pba_num_size) 374 { 375 return ixgbe_read_pba_length_generic(hw, pba_num_size); 376 } 377 378 /** 379 * ixgbe_read_pba_num - Reads part number from EEPROM 380 * @hw: pointer to hardware structure 381 * @pba_num: stores the part number from the EEPROM 382 * 383 * Reads the part number from the EEPROM. 384 **/ 385 s32 ixgbe_read_pba_num(struct ixgbe_hw *hw, u32 *pba_num) 386 { 387 return ixgbe_read_pba_num_generic(hw, pba_num); 388 } 389 390 /** 391 * ixgbe_identify_phy - Get PHY type 392 * @hw: pointer to hardware structure 393 * 394 * Determines the physical layer module found on the current adapter. 395 **/ 396 s32 ixgbe_identify_phy(struct ixgbe_hw *hw) 397 { 398 s32 status = IXGBE_SUCCESS; 399 400 if (hw->phy.type == ixgbe_phy_unknown) { 401 status = ixgbe_call_func(hw, hw->phy.ops.identify, (hw), 402 IXGBE_NOT_IMPLEMENTED); 403 } 404 405 return status; 406 } 407 408 /** 409 * ixgbe_reset_phy - Perform a PHY reset 410 * @hw: pointer to hardware structure 411 **/ 412 s32 ixgbe_reset_phy(struct ixgbe_hw *hw) 413 { 414 s32 status = IXGBE_SUCCESS; 415 416 if (hw->phy.type == ixgbe_phy_unknown) { 417 if (ixgbe_identify_phy(hw) != IXGBE_SUCCESS) 418 status = IXGBE_ERR_PHY; 419 } 420 421 if (status == IXGBE_SUCCESS) { 422 status = ixgbe_call_func(hw, hw->phy.ops.reset, (hw), 423 IXGBE_NOT_IMPLEMENTED); 424 } 425 return status; 426 } 427 428 /** 429 * ixgbe_get_phy_firmware_version - 430 * @hw: pointer to hardware structure 431 * @firmware_version: pointer to firmware version 432 **/ 433 s32 ixgbe_get_phy_firmware_version(struct ixgbe_hw *hw, u16 *firmware_version) 434 { 435 s32 status = IXGBE_SUCCESS; 436 437 status = ixgbe_call_func(hw, hw->phy.ops.get_firmware_version, 438 (hw, firmware_version), 439 IXGBE_NOT_IMPLEMENTED); 440 return status; 441 } 442 443 /** 444 * ixgbe_read_phy_reg - Read PHY register 445 * @hw: pointer to hardware structure 446 * @reg_addr: 32 bit address of PHY register to read 447 * @phy_data: Pointer to read data from PHY register 448 * 449 * Reads a value from a specified PHY register 450 **/ 451 s32 ixgbe_read_phy_reg(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type, 452 u16 *phy_data) 453 { 454 if (hw->phy.id == 0) 455 (void) ixgbe_identify_phy(hw); 456 457 return ixgbe_call_func(hw, hw->phy.ops.read_reg, (hw, reg_addr, 458 device_type, phy_data), IXGBE_NOT_IMPLEMENTED); 459 } 460 461 /** 462 * ixgbe_write_phy_reg - Write PHY register 463 * @hw: pointer to hardware structure 464 * @reg_addr: 32 bit PHY register to write 465 * @phy_data: Data to write to the PHY register 466 * 467 * Writes a value to specified PHY register 468 **/ 469 s32 ixgbe_write_phy_reg(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type, 470 u16 phy_data) 471 { 472 if (hw->phy.id == 0) 473 (void) ixgbe_identify_phy(hw); 474 475 return ixgbe_call_func(hw, hw->phy.ops.write_reg, (hw, reg_addr, 476 device_type, phy_data), IXGBE_NOT_IMPLEMENTED); 477 } 478 479 /** 480 * ixgbe_setup_phy_link - Restart PHY autoneg 481 * @hw: pointer to hardware structure 482 * 483 * Restart autonegotiation and PHY and waits for completion. 484 **/ 485 s32 ixgbe_setup_phy_link(struct ixgbe_hw *hw) 486 { 487 return ixgbe_call_func(hw, hw->phy.ops.setup_link, (hw), 488 IXGBE_NOT_IMPLEMENTED); 489 } 490 491 /** 492 * ixgbe_check_phy_link - Determine link and speed status 493 * @hw: pointer to hardware structure 494 * 495 * Reads a PHY register to determine if link is up and the current speed for 496 * the PHY. 497 **/ 498 s32 ixgbe_check_phy_link(struct ixgbe_hw *hw, ixgbe_link_speed *speed, 499 bool *link_up) 500 { 501 return ixgbe_call_func(hw, hw->phy.ops.check_link, (hw, speed, 502 link_up), IXGBE_NOT_IMPLEMENTED); 503 } 504 505 /** 506 * ixgbe_setup_phy_link_speed - Set auto advertise 507 * @hw: pointer to hardware structure 508 * @speed: new link speed 509 * @autoneg: TRUE if autonegotiation enabled 510 * 511 * Sets the auto advertised capabilities 512 **/ 513 s32 ixgbe_setup_phy_link_speed(struct ixgbe_hw *hw, ixgbe_link_speed speed, 514 bool autoneg, 515 bool autoneg_wait_to_complete) 516 { 517 return ixgbe_call_func(hw, hw->phy.ops.setup_link_speed, (hw, speed, 518 autoneg, autoneg_wait_to_complete), 519 IXGBE_NOT_IMPLEMENTED); 520 } 521 522 /** 523 * ixgbe_check_link - Get link and speed status 524 * @hw: pointer to hardware structure 525 * 526 * Reads the links register to determine if link is up and the current speed 527 **/ 528 s32 ixgbe_check_link(struct ixgbe_hw *hw, ixgbe_link_speed *speed, 529 bool *link_up, bool link_up_wait_to_complete) 530 { 531 return ixgbe_call_func(hw, hw->mac.ops.check_link, (hw, speed, 532 link_up, link_up_wait_to_complete), 533 IXGBE_NOT_IMPLEMENTED); 534 } 535 536 /** 537 * ixgbe_disable_tx_laser - Disable Tx laser 538 * @hw: pointer to hardware structure 539 * 540 * If the driver needs to disable the laser on SFI optics. 541 **/ 542 void ixgbe_disable_tx_laser(struct ixgbe_hw *hw) 543 { 544 if (hw->mac.ops.disable_tx_laser) 545 hw->mac.ops.disable_tx_laser(hw); 546 } 547 548 /** 549 * ixgbe_enable_tx_laser - Enable Tx laser 550 * @hw: pointer to hardware structure 551 * 552 * If the driver needs to enable the laser on SFI optics. 553 **/ 554 void ixgbe_enable_tx_laser(struct ixgbe_hw *hw) 555 { 556 if (hw->mac.ops.enable_tx_laser) 557 hw->mac.ops.enable_tx_laser(hw); 558 } 559 560 /** 561 * ixgbe_flap_tx_laser - flap Tx laser to start autotry process 562 * @hw: pointer to hardware structure 563 * 564 * When the driver changes the link speeds that it can support then 565 * flap the tx laser to alert the link partner to start autotry 566 * process on its end. 567 **/ 568 void ixgbe_flap_tx_laser(struct ixgbe_hw *hw) 569 { 570 if (hw->mac.ops.flap_tx_laser) 571 hw->mac.ops.flap_tx_laser(hw); 572 } 573 574 /** 575 * ixgbe_setup_link - Set link speed 576 * @hw: pointer to hardware structure 577 * @speed: new link speed 578 * @autoneg: TRUE if autonegotiation enabled 579 * 580 * Configures link settings. Restarts the link. 581 * Performs autonegotiation if needed. 582 **/ 583 s32 ixgbe_setup_link(struct ixgbe_hw *hw, ixgbe_link_speed speed, 584 bool autoneg, 585 bool autoneg_wait_to_complete) 586 { 587 return ixgbe_call_func(hw, hw->mac.ops.setup_link, (hw, speed, 588 autoneg, autoneg_wait_to_complete), 589 IXGBE_NOT_IMPLEMENTED); 590 } 591 592 /** 593 * ixgbe_get_link_capabilities - Returns link capabilities 594 * @hw: pointer to hardware structure 595 * 596 * Determines the link capabilities of the current configuration. 597 **/ 598 s32 ixgbe_get_link_capabilities(struct ixgbe_hw *hw, ixgbe_link_speed *speed, 599 bool *autoneg) 600 { 601 return ixgbe_call_func(hw, hw->mac.ops.get_link_capabilities, (hw, 602 speed, autoneg), IXGBE_NOT_IMPLEMENTED); 603 } 604 605 /** 606 * ixgbe_led_on - Turn on LEDs 607 * @hw: pointer to hardware structure 608 * @index: led number to turn on 609 * 610 * Turns on the software controllable LEDs. 611 **/ 612 s32 ixgbe_led_on(struct ixgbe_hw *hw, u32 index) 613 { 614 return ixgbe_call_func(hw, hw->mac.ops.led_on, (hw, index), 615 IXGBE_NOT_IMPLEMENTED); 616 } 617 618 /** 619 * ixgbe_led_off - Turn off LEDs 620 * @hw: pointer to hardware structure 621 * @index: led number to turn off 622 * 623 * Turns off the software controllable LEDs. 624 **/ 625 s32 ixgbe_led_off(struct ixgbe_hw *hw, u32 index) 626 { 627 return ixgbe_call_func(hw, hw->mac.ops.led_off, (hw, index), 628 IXGBE_NOT_IMPLEMENTED); 629 } 630 631 /** 632 * ixgbe_blink_led_start - Blink LEDs 633 * @hw: pointer to hardware structure 634 * @index: led number to blink 635 * 636 * Blink LED based on index. 637 **/ 638 s32 ixgbe_blink_led_start(struct ixgbe_hw *hw, u32 index) 639 { 640 return ixgbe_call_func(hw, hw->mac.ops.blink_led_start, (hw, index), 641 IXGBE_NOT_IMPLEMENTED); 642 } 643 644 /** 645 * ixgbe_blink_led_stop - Stop blinking LEDs 646 * @hw: pointer to hardware structure 647 * 648 * Stop blinking LED based on index. 649 **/ 650 s32 ixgbe_blink_led_stop(struct ixgbe_hw *hw, u32 index) 651 { 652 return ixgbe_call_func(hw, hw->mac.ops.blink_led_stop, (hw, index), 653 IXGBE_NOT_IMPLEMENTED); 654 } 655 656 /** 657 * ixgbe_init_eeprom_params - Initialize EEPROM parameters 658 * @hw: pointer to hardware structure 659 * 660 * Initializes the EEPROM parameters ixgbe_eeprom_info within the 661 * ixgbe_hw struct in order to set up EEPROM access. 662 **/ 663 s32 ixgbe_init_eeprom_params(struct ixgbe_hw *hw) 664 { 665 return ixgbe_call_func(hw, hw->eeprom.ops.init_params, (hw), 666 IXGBE_NOT_IMPLEMENTED); 667 } 668 669 670 /** 671 * ixgbe_write_eeprom - Write word to EEPROM 672 * @hw: pointer to hardware structure 673 * @offset: offset within the EEPROM to be written to 674 * @data: 16 bit word to be written to the EEPROM 675 * 676 * Writes 16 bit value to EEPROM. If ixgbe_eeprom_update_checksum is not 677 * called after this function, the EEPROM will most likely contain an 678 * invalid checksum. 679 **/ 680 s32 ixgbe_write_eeprom(struct ixgbe_hw *hw, u16 offset, u16 data) 681 { 682 return ixgbe_call_func(hw, hw->eeprom.ops.write, (hw, offset, data), 683 IXGBE_NOT_IMPLEMENTED); 684 } 685 686 /** 687 * ixgbe_read_eeprom - Read word from EEPROM 688 * @hw: pointer to hardware structure 689 * @offset: offset within the EEPROM to be read 690 * @data: read 16 bit value from EEPROM 691 * 692 * Reads 16 bit value from EEPROM 693 **/ 694 s32 ixgbe_read_eeprom(struct ixgbe_hw *hw, u16 offset, u16 *data) 695 { 696 return ixgbe_call_func(hw, hw->eeprom.ops.read, (hw, offset, data), 697 IXGBE_NOT_IMPLEMENTED); 698 } 699 700 /** 701 * ixgbe_validate_eeprom_checksum - Validate EEPROM checksum 702 * @hw: pointer to hardware structure 703 * @checksum_val: calculated checksum 704 * 705 * Performs checksum calculation and validates the EEPROM checksum 706 **/ 707 s32 ixgbe_validate_eeprom_checksum(struct ixgbe_hw *hw, u16 *checksum_val) 708 { 709 return ixgbe_call_func(hw, hw->eeprom.ops.validate_checksum, 710 (hw, checksum_val), IXGBE_NOT_IMPLEMENTED); 711 } 712 713 /** 714 * ixgbe_eeprom_update_checksum - Updates the EEPROM checksum 715 * @hw: pointer to hardware structure 716 **/ 717 s32 ixgbe_update_eeprom_checksum(struct ixgbe_hw *hw) 718 { 719 return ixgbe_call_func(hw, hw->eeprom.ops.update_checksum, (hw), 720 IXGBE_NOT_IMPLEMENTED); 721 } 722 723 /** 724 * ixgbe_insert_mac_addr - Find a RAR for this mac address 725 * @hw: pointer to hardware structure 726 * @addr: Address to put into receive address register 727 * @vmdq: VMDq pool to assign 728 * 729 * Puts an ethernet address into a receive address register, or 730 * finds the rar that it is aleady in; adds to the pool list 731 **/ 732 s32 ixgbe_insert_mac_addr(struct ixgbe_hw *hw, u8 *addr, u32 vmdq) 733 { 734 return ixgbe_call_func(hw, hw->mac.ops.insert_mac_addr, 735 (hw, addr, vmdq), 736 IXGBE_NOT_IMPLEMENTED); 737 } 738 739 /** 740 * ixgbe_set_rar - Set Rx address register 741 * @hw: pointer to hardware structure 742 * @index: Receive address register to write 743 * @addr: Address to put into receive address register 744 * @vmdq: VMDq "set" 745 * @enable_addr: set flag that address is active 746 * 747 * Puts an ethernet address into a receive address register. 748 **/ 749 s32 ixgbe_set_rar(struct ixgbe_hw *hw, u32 index, u8 *addr, u32 vmdq, 750 u32 enable_addr) 751 { 752 return ixgbe_call_func(hw, hw->mac.ops.set_rar, (hw, index, addr, vmdq, 753 enable_addr), IXGBE_NOT_IMPLEMENTED); 754 } 755 756 /** 757 * ixgbe_clear_rar - Clear Rx address register 758 * @hw: pointer to hardware structure 759 * @index: Receive address register to write 760 * 761 * Puts an ethernet address into a receive address register. 762 **/ 763 s32 ixgbe_clear_rar(struct ixgbe_hw *hw, u32 index) 764 { 765 return ixgbe_call_func(hw, hw->mac.ops.clear_rar, (hw, index), 766 IXGBE_NOT_IMPLEMENTED); 767 } 768 769 /** 770 * ixgbe_set_vmdq - Associate a VMDq index with a receive address 771 * @hw: pointer to hardware structure 772 * @rar: receive address register index to associate with VMDq index 773 * @vmdq: VMDq set or pool index 774 **/ 775 s32 ixgbe_set_vmdq(struct ixgbe_hw *hw, u32 rar, u32 vmdq) 776 { 777 return ixgbe_call_func(hw, hw->mac.ops.set_vmdq, (hw, rar, vmdq), 778 IXGBE_NOT_IMPLEMENTED); 779 } 780 781 /** 782 * ixgbe_clear_vmdq - Disassociate a VMDq index from a receive address 783 * @hw: pointer to hardware structure 784 * @rar: receive address register index to disassociate with VMDq index 785 * @vmdq: VMDq set or pool index 786 **/ 787 s32 ixgbe_clear_vmdq(struct ixgbe_hw *hw, u32 rar, u32 vmdq) 788 { 789 return ixgbe_call_func(hw, hw->mac.ops.clear_vmdq, (hw, rar, vmdq), 790 IXGBE_NOT_IMPLEMENTED); 791 } 792 793 /** 794 * ixgbe_init_rx_addrs - Initializes receive address filters. 795 * @hw: pointer to hardware structure 796 * 797 * Places the MAC address in receive address register 0 and clears the rest 798 * of the receive address registers. Clears the multicast table. Assumes 799 * the receiver is in reset when the routine is called. 800 **/ 801 s32 ixgbe_init_rx_addrs(struct ixgbe_hw *hw) 802 { 803 return ixgbe_call_func(hw, hw->mac.ops.init_rx_addrs, (hw), 804 IXGBE_NOT_IMPLEMENTED); 805 } 806 807 /** 808 * ixgbe_get_num_rx_addrs - Returns the number of RAR entries. 809 * @hw: pointer to hardware structure 810 **/ 811 u32 ixgbe_get_num_rx_addrs(struct ixgbe_hw *hw) 812 { 813 return hw->mac.num_rar_entries; 814 } 815 816 /** 817 * ixgbe_update_uc_addr_list - Updates the MAC's list of secondary addresses 818 * @hw: pointer to hardware structure 819 * @addr_list: the list of new multicast addresses 820 * @addr_count: number of addresses 821 * @func: iterator function to walk the multicast address list 822 * 823 * The given list replaces any existing list. Clears the secondary addrs from 824 * receive address registers. Uses unused receive address registers for the 825 * first secondary addresses, and falls back to promiscuous mode as needed. 826 **/ 827 s32 ixgbe_update_uc_addr_list(struct ixgbe_hw *hw, u8 *addr_list, 828 u32 addr_count, ixgbe_mc_addr_itr func) 829 { 830 return ixgbe_call_func(hw, hw->mac.ops.update_uc_addr_list, (hw, 831 addr_list, addr_count, func), 832 IXGBE_NOT_IMPLEMENTED); 833 } 834 835 /** 836 * ixgbe_update_mc_addr_list - Updates the MAC's list of multicast addresses 837 * @hw: pointer to hardware structure 838 * @mc_addr_list: the list of new multicast addresses 839 * @mc_addr_count: number of addresses 840 * @func: iterator function to walk the multicast address list 841 * 842 * The given list replaces any existing list. Clears the MC addrs from receive 843 * address registers and the multicast table. Uses unused receive address 844 * registers for the first multicast addresses, and hashes the rest into the 845 * multicast table. 846 **/ 847 s32 ixgbe_update_mc_addr_list(struct ixgbe_hw *hw, u8 *mc_addr_list, 848 u32 mc_addr_count, ixgbe_mc_addr_itr func) 849 { 850 return ixgbe_call_func(hw, hw->mac.ops.update_mc_addr_list, (hw, 851 mc_addr_list, mc_addr_count, func), 852 IXGBE_NOT_IMPLEMENTED); 853 } 854 855 /** 856 * ixgbe_enable_mc - Enable multicast address in RAR 857 * @hw: pointer to hardware structure 858 * 859 * Enables multicast address in RAR and the use of the multicast hash table. 860 **/ 861 s32 ixgbe_enable_mc(struct ixgbe_hw *hw) 862 { 863 return ixgbe_call_func(hw, hw->mac.ops.enable_mc, (hw), 864 IXGBE_NOT_IMPLEMENTED); 865 } 866 867 /** 868 * ixgbe_disable_mc - Disable multicast address in RAR 869 * @hw: pointer to hardware structure 870 * 871 * Disables multicast address in RAR and the use of the multicast hash table. 872 **/ 873 s32 ixgbe_disable_mc(struct ixgbe_hw *hw) 874 { 875 return ixgbe_call_func(hw, hw->mac.ops.disable_mc, (hw), 876 IXGBE_NOT_IMPLEMENTED); 877 } 878 879 /** 880 * ixgbe_clear_vfta - Clear VLAN filter table 881 * @hw: pointer to hardware structure 882 * 883 * Clears the VLAN filer table, and the VMDq index associated with the filter 884 **/ 885 s32 ixgbe_clear_vfta(struct ixgbe_hw *hw) 886 { 887 return ixgbe_call_func(hw, hw->mac.ops.clear_vfta, (hw), 888 IXGBE_NOT_IMPLEMENTED); 889 } 890 891 /** 892 * ixgbe_set_vfta - Set VLAN filter table 893 * @hw: pointer to hardware structure 894 * @vlan: VLAN id to write to VLAN filter 895 * @vind: VMDq output index that maps queue to VLAN id in VFTA 896 * @vlan_on: boolean flag to turn on/off VLAN in VFTA 897 * 898 * Turn on/off specified VLAN in the VLAN filter table. 899 **/ 900 s32 ixgbe_set_vfta(struct ixgbe_hw *hw, u32 vlan, u32 vind, bool vlan_on) 901 { 902 return ixgbe_call_func(hw, hw->mac.ops.set_vfta, (hw, vlan, vind, 903 vlan_on), IXGBE_NOT_IMPLEMENTED); 904 } 905 906 /** 907 * ixgbe_fc_enable - Enable flow control 908 * @hw: pointer to hardware structure 909 * @packetbuf_num: packet buffer number (0-7) 910 * 911 * Configures the flow control settings based on SW configuration. 912 **/ 913 s32 ixgbe_fc_enable(struct ixgbe_hw *hw, s32 packetbuf_num) 914 { 915 return ixgbe_call_func(hw, hw->mac.ops.fc_enable, (hw, packetbuf_num), 916 IXGBE_NOT_IMPLEMENTED); 917 } 918 919 /** 920 * ixgbe_read_analog_reg8 - Reads 8 bit analog register 921 * @hw: pointer to hardware structure 922 * @reg: analog register to read 923 * @val: read value 924 * 925 * Performs write operation to analog register specified. 926 **/ 927 s32 ixgbe_read_analog_reg8(struct ixgbe_hw *hw, u32 reg, u8 *val) 928 { 929 return ixgbe_call_func(hw, hw->mac.ops.read_analog_reg8, (hw, reg, 930 val), IXGBE_NOT_IMPLEMENTED); 931 } 932 933 /** 934 * ixgbe_write_analog_reg8 - Writes 8 bit analog register 935 * @hw: pointer to hardware structure 936 * @reg: analog register to write 937 * @val: value to write 938 * 939 * Performs write operation to Atlas analog register specified. 940 **/ 941 s32 ixgbe_write_analog_reg8(struct ixgbe_hw *hw, u32 reg, u8 val) 942 { 943 return ixgbe_call_func(hw, hw->mac.ops.write_analog_reg8, (hw, reg, 944 val), IXGBE_NOT_IMPLEMENTED); 945 } 946 947 /** 948 * ixgbe_init_uta_tables - Initializes Unicast Table Arrays. 949 * @hw: pointer to hardware structure 950 * 951 * Initializes the Unicast Table Arrays to zero on device load. This 952 * is part of the Rx init addr execution path. 953 **/ 954 s32 ixgbe_init_uta_tables(struct ixgbe_hw *hw) 955 { 956 return ixgbe_call_func(hw, hw->mac.ops.init_uta_tables, (hw), 957 IXGBE_NOT_IMPLEMENTED); 958 } 959 960 /** 961 * ixgbe_read_i2c_byte - Reads 8 bit word over I2C at specified device address 962 * @hw: pointer to hardware structure 963 * @byte_offset: byte offset to read 964 * @data: value read 965 * 966 * Performs byte read operation to SFP module's EEPROM over I2C interface. 967 **/ 968 s32 ixgbe_read_i2c_byte(struct ixgbe_hw *hw, u8 byte_offset, u8 dev_addr, 969 u8 *data) 970 { 971 return ixgbe_call_func(hw, hw->phy.ops.read_i2c_byte, (hw, byte_offset, 972 dev_addr, data), IXGBE_NOT_IMPLEMENTED); 973 } 974 975 /** 976 * ixgbe_write_i2c_byte - Writes 8 bit word over I2C 977 * @hw: pointer to hardware structure 978 * @byte_offset: byte offset to write 979 * @data: value to write 980 * 981 * Performs byte write operation to SFP module's EEPROM over I2C interface 982 * at a specified device address. 983 **/ 984 s32 ixgbe_write_i2c_byte(struct ixgbe_hw *hw, u8 byte_offset, u8 dev_addr, 985 u8 data) 986 { 987 return ixgbe_call_func(hw, hw->phy.ops.write_i2c_byte, (hw, byte_offset, 988 dev_addr, data), IXGBE_NOT_IMPLEMENTED); 989 } 990 991 /** 992 * ixgbe_write_i2c_eeprom - Writes 8 bit EEPROM word over I2C interface 993 * @hw: pointer to hardware structure 994 * @byte_offset: EEPROM byte offset to write 995 * @eeprom_data: value to write 996 * 997 * Performs byte write operation to SFP module's EEPROM over I2C interface. 998 **/ 999 s32 ixgbe_write_i2c_eeprom(struct ixgbe_hw *hw, 1000 u8 byte_offset, u8 eeprom_data) 1001 { 1002 return ixgbe_call_func(hw, hw->phy.ops.write_i2c_eeprom, 1003 (hw, byte_offset, eeprom_data), 1004 IXGBE_NOT_IMPLEMENTED); 1005 } 1006 1007 /** 1008 * ixgbe_read_i2c_eeprom - Reads 8 bit EEPROM word over I2C interface 1009 * @hw: pointer to hardware structure 1010 * @byte_offset: EEPROM byte offset to read 1011 * @eeprom_data: value read 1012 * 1013 * Performs byte read operation to SFP module's EEPROM over I2C interface. 1014 **/ 1015 s32 ixgbe_read_i2c_eeprom(struct ixgbe_hw *hw, u8 byte_offset, u8 *eeprom_data) 1016 { 1017 return ixgbe_call_func(hw, hw->phy.ops.read_i2c_eeprom, 1018 (hw, byte_offset, eeprom_data), 1019 IXGBE_NOT_IMPLEMENTED); 1020 } 1021 1022 /** 1023 * ixgbe_get_supported_physical_layer - Returns physical layer type 1024 * @hw: pointer to hardware structure 1025 * 1026 * Determines physical layer capabilities of the current configuration. 1027 **/ 1028 u32 ixgbe_get_supported_physical_layer(struct ixgbe_hw *hw) 1029 { 1030 return ixgbe_call_func(hw, hw->mac.ops.get_supported_physical_layer, 1031 (hw), IXGBE_PHYSICAL_LAYER_UNKNOWN); 1032 } 1033 1034 /** 1035 * ixgbe_enable_rx_dma - Enables Rx DMA unit, dependant on device specifics 1036 * @hw: pointer to hardware structure 1037 * @regval: bitfield to write to the Rx DMA register 1038 * 1039 * Enables the Rx DMA unit of the device. 1040 **/ 1041 s32 ixgbe_enable_rx_dma(struct ixgbe_hw *hw, u32 regval) 1042 { 1043 return ixgbe_call_func(hw, hw->mac.ops.enable_rx_dma, 1044 (hw, regval), IXGBE_NOT_IMPLEMENTED); 1045 } 1046 1047 /** 1048 * ixgbe_acquire_swfw_semaphore - Acquire SWFW semaphore 1049 * @hw: pointer to hardware structure 1050 * @mask: Mask to specify which semaphore to acquire 1051 * 1052 * Acquires the SWFW semaphore through SW_FW_SYNC register for the specified 1053 * function (CSR, PHY0, PHY1, EEPROM, Flash) 1054 **/ 1055 s32 ixgbe_acquire_swfw_semaphore(struct ixgbe_hw *hw, u16 mask) 1056 { 1057 return ixgbe_call_func(hw, hw->mac.ops.acquire_swfw_sync, 1058 (hw, mask), IXGBE_NOT_IMPLEMENTED); 1059 } 1060 1061 /** 1062 * ixgbe_release_swfw_semaphore - Release SWFW semaphore 1063 * @hw: pointer to hardware structure 1064 * @mask: Mask to specify which semaphore to release 1065 * 1066 * Releases the SWFW semaphore through SW_FW_SYNC register for the specified 1067 * function (CSR, PHY0, PHY1, EEPROM, Flash) 1068 **/ 1069 void ixgbe_release_swfw_semaphore(struct ixgbe_hw *hw, u16 mask) 1070 { 1071 if (hw->mac.ops.release_swfw_sync) 1072 hw->mac.ops.release_swfw_sync(hw, mask); 1073 } 1074 1075