1 /* 2 * CDDL HEADER START 3 * 4 * Copyright(c) 2007-2009 Intel Corporation. All rights reserved. 5 * The contents of this file are subject to the terms of the 6 * Common Development and Distribution License (the "License"). 7 * You may not use this file except in compliance with the License. 8 * 9 * You can obtain a copy of the license at: 10 * http://www.opensolaris.org/os/licensing. 11 * See the License for the specific language governing permissions 12 * and limitations under the License. 13 * 14 * When using or redistributing this file, you may do so under the 15 * License only. No other modification of this header is permitted. 16 * 17 * If applicable, add the following below this CDDL HEADER, with the 18 * fields enclosed by brackets "[]" replaced with your own identifying 19 * information: Portions Copyright [yyyy] [name of copyright owner] 20 * 21 * CDDL HEADER END 22 */ 23 24 /* 25 * Copyright 2009 Sun Microsystems, Inc. All rights reserved. 26 * Use is subject to license terms. 27 */ 28 29 /* IntelVersion: 1.117 v2-7-8_2009-4-7 */ 30 31 #include "ixgbe_api.h" 32 #include "ixgbe_common.h" 33 34 extern s32 ixgbe_init_ops_82598(struct ixgbe_hw *hw); 35 extern s32 ixgbe_init_ops_82599(struct ixgbe_hw *hw); 36 37 /* 38 * ixgbe_init_shared_code - Initialize the shared code 39 * @hw: pointer to hardware structure 40 * 41 * This will assign function pointers and assign the MAC type and PHY code. 42 * Does not touch the hardware. This function must be called prior to any 43 * other function in the shared code. The ixgbe_hw structure should be 44 * memset to 0 prior to calling this function. The following fields in 45 * hw structure should be filled in prior to calling this function: 46 * hw_addr, back, device_id, vendor_id, subsystem_device_id, 47 * subsystem_vendor_id, and revision_id 48 */ 49 s32 50 ixgbe_init_shared_code(struct ixgbe_hw *hw) 51 { 52 s32 status; 53 54 /* 55 * Set the mac type 56 */ 57 (void) ixgbe_set_mac_type(hw); 58 59 switch (hw->mac.type) { 60 case ixgbe_mac_82598EB: 61 status = ixgbe_init_ops_82598(hw); 62 break; 63 case ixgbe_mac_82599EB: 64 status = ixgbe_init_ops_82599(hw); 65 break; 66 default: 67 status = IXGBE_ERR_DEVICE_NOT_SUPPORTED; 68 break; 69 } 70 71 return (status); 72 } 73 74 /* 75 * ixgbe_set_mac_type - Sets MAC type 76 * @hw: pointer to the HW structure 77 * 78 * This function sets the mac type of the adapter based on the 79 * vendor ID and device ID stored in the hw structure. 80 */ 81 s32 82 ixgbe_set_mac_type(struct ixgbe_hw *hw) 83 { 84 s32 ret_val = IXGBE_SUCCESS; 85 86 DEBUGFUNC("ixgbe_set_mac_type\n"); 87 88 if (hw->vendor_id == IXGBE_INTEL_VENDOR_ID) { 89 switch (hw->device_id) { 90 case IXGBE_DEV_ID_82598: 91 case IXGBE_DEV_ID_82598_BX: 92 case IXGBE_DEV_ID_82598AF_SINGLE_PORT: 93 case IXGBE_DEV_ID_82598AF_DUAL_PORT: 94 case IXGBE_DEV_ID_82598AT: 95 case IXGBE_DEV_ID_82598EB_CX4: 96 case IXGBE_DEV_ID_82598_CX4_DUAL_PORT: 97 case IXGBE_DEV_ID_82598_DA_DUAL_PORT: 98 case IXGBE_DEV_ID_82598_SR_DUAL_PORT_EM: 99 case IXGBE_DEV_ID_82598EB_XF_LR: 100 case IXGBE_DEV_ID_82598EB_SFP_LOM: 101 hw->mac.type = ixgbe_mac_82598EB; 102 break; 103 case IXGBE_DEV_ID_82599_KX4: 104 case IXGBE_DEV_ID_82599_KX4_SIK: 105 case IXGBE_DEV_ID_82599_SFP: 106 case IXGBE_DEV_ID_82599_SPW: 107 case IXGBE_DEV_ID_82599_CX4: 108 hw->mac.type = ixgbe_mac_82599EB; 109 break; 110 default: 111 ret_val = IXGBE_ERR_DEVICE_NOT_SUPPORTED; 112 break; 113 } 114 } else { 115 ret_val = IXGBE_ERR_DEVICE_NOT_SUPPORTED; 116 } 117 118 DEBUGOUT2("ixgbe_set_mac_type found mac: %d, returns: %d\n", 119 hw->mac.type, ret_val); 120 121 return (ret_val); 122 } 123 124 /* 125 * ixgbe_init_hw - Initialize the hardware 126 * @hw: pointer to hardware structure 127 * 128 * Initialize the hardware by resetting and then starting the hardware 129 */ 130 s32 131 ixgbe_init_hw(struct ixgbe_hw *hw) 132 { 133 return ixgbe_call_func(hw, hw->mac.ops.init_hw, (hw), 134 IXGBE_NOT_IMPLEMENTED); 135 } 136 137 /* 138 * ixgbe_reset_hw - Performs a hardware reset 139 * @hw: pointer to hardware structure 140 * 141 * Resets the hardware by resetting the transmit and receive units, masks and 142 * clears all interrupts, performs a PHY reset, and performs a MAC reset 143 */ 144 s32 145 ixgbe_reset_hw(struct ixgbe_hw *hw) 146 { 147 return ixgbe_call_func(hw, hw->mac.ops.reset_hw, (hw), 148 IXGBE_NOT_IMPLEMENTED); 149 } 150 151 /* 152 * ixgbe_start_hw - Prepares hardware for Rx/Tx 153 * @hw: pointer to hardware structure 154 * 155 * Starts the hardware by filling the bus info structure and media type, 156 * clears all on chip counters, initializes receive address registers, 157 * multicast table, VLAN filter table, calls routine to setup link and 158 * flow control settings, and leaves transmit and receive units disabled 159 * and uninitialized. 160 */ 161 s32 162 ixgbe_start_hw(struct ixgbe_hw *hw) 163 { 164 return ixgbe_call_func(hw, hw->mac.ops.start_hw, (hw), 165 IXGBE_NOT_IMPLEMENTED); 166 } 167 168 /* 169 * ixgbe_clear_hw_cntrs - Clear hardware counters 170 * @hw: pointer to hardware structure 171 * 172 * Clears all hardware statistics counters by reading them from the hardware 173 * Statistics counters are clear on read. 174 */ 175 s32 176 ixgbe_clear_hw_cntrs(struct ixgbe_hw *hw) 177 { 178 return ixgbe_call_func(hw, hw->mac.ops.clear_hw_cntrs, (hw), 179 IXGBE_NOT_IMPLEMENTED); 180 } 181 182 /* 183 * ixgbe_get_media_type - Get media type 184 * @hw: pointer to hardware structure 185 * 186 * Returns the media type (fiber, copper, backplane) 187 */ 188 enum ixgbe_media_type 189 ixgbe_get_media_type(struct ixgbe_hw *hw) 190 { 191 return ixgbe_call_func(hw, hw->mac.ops.get_media_type, (hw), 192 ixgbe_media_type_unknown); 193 } 194 195 /* 196 * ixgbe_get_mac_addr - Get MAC address 197 * @hw: pointer to hardware structure 198 * @mac_addr: Adapter MAC address 199 * 200 * Reads the adapter's MAC address from the first Receive Address Register 201 * (RAR0) A reset of the adapter must have been performed prior to calling 202 * this function in order for the MAC address to have been loaded from the 203 * EEPROM into RAR0 204 */ 205 s32 206 ixgbe_get_mac_addr(struct ixgbe_hw *hw, u8 *mac_addr) 207 { 208 return ixgbe_call_func(hw, hw->mac.ops.get_mac_addr, 209 (hw, mac_addr), IXGBE_NOT_IMPLEMENTED); 210 } 211 212 /* 213 * ixgbe_get_san_mac_addr - Get SAN MAC address 214 * @hw: pointer to hardware structure 215 * @san_mac_addr: SAN MAC address 216 * 217 * Reads the SAN MAC address from the EEPROM, if it's available. This is 218 * per-port, so set_lan_id() must be called before reading the addresses. 219 */ 220 s32 221 ixgbe_get_san_mac_addr(struct ixgbe_hw *hw, u8 *san_mac_addr) 222 { 223 return ixgbe_call_func(hw, hw->mac.ops.get_san_mac_addr, 224 (hw, san_mac_addr), IXGBE_NOT_IMPLEMENTED); 225 } 226 227 /* 228 * ixgbe_set_san_mac_addr - Write a SAN MAC address 229 * @hw: pointer to hardware structure 230 * @san_mac_addr: SAN MAC address 231 * 232 * Writes A SAN MAC address to the EEPROM. 233 */ 234 s32 235 ixgbe_set_san_mac_addr(struct ixgbe_hw *hw, u8 *san_mac_addr) 236 { 237 return ixgbe_call_func(hw, hw->mac.ops.set_san_mac_addr, 238 (hw, san_mac_addr), IXGBE_NOT_IMPLEMENTED); 239 } 240 241 /* 242 * ixgbe_get_device_caps - Get additional device capabilities 243 * @hw: pointer to hardware structure 244 * @device_caps: the EEPROM word for device capabilities 245 * 246 * Reads the extra device capabilities from the EEPROM 247 */ 248 s32 249 ixgbe_get_device_caps(struct ixgbe_hw *hw, u16 *device_caps) 250 { 251 return ixgbe_call_func(hw, hw->mac.ops.get_device_caps, 252 (hw, device_caps), IXGBE_NOT_IMPLEMENTED); 253 } 254 255 /* 256 * ixgbe_get_bus_info - Set PCI bus info 257 * @hw: pointer to hardware structure 258 * 259 * Sets the PCI bus info (speed, width, type) within the ixgbe_hw structure 260 */ 261 s32 262 ixgbe_get_bus_info(struct ixgbe_hw *hw) 263 { 264 return ixgbe_call_func(hw, hw->mac.ops.get_bus_info, (hw), 265 IXGBE_NOT_IMPLEMENTED); 266 } 267 268 /* 269 * ixgbe_get_num_of_tx_queues - Get Tx queues 270 * @hw: pointer to hardware structure 271 * 272 * Returns the number of transmit queues for the given adapter. 273 */ 274 u32 275 ixgbe_get_num_of_tx_queues(struct ixgbe_hw *hw) 276 { 277 return (hw->mac.max_tx_queues); 278 } 279 280 /* 281 * ixgbe_get_num_of_rx_queues - Get Rx queues 282 * @hw: pointer to hardware structure 283 * 284 * Returns the number of receive queues for the given adapter. 285 */ 286 u32 287 ixgbe_get_num_of_rx_queues(struct ixgbe_hw *hw) 288 { 289 return (hw->mac.max_rx_queues); 290 } 291 292 /* 293 * ixgbe_stop_adapter - Disable Rx/Tx units 294 * @hw: pointer to hardware structure 295 * 296 * Sets the adapter_stopped flag within ixgbe_hw struct. Clears interrupts, 297 * disables transmit and receive units. The adapter_stopped flag is used by 298 * the shared code and drivers to determine if the adapter is in a stopped 299 * state and should not touch the hardware. 300 */ 301 s32 302 ixgbe_stop_adapter(struct ixgbe_hw *hw) 303 { 304 return ixgbe_call_func(hw, hw->mac.ops.stop_adapter, (hw), 305 IXGBE_NOT_IMPLEMENTED); 306 } 307 308 /* 309 * ixgbe_read_pba_num - Reads part number from EEPROM 310 * @hw: pointer to hardware structure 311 * @pba_num: stores the part number from the EEPROM 312 * 313 * Reads the part number from the EEPROM. 314 */ 315 s32 316 ixgbe_read_pba_num(struct ixgbe_hw *hw, u32 *pba_num) 317 { 318 return (ixgbe_read_pba_num_generic(hw, pba_num)); 319 } 320 321 /* 322 * ixgbe_identify_phy - Get PHY type 323 * @hw: pointer to hardware structure 324 * 325 * Determines the physical layer module found on the current adapter. 326 */ 327 s32 328 ixgbe_identify_phy(struct ixgbe_hw *hw) 329 { 330 s32 status = IXGBE_SUCCESS; 331 332 if (hw->phy.type == ixgbe_phy_unknown) { 333 status = ixgbe_call_func(hw, 334 hw->phy.ops.identify, 335 (hw), 336 IXGBE_NOT_IMPLEMENTED); 337 } 338 339 return (status); 340 } 341 342 /* 343 * ixgbe_reset_phy - Perform a PHY reset 344 * @hw: pointer to hardware structure 345 */ 346 s32 347 ixgbe_reset_phy(struct ixgbe_hw *hw) 348 { 349 s32 status = IXGBE_SUCCESS; 350 351 if (hw->phy.type == ixgbe_phy_unknown) { 352 if (ixgbe_identify_phy(hw) != IXGBE_SUCCESS) { 353 status = IXGBE_ERR_PHY; 354 } 355 } 356 357 if (status == IXGBE_SUCCESS) { 358 status = ixgbe_call_func(hw, hw->phy.ops.reset, (hw), 359 IXGBE_NOT_IMPLEMENTED); 360 } 361 return (status); 362 } 363 364 /* 365 * ixgbe_get_phy_firmware_version - 366 * @hw: pointer to hardware structure 367 * @firmware_version: pointer to firmware version 368 */ 369 s32 370 ixgbe_get_phy_firmware_version(struct ixgbe_hw *hw, u16 *firmware_version) 371 { 372 s32 status = IXGBE_SUCCESS; 373 374 status = ixgbe_call_func(hw, hw->phy.ops.get_firmware_version, 375 (hw, firmware_version), IXGBE_NOT_IMPLEMENTED); 376 return (status); 377 } 378 379 /* 380 * ixgbe_read_phy_reg - Read PHY register 381 * @hw: pointer to hardware structure 382 * @reg_addr: 32 bit address of PHY register to read 383 * @phy_data: Pointer to read data from PHY register 384 * 385 * Reads a value from a specified PHY register 386 */ 387 s32 388 ixgbe_read_phy_reg(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type, 389 u16 *phy_data) 390 { 391 if (hw->phy.id == 0) 392 (void) ixgbe_identify_phy(hw); 393 394 return ixgbe_call_func(hw, hw->phy.ops.read_reg, (hw, reg_addr, 395 device_type, phy_data), IXGBE_NOT_IMPLEMENTED); 396 } 397 398 /* 399 * ixgbe_write_phy_reg - Write PHY register 400 * @hw: pointer to hardware structure 401 * @reg_addr: 32 bit PHY register to write 402 * @phy_data: Data to write to the PHY register 403 * 404 * Writes a value to specified PHY register 405 */ 406 s32 ixgbe_write_phy_reg(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type, 407 u16 phy_data) 408 { 409 if (hw->phy.id == 0) 410 (void) ixgbe_identify_phy(hw); 411 412 return ixgbe_call_func(hw, hw->phy.ops.write_reg, (hw, reg_addr, 413 device_type, phy_data), IXGBE_NOT_IMPLEMENTED); 414 } 415 416 /* 417 * ixgbe_setup_phy_link - Restart PHY autoneg 418 * @hw: pointer to hardware structure 419 * 420 * Restart autonegotiation and PHY and waits for completion. 421 */ 422 s32 423 ixgbe_setup_phy_link(struct ixgbe_hw *hw) 424 { 425 return ixgbe_call_func(hw, hw->phy.ops.setup_link, (hw), 426 IXGBE_NOT_IMPLEMENTED); 427 } 428 429 /* 430 * ixgbe_check_phy_link - Determine link and speed status 431 * @hw: pointer to hardware structure 432 * 433 * Reads a PHY register to determine if link is up and the current speed for 434 * the PHY. 435 */ 436 s32 ixgbe_check_phy_link(struct ixgbe_hw *hw, ixgbe_link_speed *speed, 437 bool *link_up) 438 { 439 return ixgbe_call_func(hw, hw->phy.ops.check_link, (hw, speed, 440 link_up), IXGBE_NOT_IMPLEMENTED); 441 } 442 443 /* 444 * ixgbe_setup_phy_link_speed - Set auto advertise 445 * @hw: pointer to hardware structure 446 * @speed: new link speed 447 * @autoneg: true if autonegotiation enabled 448 * 449 * Sets the auto advertised capabilities 450 */ 451 s32 452 ixgbe_setup_phy_link_speed(struct ixgbe_hw *hw, ixgbe_link_speed speed, 453 bool autoneg, 454 bool autoneg_wait_to_complete) 455 { 456 return ixgbe_call_func(hw, hw->phy.ops.setup_link_speed, (hw, speed, 457 autoneg, autoneg_wait_to_complete), 458 IXGBE_NOT_IMPLEMENTED); 459 } 460 461 /* 462 * ixgbe_setup_link - Configure link settings 463 * @hw: pointer to hardware structure 464 * 465 * Configures link settings based on values in the ixgbe_hw struct. 466 * Restarts the link. Performs autonegotiation if needed. 467 */ 468 s32 469 ixgbe_setup_link(struct ixgbe_hw *hw) 470 { 471 return ixgbe_call_func(hw, hw->mac.ops.setup_link, (hw), 472 IXGBE_NOT_IMPLEMENTED); 473 } 474 475 /* 476 * ixgbe_check_link - Get link and speed status 477 * @hw: pointer to hardware structure 478 * 479 * Reads the links register to determine if link is up and the current speed 480 */ 481 s32 482 ixgbe_check_link(struct ixgbe_hw *hw, ixgbe_link_speed *speed, 483 bool *link_up, bool link_up_wait_to_complete) 484 { 485 return ixgbe_call_func(hw, hw->mac.ops.check_link, (hw, speed, 486 link_up, link_up_wait_to_complete), IXGBE_NOT_IMPLEMENTED); 487 } 488 489 /* 490 * ixgbe_setup_link_speed - Set link speed 491 * @hw: pointer to hardware structure 492 * @speed: new link speed 493 * @autoneg: true if autonegotiation enabled 494 * 495 * Set the link speed and restarts the link. 496 */ 497 s32 ixgbe_setup_link_speed(struct ixgbe_hw *hw, ixgbe_link_speed speed, 498 bool autoneg, 499 bool autoneg_wait_to_complete) 500 { 501 return ixgbe_call_func(hw, hw->mac.ops.setup_link_speed, (hw, speed, 502 autoneg, autoneg_wait_to_complete), 503 IXGBE_NOT_IMPLEMENTED); 504 } 505 506 /* 507 * ixgbe_get_link_capabilities - Returns link capabilities 508 * @hw: pointer to hardware structure 509 * 510 * Determines the link capabilities of the current configuration. 511 */ 512 s32 513 ixgbe_get_link_capabilities(struct ixgbe_hw *hw, ixgbe_link_speed *speed, 514 bool *autoneg) 515 { 516 return ixgbe_call_func(hw, hw->mac.ops.get_link_capabilities, (hw, 517 speed, autoneg), IXGBE_NOT_IMPLEMENTED); 518 } 519 520 /* 521 * ixgbe_led_on - Turn on LEDs 522 * @hw: pointer to hardware structure 523 * @index: led number to turn on 524 * 525 * Turns on the software controllable LEDs. 526 */ 527 s32 528 ixgbe_led_on(struct ixgbe_hw *hw, u32 index) 529 { 530 return ixgbe_call_func(hw, hw->mac.ops.led_on, (hw, index), 531 IXGBE_NOT_IMPLEMENTED); 532 } 533 534 /* 535 * ixgbe_led_off - Turn off LEDs 536 * @hw: pointer to hardware structure 537 * @index: led number to turn off 538 * 539 * Turns off the software controllable LEDs. 540 */ 541 s32 542 ixgbe_led_off(struct ixgbe_hw *hw, u32 index) 543 { 544 return ixgbe_call_func(hw, hw->mac.ops.led_off, (hw, index), 545 IXGBE_NOT_IMPLEMENTED); 546 } 547 548 /* 549 * ixgbe_blink_led_start - Blink LEDs 550 * @hw: pointer to hardware structure 551 * @index: led number to blink 552 * 553 * Blink LED based on index. 554 */ 555 s32 556 ixgbe_blink_led_start(struct ixgbe_hw *hw, u32 index) 557 { 558 return ixgbe_call_func(hw, hw->mac.ops.blink_led_start, (hw, index), 559 IXGBE_NOT_IMPLEMENTED); 560 } 561 562 /* 563 * ixgbe_blink_led_stop - Stop blinking LEDs 564 * @hw: pointer to hardware structure 565 * 566 * Stop blinking LED based on index. 567 */ 568 s32 569 ixgbe_blink_led_stop(struct ixgbe_hw *hw, u32 index) 570 { 571 return ixgbe_call_func(hw, hw->mac.ops.blink_led_stop, (hw, index), 572 IXGBE_NOT_IMPLEMENTED); 573 } 574 575 /* 576 * ixgbe_init_eeprom_params - Initialize EEPROM parameters 577 * @hw: pointer to hardware structure 578 * 579 * Initializes the EEPROM parameters ixgbe_eeprom_info within the 580 * ixgbe_hw struct in order to set up EEPROM access. 581 */ 582 s32 583 ixgbe_init_eeprom_params(struct ixgbe_hw *hw) 584 { 585 return ixgbe_call_func(hw, hw->eeprom.ops.init_params, (hw), 586 IXGBE_NOT_IMPLEMENTED); 587 } 588 589 590 /* 591 * ixgbe_write_eeprom - Write word to EEPROM 592 * @hw: pointer to hardware structure 593 * @offset: offset within the EEPROM to be written to 594 * @data: 16 bit word to be written to the EEPROM 595 * 596 * Writes 16 bit value to EEPROM. If ixgbe_eeprom_update_checksum is not 597 * called after this function, the EEPROM will most likely contain an 598 * invalid checksum. 599 */ 600 s32 601 ixgbe_write_eeprom(struct ixgbe_hw *hw, u16 offset, u16 data) 602 { 603 return ixgbe_call_func(hw, hw->eeprom.ops.write, (hw, offset, data), 604 IXGBE_NOT_IMPLEMENTED); 605 } 606 607 /* 608 * ixgbe_read_eeprom - Read word from EEPROM 609 * @hw: pointer to hardware structure 610 * @offset: offset within the EEPROM to be read 611 * @data: read 16 bit value from EEPROM 612 * 613 * Reads 16 bit value from EEPROM 614 */ 615 s32 616 ixgbe_read_eeprom(struct ixgbe_hw *hw, u16 offset, u16 *data) 617 { 618 return ixgbe_call_func(hw, hw->eeprom.ops.read, (hw, offset, data), 619 IXGBE_NOT_IMPLEMENTED); 620 } 621 622 /* 623 * ixgbe_validate_eeprom_checksum - Validate EEPROM checksum 624 * @hw: pointer to hardware structure 625 * @checksum_val: calculated checksum 626 * 627 * Performs checksum calculation and validates the EEPROM checksum 628 */ 629 s32 630 ixgbe_validate_eeprom_checksum(struct ixgbe_hw *hw, u16 *checksum_val) 631 { 632 return ixgbe_call_func(hw, hw->eeprom.ops.validate_checksum, 633 (hw, checksum_val), IXGBE_NOT_IMPLEMENTED); 634 } 635 636 /* 637 * ixgbe_eeprom_update_checksum - Updates the EEPROM checksum 638 * @hw: pointer to hardware structure 639 */ 640 s32 641 ixgbe_update_eeprom_checksum(struct ixgbe_hw *hw) 642 { 643 return ixgbe_call_func(hw, hw->eeprom.ops.update_checksum, (hw), 644 IXGBE_NOT_IMPLEMENTED); 645 } 646 647 /* 648 * ixgbe_insert_mac_addr - Find a RAR for this mac address 649 * @hw: pointer to hardware structure 650 * @addr: Address to put into receive address register 651 * @vmdq: VMDq pool to assign 652 * 653 * Puts an ethernet address into a receive address register, or 654 * finds the rar that it is aleady in; adds to the pool list 655 */ 656 s32 657 ixgbe_insert_mac_addr(struct ixgbe_hw *hw, u8 *addr, u32 vmdq) 658 { 659 return ixgbe_call_func(hw, hw->mac.ops.insert_mac_addr, 660 (hw, addr, vmdq), IXGBE_NOT_IMPLEMENTED); 661 } 662 663 /* 664 * ixgbe_set_rar - Set Rx address register 665 * @hw: pointer to hardware structure 666 * @index: Receive address register to write 667 * @addr: Address to put into receive address register 668 * @vmdq: VMDq "set" 669 * @enable_addr: set flag that address is active 670 * 671 * Puts an ethernet address into a receive address register. 672 */ 673 s32 674 ixgbe_set_rar(struct ixgbe_hw *hw, u32 index, u8 *addr, u32 vmdq, 675 u32 enable_addr) 676 { 677 return ixgbe_call_func(hw, hw->mac.ops.set_rar, (hw, index, addr, vmdq, 678 enable_addr), IXGBE_NOT_IMPLEMENTED); 679 } 680 681 /* 682 * ixgbe_clear_rar - Clear Rx address register 683 * @hw: pointer to hardware structure 684 * @index: Receive address register to write 685 * 686 * Puts an ethernet address into a receive address register. 687 */ 688 s32 689 ixgbe_clear_rar(struct ixgbe_hw *hw, u32 index) 690 { 691 return ixgbe_call_func(hw, hw->mac.ops.clear_rar, (hw, index), 692 IXGBE_NOT_IMPLEMENTED); 693 } 694 695 /* 696 * ixgbe_set_vmdq - Associate a VMDq index with a receive address 697 * @hw: pointer to hardware structure 698 * @rar: receive address register index to associate with VMDq index 699 * @vmdq: VMDq set or pool index 700 */ 701 s32 702 ixgbe_set_vmdq(struct ixgbe_hw *hw, u32 rar, u32 vmdq) 703 { 704 return ixgbe_call_func(hw, hw->mac.ops.set_vmdq, (hw, rar, vmdq), 705 IXGBE_NOT_IMPLEMENTED); 706 } 707 708 /* 709 * ixgbe_clear_vmdq - Disassociate a VMDq index from a receive address 710 * @hw: pointer to hardware structure 711 * @rar: receive address register index to disassociate with VMDq index 712 * @vmdq: VMDq set or pool index 713 */ 714 s32 715 ixgbe_clear_vmdq(struct ixgbe_hw *hw, u32 rar, u32 vmdq) 716 { 717 return ixgbe_call_func(hw, hw->mac.ops.clear_vmdq, (hw, rar, vmdq), 718 IXGBE_NOT_IMPLEMENTED); 719 } 720 721 /* 722 * ixgbe_init_rx_addrs - Initializes receive address filters. 723 * @hw: pointer to hardware structure 724 * 725 * Places the MAC address in receive address register 0 and clears the rest 726 * of the receive address registers. Clears the multicast table. Assumes 727 * the receiver is in reset when the routine is called. 728 */ 729 s32 730 ixgbe_init_rx_addrs(struct ixgbe_hw *hw) 731 { 732 return ixgbe_call_func(hw, hw->mac.ops.init_rx_addrs, (hw), 733 IXGBE_NOT_IMPLEMENTED); 734 } 735 736 /* 737 * ixgbe_get_num_rx_addrs - Returns the number of RAR entries. 738 * @hw: pointer to hardware structure 739 */ 740 u32 741 ixgbe_get_num_rx_addrs(struct ixgbe_hw *hw) 742 { 743 return (hw->mac.num_rar_entries); 744 } 745 746 /* 747 * ixgbe_update_uc_addr_list - Updates the MAC's list of secondary addresses 748 * @hw: pointer to hardware structure 749 * @addr_list: the list of new multicast addresses 750 * @addr_count: number of addresses 751 * @func: iterator function to walk the multicast address list 752 * 753 * The given list replaces any existing list. Clears the secondary addrs from 754 * receive address registers. Uses unused receive address registers for the 755 * first secondary addresses, and falls back to promiscuous mode as needed. 756 */ 757 s32 758 ixgbe_update_uc_addr_list(struct ixgbe_hw *hw, u8 *addr_list, 759 u32 addr_count, ixgbe_mc_addr_itr func) 760 { 761 return ixgbe_call_func(hw, hw->mac.ops.update_uc_addr_list, (hw, 762 addr_list, addr_count, func), 763 IXGBE_NOT_IMPLEMENTED); 764 } 765 766 /* 767 * ixgbe_update_mc_addr_list - Updates the MAC's list of multicast addresses 768 * @hw: pointer to hardware structure 769 * @mc_addr_list: the list of new multicast addresses 770 * @mc_addr_count: number of addresses 771 * @func: iterator function to walk the multicast address list 772 * 773 * The given list replaces any existing list. Clears the MC addrs from receive 774 * address registers and the multicast table. Uses unused receive address 775 * registers for the first multicast addresses, and hashes the rest into the 776 * multicast table. 777 */ 778 s32 779 ixgbe_update_mc_addr_list(struct ixgbe_hw *hw, u8 *mc_addr_list, 780 u32 mc_addr_count, ixgbe_mc_addr_itr func) 781 { 782 return ixgbe_call_func(hw, hw->mac.ops.update_mc_addr_list, (hw, 783 mc_addr_list, mc_addr_count, func), 784 IXGBE_NOT_IMPLEMENTED); 785 } 786 787 /* 788 * ixgbe_enable_mc - Enable multicast address in RAR 789 * @hw: pointer to hardware structure 790 * 791 * Enables multicast address in RAR and the use of the multicast hash table. 792 */ 793 s32 794 ixgbe_enable_mc(struct ixgbe_hw *hw) 795 { 796 return ixgbe_call_func(hw, hw->mac.ops.enable_mc, (hw), 797 IXGBE_NOT_IMPLEMENTED); 798 } 799 800 /* 801 * ixgbe_disable_mc - Disable multicast address in RAR 802 * @hw: pointer to hardware structure 803 * 804 * Disables multicast address in RAR and the use of the multicast hash table. 805 */ 806 s32 807 ixgbe_disable_mc(struct ixgbe_hw *hw) 808 { 809 return ixgbe_call_func(hw, hw->mac.ops.disable_mc, (hw), 810 IXGBE_NOT_IMPLEMENTED); 811 } 812 813 /* 814 * ixgbe_clear_vfta - Clear VLAN filter table 815 * @hw: pointer to hardware structure 816 * 817 * Clears the VLAN filer table, and the VMDq index associated with the filter 818 */ 819 s32 820 ixgbe_clear_vfta(struct ixgbe_hw *hw) 821 { 822 return ixgbe_call_func(hw, hw->mac.ops.clear_vfta, (hw), 823 IXGBE_NOT_IMPLEMENTED); 824 } 825 826 /* 827 * ixgbe_set_vfta - Set VLAN filter table 828 * @hw: pointer to hardware structure 829 * @vlan: VLAN id to write to VLAN filter 830 * @vind: VMDq output index that maps queue to VLAN id in VFTA 831 * @vlan_on: boolean flag to turn on/off VLAN in VFTA 832 * 833 * Turn on/off specified VLAN in the VLAN filter table. 834 */ 835 s32 836 ixgbe_set_vfta(struct ixgbe_hw *hw, u32 vlan, u32 vind, bool vlan_on) 837 { 838 return ixgbe_call_func(hw, hw->mac.ops.set_vfta, (hw, vlan, vind, 839 vlan_on), IXGBE_NOT_IMPLEMENTED); 840 } 841 842 /* 843 * ixgbe_fc_enable - Enable flow control 844 * @hw: pointer to hardware structure 845 * @packetbuf_num: packet buffer number (0-7) 846 * 847 * Configures the flow control settings based on SW configuration. 848 */ 849 s32 850 ixgbe_fc_enable(struct ixgbe_hw *hw, s32 packetbuf_num) 851 { 852 return ixgbe_call_func(hw, hw->mac.ops.fc_enable, (hw, packetbuf_num), 853 IXGBE_NOT_IMPLEMENTED); 854 } 855 856 /* 857 * ixgbe_read_analog_reg8 - Reads 8 bit analog register 858 * @hw: pointer to hardware structure 859 * @reg: analog register to read 860 * @val: read value 861 * 862 * Performs write operation to analog register specified. 863 */ 864 s32 865 ixgbe_read_analog_reg8(struct ixgbe_hw *hw, u32 reg, u8 *val) 866 { 867 return ixgbe_call_func(hw, hw->mac.ops.read_analog_reg8, (hw, reg, 868 val), IXGBE_NOT_IMPLEMENTED); 869 } 870 871 /* 872 * ixgbe_write_analog_reg8 - Writes 8 bit analog register 873 * @hw: pointer to hardware structure 874 * @reg: analog register to write 875 * @val: value to write 876 * 877 * Performs write operation to Atlas analog register specified. 878 */ 879 s32 880 ixgbe_write_analog_reg8(struct ixgbe_hw *hw, u32 reg, u8 val) 881 { 882 return ixgbe_call_func(hw, hw->mac.ops.write_analog_reg8, (hw, reg, 883 val), IXGBE_NOT_IMPLEMENTED); 884 } 885 886 /* 887 * ixgbe_init_uta_tables - Initializes Unicast Table Arrays. 888 * @hw: pointer to hardware structure 889 * 890 * Initializes the Unicast Table Arrays to zero on device load. This 891 * is part of the Rx init addr execution path. 892 */ 893 s32 894 ixgbe_init_uta_tables(struct ixgbe_hw *hw) 895 { 896 return ixgbe_call_func(hw, hw->mac.ops.init_uta_tables, (hw), 897 IXGBE_NOT_IMPLEMENTED); 898 } 899 900 /* 901 * ixgbe_read_i2c_byte - Reads 8 bit word over I2C at specified device address 902 * @hw: pointer to hardware structure 903 * @byte_offset: byte offset to read 904 * @data: value read 905 * 906 * Performs byte read operation to SFP module's EEPROM over I2C interface. 907 */ 908 s32 909 ixgbe_read_i2c_byte(struct ixgbe_hw *hw, u8 byte_offset, u8 dev_addr, 910 u8 *data) 911 { 912 return ixgbe_call_func(hw, hw->phy.ops.read_i2c_byte, (hw, byte_offset, 913 dev_addr, data), IXGBE_NOT_IMPLEMENTED); 914 } 915 916 /* 917 * ixgbe_write_i2c_byte - Writes 8 bit word over I2C 918 * @hw: pointer to hardware structure 919 * @byte_offset: byte offset to write 920 * @data: value to write 921 * 922 * Performs byte write operation to SFP module's EEPROM over I2C interface 923 * at a specified device address. 924 */ 925 s32 926 ixgbe_write_i2c_byte(struct ixgbe_hw *hw, u8 byte_offset, u8 dev_addr, 927 u8 data) 928 { 929 return ixgbe_call_func(hw, hw->phy.ops.write_i2c_byte, 930 (hw, byte_offset, dev_addr, data), IXGBE_NOT_IMPLEMENTED); 931 } 932 933 /* 934 * ixgbe_write_i2c_eeprom - Writes 8 bit EEPROM word over I2C interface 935 * @hw: pointer to hardware structure 936 * @byte_offset: EEPROM byte offset to write 937 * @eeprom_data: value to write 938 * 939 * Performs byte write operation to SFP module's EEPROM over I2C interface. 940 */ 941 s32 942 ixgbe_write_i2c_eeprom(struct ixgbe_hw *hw, u8 byte_offset, u8 eeprom_data) 943 { 944 return ixgbe_call_func(hw, hw->phy.ops.write_i2c_eeprom, 945 (hw, byte_offset, eeprom_data), IXGBE_NOT_IMPLEMENTED); 946 } 947 948 /* 949 * ixgbe_read_i2c_eeprom - Reads 8 bit EEPROM word over I2C interface 950 * @hw: pointer to hardware structure 951 * @byte_offset: EEPROM byte offset to read 952 * @eeprom_data: value read 953 * 954 * Performs byte read operation to SFP module's EEPROM over I2C interface. 955 */ 956 s32 957 ixgbe_read_i2c_eeprom(struct ixgbe_hw *hw, u8 byte_offset, u8 *eeprom_data) 958 { 959 return ixgbe_call_func(hw, hw->phy.ops.read_i2c_eeprom, 960 (hw, byte_offset, eeprom_data), IXGBE_NOT_IMPLEMENTED); 961 } 962 963 /* 964 * ixgbe_get_supported_physical_layer - Returns physical layer type 965 * @hw: pointer to hardware structure 966 * 967 * Determines physical layer capabilities of the current configuration. 968 */ 969 u32 970 ixgbe_get_supported_physical_layer(struct ixgbe_hw *hw) 971 { 972 return ixgbe_call_func(hw, hw->mac.ops.get_supported_physical_layer, 973 (hw), IXGBE_NOT_IMPLEMENTED); 974 } 975 976 /* 977 * ixgbe_enable_rx_dma - Enables Rx DMA unit, dependant on device specifics 978 * @hw: pointer to hardware structure 979 * @regval: bitfield to write to the Rx DMA register 980 * 981 * Enables the Rx DMA unit of the device. 982 */ 983 s32 984 ixgbe_enable_rx_dma(struct ixgbe_hw *hw, u32 regval) 985 { 986 return ixgbe_call_func(hw, hw->mac.ops.enable_rx_dma, 987 (hw, regval), IXGBE_NOT_IMPLEMENTED); 988 } 989