1 /* 2 * CDDL HEADER START 3 * 4 * Copyright(c) 2007-2009 Intel Corporation. All rights reserved. 5 * The contents of this file are subject to the terms of the 6 * Common Development and Distribution License (the "License"). 7 * You may not use this file except in compliance with the License. 8 * 9 * You can obtain a copy of the license at: 10 * http://www.opensolaris.org/os/licensing. 11 * See the License for the specific language governing permissions 12 * and limitations under the License. 13 * 14 * When using or redistributing this file, you may do so under the 15 * License only. No other modification of this header is permitted. 16 * 17 * If applicable, add the following below this CDDL HEADER, with the 18 * fields enclosed by brackets "[]" replaced with your own identifying 19 * information: Portions Copyright [yyyy] [name of copyright owner] 20 * 21 * CDDL HEADER END 22 */ 23 24 /* 25 * Copyright 2009 Sun Microsystems, Inc. All rights reserved. 26 * Use is subject to license terms. 27 */ 28 29 /* IntelVersion: 1.131 scm_100309_002210 */ 30 31 #include "ixgbe_api.h" 32 #include "ixgbe_common.h" 33 34 extern s32 ixgbe_init_ops_82598(struct ixgbe_hw *hw); 35 extern s32 ixgbe_init_ops_82599(struct ixgbe_hw *hw); 36 37 /* 38 * ixgbe_init_shared_code - Initialize the shared code 39 * @hw: pointer to hardware structure 40 * 41 * This will assign function pointers and assign the MAC type and PHY code. 42 * Does not touch the hardware. This function must be called prior to any 43 * other function in the shared code. The ixgbe_hw structure should be 44 * memset to 0 prior to calling this function. The following fields in 45 * hw structure should be filled in prior to calling this function: 46 * hw_addr, back, device_id, vendor_id, subsystem_device_id, 47 * subsystem_vendor_id, and revision_id 48 */ 49 s32 50 ixgbe_init_shared_code(struct ixgbe_hw *hw) 51 { 52 s32 status; 53 54 DEBUGFUNC("ixgbe_init_shared_code"); 55 56 /* 57 * Set the mac type 58 */ 59 (void) ixgbe_set_mac_type(hw); 60 61 switch (hw->mac.type) { 62 case ixgbe_mac_82598EB: 63 status = ixgbe_init_ops_82598(hw); 64 break; 65 case ixgbe_mac_82599EB: 66 status = ixgbe_init_ops_82599(hw); 67 break; 68 default: 69 status = IXGBE_ERR_DEVICE_NOT_SUPPORTED; 70 break; 71 } 72 73 return (status); 74 } 75 76 /* 77 * ixgbe_set_mac_type - Sets MAC type 78 * @hw: pointer to the HW structure 79 * 80 * This function sets the mac type of the adapter based on the 81 * vendor ID and device ID stored in the hw structure. 82 */ 83 s32 84 ixgbe_set_mac_type(struct ixgbe_hw *hw) 85 { 86 s32 ret_val = IXGBE_SUCCESS; 87 88 DEBUGFUNC("ixgbe_set_mac_type\n"); 89 90 if (hw->vendor_id == IXGBE_INTEL_VENDOR_ID) { 91 switch (hw->device_id) { 92 case IXGBE_DEV_ID_82598: 93 case IXGBE_DEV_ID_82598_BX: 94 case IXGBE_DEV_ID_82598AF_SINGLE_PORT: 95 case IXGBE_DEV_ID_82598AF_DUAL_PORT: 96 case IXGBE_DEV_ID_82598AT: 97 case IXGBE_DEV_ID_82598AT2: 98 case IXGBE_DEV_ID_82598EB_CX4: 99 case IXGBE_DEV_ID_82598_CX4_DUAL_PORT: 100 case IXGBE_DEV_ID_82598_DA_DUAL_PORT: 101 case IXGBE_DEV_ID_82598_SR_DUAL_PORT_EM: 102 case IXGBE_DEV_ID_82598EB_XF_LR: 103 case IXGBE_DEV_ID_82598EB_SFP_LOM: 104 hw->mac.type = ixgbe_mac_82598EB; 105 break; 106 case IXGBE_DEV_ID_82599_KX4: 107 case IXGBE_DEV_ID_82599_KX4_MEZZ: 108 case IXGBE_DEV_ID_82599_XAUI_LOM: 109 case IXGBE_DEV_ID_82599_COMBO_BACKPLANE: 110 case IXGBE_DEV_ID_82599_SFP: 111 case IXGBE_DEV_ID_82599_SFP_EM: 112 case IXGBE_DEV_ID_82599_CX4: 113 hw->mac.type = ixgbe_mac_82599EB; 114 break; 115 default: 116 ret_val = IXGBE_ERR_DEVICE_NOT_SUPPORTED; 117 break; 118 } 119 } else { 120 ret_val = IXGBE_ERR_DEVICE_NOT_SUPPORTED; 121 } 122 123 DEBUGOUT2("ixgbe_set_mac_type found mac: %d, returns: %d\n", 124 hw->mac.type, ret_val); 125 126 return (ret_val); 127 } 128 129 /* 130 * ixgbe_init_hw - Initialize the hardware 131 * @hw: pointer to hardware structure 132 * 133 * Initialize the hardware by resetting and then starting the hardware 134 */ 135 s32 136 ixgbe_init_hw(struct ixgbe_hw *hw) 137 { 138 return ixgbe_call_func(hw, hw->mac.ops.init_hw, (hw), 139 IXGBE_NOT_IMPLEMENTED); 140 } 141 142 /* 143 * ixgbe_reset_hw - Performs a hardware reset 144 * @hw: pointer to hardware structure 145 * 146 * Resets the hardware by resetting the transmit and receive units, masks and 147 * clears all interrupts, performs a PHY reset, and performs a MAC reset 148 */ 149 s32 150 ixgbe_reset_hw(struct ixgbe_hw *hw) 151 { 152 return ixgbe_call_func(hw, hw->mac.ops.reset_hw, (hw), 153 IXGBE_NOT_IMPLEMENTED); 154 } 155 156 /* 157 * ixgbe_start_hw - Prepares hardware for Rx/Tx 158 * @hw: pointer to hardware structure 159 * 160 * Starts the hardware by filling the bus info structure and media type, 161 * clears all on chip counters, initializes receive address registers, 162 * multicast table, VLAN filter table, calls routine to setup link and 163 * flow control settings, and leaves transmit and receive units disabled 164 * and uninitialized. 165 */ 166 s32 167 ixgbe_start_hw(struct ixgbe_hw *hw) 168 { 169 return ixgbe_call_func(hw, hw->mac.ops.start_hw, (hw), 170 IXGBE_NOT_IMPLEMENTED); 171 } 172 173 /* 174 * ixgbe_clear_hw_cntrs - Clear hardware counters 175 * @hw: pointer to hardware structure 176 * 177 * Clears all hardware statistics counters by reading them from the hardware 178 * Statistics counters are clear on read. 179 */ 180 s32 181 ixgbe_clear_hw_cntrs(struct ixgbe_hw *hw) 182 { 183 return ixgbe_call_func(hw, hw->mac.ops.clear_hw_cntrs, (hw), 184 IXGBE_NOT_IMPLEMENTED); 185 } 186 187 /* 188 * ixgbe_get_media_type - Get media type 189 * @hw: pointer to hardware structure 190 * 191 * Returns the media type (fiber, copper, backplane) 192 */ 193 enum ixgbe_media_type 194 ixgbe_get_media_type(struct ixgbe_hw *hw) 195 { 196 return ixgbe_call_func(hw, hw->mac.ops.get_media_type, (hw), 197 ixgbe_media_type_unknown); 198 } 199 200 /* 201 * ixgbe_get_mac_addr - Get MAC address 202 * @hw: pointer to hardware structure 203 * @mac_addr: Adapter MAC address 204 * 205 * Reads the adapter's MAC address from the first Receive Address Register 206 * (RAR0) A reset of the adapter must have been performed prior to calling 207 * this function in order for the MAC address to have been loaded from the 208 * EEPROM into RAR0 209 */ 210 s32 211 ixgbe_get_mac_addr(struct ixgbe_hw *hw, u8 *mac_addr) 212 { 213 return ixgbe_call_func(hw, hw->mac.ops.get_mac_addr, 214 (hw, mac_addr), IXGBE_NOT_IMPLEMENTED); 215 } 216 217 /* 218 * ixgbe_get_san_mac_addr - Get SAN MAC address 219 * @hw: pointer to hardware structure 220 * @san_mac_addr: SAN MAC address 221 * 222 * Reads the SAN MAC address from the EEPROM, if it's available. This is 223 * per-port, so set_lan_id() must be called before reading the addresses. 224 */ 225 s32 226 ixgbe_get_san_mac_addr(struct ixgbe_hw *hw, u8 *san_mac_addr) 227 { 228 return ixgbe_call_func(hw, hw->mac.ops.get_san_mac_addr, 229 (hw, san_mac_addr), IXGBE_NOT_IMPLEMENTED); 230 } 231 232 /* 233 * ixgbe_set_san_mac_addr - Write a SAN MAC address 234 * @hw: pointer to hardware structure 235 * @san_mac_addr: SAN MAC address 236 * 237 * Writes A SAN MAC address to the EEPROM. 238 */ 239 s32 240 ixgbe_set_san_mac_addr(struct ixgbe_hw *hw, u8 *san_mac_addr) 241 { 242 return ixgbe_call_func(hw, hw->mac.ops.set_san_mac_addr, 243 (hw, san_mac_addr), IXGBE_NOT_IMPLEMENTED); 244 } 245 246 /* 247 * ixgbe_get_device_caps - Get additional device capabilities 248 * @hw: pointer to hardware structure 249 * @device_caps: the EEPROM word for device capabilities 250 * 251 * Reads the extra device capabilities from the EEPROM 252 */ 253 s32 254 ixgbe_get_device_caps(struct ixgbe_hw *hw, u16 *device_caps) 255 { 256 return ixgbe_call_func(hw, hw->mac.ops.get_device_caps, 257 (hw, device_caps), IXGBE_NOT_IMPLEMENTED); 258 } 259 260 /* 261 * ixgbe_get_wwn_prefix - Get alternative WWNN/WWPN prefix from the EEPROM 262 * @hw: pointer to hardware structure 263 * @wwnn_prefix: the alternative WWNN prefix 264 * @wwpn_prefix: the alternative WWPN prefix 265 * 266 * This function will read the EEPROM from the alternative SAN MAC address 267 * block to check the support for the alternative WWNN/WWPN prefix support. 268 */ 269 s32 270 ixgbe_get_wwn_prefix(struct ixgbe_hw *hw, u16 *wwnn_prefix, u16 *wwpn_prefix) 271 { 272 return ixgbe_call_func(hw, hw->mac.ops.get_wwn_prefix, 273 (hw, wwnn_prefix, wwpn_prefix), IXGBE_NOT_IMPLEMENTED); 274 } 275 276 /* 277 * ixgbe_get_bus_info - Set PCI bus info 278 * @hw: pointer to hardware structure 279 * 280 * Sets the PCI bus info (speed, width, type) within the ixgbe_hw structure 281 */ 282 s32 283 ixgbe_get_bus_info(struct ixgbe_hw *hw) 284 { 285 return ixgbe_call_func(hw, hw->mac.ops.get_bus_info, (hw), 286 IXGBE_NOT_IMPLEMENTED); 287 } 288 289 /* 290 * ixgbe_get_num_of_tx_queues - Get Tx queues 291 * @hw: pointer to hardware structure 292 * 293 * Returns the number of transmit queues for the given adapter. 294 */ 295 u32 296 ixgbe_get_num_of_tx_queues(struct ixgbe_hw *hw) 297 { 298 return (hw->mac.max_tx_queues); 299 } 300 301 /* 302 * ixgbe_get_num_of_rx_queues - Get Rx queues 303 * @hw: pointer to hardware structure 304 * 305 * Returns the number of receive queues for the given adapter. 306 */ 307 u32 308 ixgbe_get_num_of_rx_queues(struct ixgbe_hw *hw) 309 { 310 return (hw->mac.max_rx_queues); 311 } 312 313 /* 314 * ixgbe_stop_adapter - Disable Rx/Tx units 315 * @hw: pointer to hardware structure 316 * 317 * Sets the adapter_stopped flag within ixgbe_hw struct. Clears interrupts, 318 * disables transmit and receive units. The adapter_stopped flag is used by 319 * the shared code and drivers to determine if the adapter is in a stopped 320 * state and should not touch the hardware. 321 */ 322 s32 323 ixgbe_stop_adapter(struct ixgbe_hw *hw) 324 { 325 return ixgbe_call_func(hw, hw->mac.ops.stop_adapter, (hw), 326 IXGBE_NOT_IMPLEMENTED); 327 } 328 329 /* 330 * ixgbe_read_pba_num - Reads part number from EEPROM 331 * @hw: pointer to hardware structure 332 * @pba_num: stores the part number from the EEPROM 333 * 334 * Reads the part number from the EEPROM. 335 */ 336 s32 337 ixgbe_read_pba_num(struct ixgbe_hw *hw, u32 *pba_num) 338 { 339 return (ixgbe_read_pba_num_generic(hw, pba_num)); 340 } 341 342 /* 343 * ixgbe_identify_phy - Get PHY type 344 * @hw: pointer to hardware structure 345 * 346 * Determines the physical layer module found on the current adapter. 347 */ 348 s32 349 ixgbe_identify_phy(struct ixgbe_hw *hw) 350 { 351 s32 status = IXGBE_SUCCESS; 352 353 if (hw->phy.type == ixgbe_phy_unknown) { 354 status = ixgbe_call_func(hw, 355 hw->phy.ops.identify, 356 (hw), 357 IXGBE_NOT_IMPLEMENTED); 358 } 359 360 return (status); 361 } 362 363 /* 364 * ixgbe_reset_phy - Perform a PHY reset 365 * @hw: pointer to hardware structure 366 */ 367 s32 368 ixgbe_reset_phy(struct ixgbe_hw *hw) 369 { 370 s32 status = IXGBE_SUCCESS; 371 372 if (hw->phy.type == ixgbe_phy_unknown) { 373 if (ixgbe_identify_phy(hw) != IXGBE_SUCCESS) { 374 status = IXGBE_ERR_PHY; 375 } 376 } 377 378 if (status == IXGBE_SUCCESS) { 379 status = ixgbe_call_func(hw, hw->phy.ops.reset, (hw), 380 IXGBE_NOT_IMPLEMENTED); 381 } 382 return (status); 383 } 384 385 /* 386 * ixgbe_get_phy_firmware_version - 387 * @hw: pointer to hardware structure 388 * @firmware_version: pointer to firmware version 389 */ 390 s32 391 ixgbe_get_phy_firmware_version(struct ixgbe_hw *hw, u16 *firmware_version) 392 { 393 s32 status = IXGBE_SUCCESS; 394 395 status = ixgbe_call_func(hw, hw->phy.ops.get_firmware_version, 396 (hw, firmware_version), IXGBE_NOT_IMPLEMENTED); 397 return (status); 398 } 399 400 /* 401 * ixgbe_read_phy_reg - Read PHY register 402 * @hw: pointer to hardware structure 403 * @reg_addr: 32 bit address of PHY register to read 404 * @phy_data: Pointer to read data from PHY register 405 * 406 * Reads a value from a specified PHY register 407 */ 408 s32 409 ixgbe_read_phy_reg(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type, 410 u16 *phy_data) 411 { 412 if (hw->phy.id == 0) 413 (void) ixgbe_identify_phy(hw); 414 415 return ixgbe_call_func(hw, hw->phy.ops.read_reg, (hw, reg_addr, 416 device_type, phy_data), IXGBE_NOT_IMPLEMENTED); 417 } 418 419 /* 420 * ixgbe_write_phy_reg - Write PHY register 421 * @hw: pointer to hardware structure 422 * @reg_addr: 32 bit PHY register to write 423 * @phy_data: Data to write to the PHY register 424 * 425 * Writes a value to specified PHY register 426 */ 427 s32 ixgbe_write_phy_reg(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type, 428 u16 phy_data) 429 { 430 if (hw->phy.id == 0) 431 (void) ixgbe_identify_phy(hw); 432 433 return ixgbe_call_func(hw, hw->phy.ops.write_reg, (hw, reg_addr, 434 device_type, phy_data), IXGBE_NOT_IMPLEMENTED); 435 } 436 437 /* 438 * ixgbe_setup_phy_link - Restart PHY autoneg 439 * @hw: pointer to hardware structure 440 * 441 * Restart autonegotiation and PHY and waits for completion. 442 */ 443 s32 444 ixgbe_setup_phy_link(struct ixgbe_hw *hw) 445 { 446 return ixgbe_call_func(hw, hw->phy.ops.setup_link, (hw), 447 IXGBE_NOT_IMPLEMENTED); 448 } 449 450 /* 451 * ixgbe_check_phy_link - Determine link and speed status 452 * @hw: pointer to hardware structure 453 * 454 * Reads a PHY register to determine if link is up and the current speed for 455 * the PHY. 456 */ 457 s32 ixgbe_check_phy_link(struct ixgbe_hw *hw, ixgbe_link_speed *speed, 458 bool *link_up) 459 { 460 return ixgbe_call_func(hw, hw->phy.ops.check_link, (hw, speed, 461 link_up), IXGBE_NOT_IMPLEMENTED); 462 } 463 464 /* 465 * ixgbe_setup_phy_link_speed - Set auto advertise 466 * @hw: pointer to hardware structure 467 * @speed: new link speed 468 * @autoneg: true if autonegotiation enabled 469 * 470 * Sets the auto advertised capabilities 471 */ 472 s32 473 ixgbe_setup_phy_link_speed(struct ixgbe_hw *hw, ixgbe_link_speed speed, 474 bool autoneg, 475 bool autoneg_wait_to_complete) 476 { 477 return ixgbe_call_func(hw, hw->phy.ops.setup_link_speed, (hw, speed, 478 autoneg, autoneg_wait_to_complete), 479 IXGBE_NOT_IMPLEMENTED); 480 } 481 482 /* 483 * ixgbe_check_link - Get link and speed status 484 * @hw: pointer to hardware structure 485 * 486 * Reads the links register to determine if link is up and the current speed 487 */ 488 s32 489 ixgbe_check_link(struct ixgbe_hw *hw, ixgbe_link_speed *speed, 490 bool *link_up, bool link_up_wait_to_complete) 491 { 492 return ixgbe_call_func(hw, hw->mac.ops.check_link, (hw, speed, 493 link_up, link_up_wait_to_complete), IXGBE_NOT_IMPLEMENTED); 494 } 495 496 /* 497 * ixgbe_setup_link - Set link speed 498 * @hw: pointer to hardware structure 499 * @speed: new link speed 500 * @autoneg: true if autonegotiation enabled 501 * 502 * Configures link settings. Restarts the link. 503 * Performs autonegotiation if needed. 504 */ 505 s32 ixgbe_setup_link(struct ixgbe_hw *hw, ixgbe_link_speed speed, 506 bool autoneg, 507 bool autoneg_wait_to_complete) 508 { 509 return ixgbe_call_func(hw, hw->mac.ops.setup_link, (hw, speed, 510 autoneg, autoneg_wait_to_complete), 511 IXGBE_NOT_IMPLEMENTED); 512 } 513 514 /* 515 * ixgbe_get_link_capabilities - Returns link capabilities 516 * @hw: pointer to hardware structure 517 * 518 * Determines the link capabilities of the current configuration. 519 */ 520 s32 521 ixgbe_get_link_capabilities(struct ixgbe_hw *hw, ixgbe_link_speed *speed, 522 bool *autoneg) 523 { 524 return ixgbe_call_func(hw, hw->mac.ops.get_link_capabilities, (hw, 525 speed, autoneg), IXGBE_NOT_IMPLEMENTED); 526 } 527 528 /* 529 * ixgbe_led_on - Turn on LEDs 530 * @hw: pointer to hardware structure 531 * @index: led number to turn on 532 * 533 * Turns on the software controllable LEDs. 534 */ 535 s32 536 ixgbe_led_on(struct ixgbe_hw *hw, u32 index) 537 { 538 return ixgbe_call_func(hw, hw->mac.ops.led_on, (hw, index), 539 IXGBE_NOT_IMPLEMENTED); 540 } 541 542 /* 543 * ixgbe_led_off - Turn off LEDs 544 * @hw: pointer to hardware structure 545 * @index: led number to turn off 546 * 547 * Turns off the software controllable LEDs. 548 */ 549 s32 550 ixgbe_led_off(struct ixgbe_hw *hw, u32 index) 551 { 552 return ixgbe_call_func(hw, hw->mac.ops.led_off, (hw, index), 553 IXGBE_NOT_IMPLEMENTED); 554 } 555 556 /* 557 * ixgbe_blink_led_start - Blink LEDs 558 * @hw: pointer to hardware structure 559 * @index: led number to blink 560 * 561 * Blink LED based on index. 562 */ 563 s32 564 ixgbe_blink_led_start(struct ixgbe_hw *hw, u32 index) 565 { 566 return ixgbe_call_func(hw, hw->mac.ops.blink_led_start, (hw, index), 567 IXGBE_NOT_IMPLEMENTED); 568 } 569 570 /* 571 * ixgbe_blink_led_stop - Stop blinking LEDs 572 * @hw: pointer to hardware structure 573 * 574 * Stop blinking LED based on index. 575 */ 576 s32 577 ixgbe_blink_led_stop(struct ixgbe_hw *hw, u32 index) 578 { 579 return ixgbe_call_func(hw, hw->mac.ops.blink_led_stop, (hw, index), 580 IXGBE_NOT_IMPLEMENTED); 581 } 582 583 /* 584 * ixgbe_init_eeprom_params - Initialize EEPROM parameters 585 * @hw: pointer to hardware structure 586 * 587 * Initializes the EEPROM parameters ixgbe_eeprom_info within the 588 * ixgbe_hw struct in order to set up EEPROM access. 589 */ 590 s32 591 ixgbe_init_eeprom_params(struct ixgbe_hw *hw) 592 { 593 return ixgbe_call_func(hw, hw->eeprom.ops.init_params, (hw), 594 IXGBE_NOT_IMPLEMENTED); 595 } 596 597 598 /* 599 * ixgbe_write_eeprom - Write word to EEPROM 600 * @hw: pointer to hardware structure 601 * @offset: offset within the EEPROM to be written to 602 * @data: 16 bit word to be written to the EEPROM 603 * 604 * Writes 16 bit value to EEPROM. If ixgbe_eeprom_update_checksum is not 605 * called after this function, the EEPROM will most likely contain an 606 * invalid checksum. 607 */ 608 s32 609 ixgbe_write_eeprom(struct ixgbe_hw *hw, u16 offset, u16 data) 610 { 611 return ixgbe_call_func(hw, hw->eeprom.ops.write, (hw, offset, data), 612 IXGBE_NOT_IMPLEMENTED); 613 } 614 615 /* 616 * ixgbe_read_eeprom - Read word from EEPROM 617 * @hw: pointer to hardware structure 618 * @offset: offset within the EEPROM to be read 619 * @data: read 16 bit value from EEPROM 620 * 621 * Reads 16 bit value from EEPROM 622 */ 623 s32 624 ixgbe_read_eeprom(struct ixgbe_hw *hw, u16 offset, u16 *data) 625 { 626 return ixgbe_call_func(hw, hw->eeprom.ops.read, (hw, offset, data), 627 IXGBE_NOT_IMPLEMENTED); 628 } 629 630 /* 631 * ixgbe_validate_eeprom_checksum - Validate EEPROM checksum 632 * @hw: pointer to hardware structure 633 * @checksum_val: calculated checksum 634 * 635 * Performs checksum calculation and validates the EEPROM checksum 636 */ 637 s32 638 ixgbe_validate_eeprom_checksum(struct ixgbe_hw *hw, u16 *checksum_val) 639 { 640 return ixgbe_call_func(hw, hw->eeprom.ops.validate_checksum, 641 (hw, checksum_val), IXGBE_NOT_IMPLEMENTED); 642 } 643 644 /* 645 * ixgbe_eeprom_update_checksum - Updates the EEPROM checksum 646 * @hw: pointer to hardware structure 647 */ 648 s32 649 ixgbe_update_eeprom_checksum(struct ixgbe_hw *hw) 650 { 651 return ixgbe_call_func(hw, hw->eeprom.ops.update_checksum, (hw), 652 IXGBE_NOT_IMPLEMENTED); 653 } 654 655 /* 656 * ixgbe_insert_mac_addr - Find a RAR for this mac address 657 * @hw: pointer to hardware structure 658 * @addr: Address to put into receive address register 659 * @vmdq: VMDq pool to assign 660 * 661 * Puts an ethernet address into a receive address register, or 662 * finds the rar that it is aleady in; adds to the pool list 663 */ 664 s32 665 ixgbe_insert_mac_addr(struct ixgbe_hw *hw, u8 *addr, u32 vmdq) 666 { 667 return ixgbe_call_func(hw, hw->mac.ops.insert_mac_addr, 668 (hw, addr, vmdq), IXGBE_NOT_IMPLEMENTED); 669 } 670 671 /* 672 * ixgbe_set_rar - Set Rx address register 673 * @hw: pointer to hardware structure 674 * @index: Receive address register to write 675 * @addr: Address to put into receive address register 676 * @vmdq: VMDq "set" 677 * @enable_addr: set flag that address is active 678 * 679 * Puts an ethernet address into a receive address register. 680 */ 681 s32 682 ixgbe_set_rar(struct ixgbe_hw *hw, u32 index, u8 *addr, u32 vmdq, 683 u32 enable_addr) 684 { 685 return ixgbe_call_func(hw, hw->mac.ops.set_rar, (hw, index, addr, vmdq, 686 enable_addr), IXGBE_NOT_IMPLEMENTED); 687 } 688 689 /* 690 * ixgbe_clear_rar - Clear Rx address register 691 * @hw: pointer to hardware structure 692 * @index: Receive address register to write 693 * 694 * Puts an ethernet address into a receive address register. 695 */ 696 s32 697 ixgbe_clear_rar(struct ixgbe_hw *hw, u32 index) 698 { 699 return ixgbe_call_func(hw, hw->mac.ops.clear_rar, (hw, index), 700 IXGBE_NOT_IMPLEMENTED); 701 } 702 703 /* 704 * ixgbe_set_vmdq - Associate a VMDq index with a receive address 705 * @hw: pointer to hardware structure 706 * @rar: receive address register index to associate with VMDq index 707 * @vmdq: VMDq set or pool index 708 */ 709 s32 710 ixgbe_set_vmdq(struct ixgbe_hw *hw, u32 rar, u32 vmdq) 711 { 712 return ixgbe_call_func(hw, hw->mac.ops.set_vmdq, (hw, rar, vmdq), 713 IXGBE_NOT_IMPLEMENTED); 714 } 715 716 /* 717 * ixgbe_clear_vmdq - Disassociate a VMDq index from a receive address 718 * @hw: pointer to hardware structure 719 * @rar: receive address register index to disassociate with VMDq index 720 * @vmdq: VMDq set or pool index 721 */ 722 s32 723 ixgbe_clear_vmdq(struct ixgbe_hw *hw, u32 rar, u32 vmdq) 724 { 725 return ixgbe_call_func(hw, hw->mac.ops.clear_vmdq, (hw, rar, vmdq), 726 IXGBE_NOT_IMPLEMENTED); 727 } 728 729 /* 730 * ixgbe_init_rx_addrs - Initializes receive address filters. 731 * @hw: pointer to hardware structure 732 * 733 * Places the MAC address in receive address register 0 and clears the rest 734 * of the receive address registers. Clears the multicast table. Assumes 735 * the receiver is in reset when the routine is called. 736 */ 737 s32 738 ixgbe_init_rx_addrs(struct ixgbe_hw *hw) 739 { 740 return ixgbe_call_func(hw, hw->mac.ops.init_rx_addrs, (hw), 741 IXGBE_NOT_IMPLEMENTED); 742 } 743 744 /* 745 * ixgbe_get_num_rx_addrs - Returns the number of RAR entries. 746 * @hw: pointer to hardware structure 747 */ 748 u32 749 ixgbe_get_num_rx_addrs(struct ixgbe_hw *hw) 750 { 751 return (hw->mac.num_rar_entries); 752 } 753 754 /* 755 * ixgbe_update_uc_addr_list - Updates the MAC's list of secondary addresses 756 * @hw: pointer to hardware structure 757 * @addr_list: the list of new multicast addresses 758 * @addr_count: number of addresses 759 * @func: iterator function to walk the multicast address list 760 * 761 * The given list replaces any existing list. Clears the secondary addrs from 762 * receive address registers. Uses unused receive address registers for the 763 * first secondary addresses, and falls back to promiscuous mode as needed. 764 */ 765 s32 766 ixgbe_update_uc_addr_list(struct ixgbe_hw *hw, u8 *addr_list, 767 u32 addr_count, ixgbe_mc_addr_itr func) 768 { 769 return ixgbe_call_func(hw, hw->mac.ops.update_uc_addr_list, (hw, 770 addr_list, addr_count, func), 771 IXGBE_NOT_IMPLEMENTED); 772 } 773 774 /* 775 * ixgbe_update_mc_addr_list - Updates the MAC's list of multicast addresses 776 * @hw: pointer to hardware structure 777 * @mc_addr_list: the list of new multicast addresses 778 * @mc_addr_count: number of addresses 779 * @func: iterator function to walk the multicast address list 780 * 781 * The given list replaces any existing list. Clears the MC addrs from receive 782 * address registers and the multicast table. Uses unused receive address 783 * registers for the first multicast addresses, and hashes the rest into the 784 * multicast table. 785 */ 786 s32 787 ixgbe_update_mc_addr_list(struct ixgbe_hw *hw, u8 *mc_addr_list, 788 u32 mc_addr_count, ixgbe_mc_addr_itr func) 789 { 790 return ixgbe_call_func(hw, hw->mac.ops.update_mc_addr_list, (hw, 791 mc_addr_list, mc_addr_count, func), 792 IXGBE_NOT_IMPLEMENTED); 793 } 794 795 /* 796 * ixgbe_enable_mc - Enable multicast address in RAR 797 * @hw: pointer to hardware structure 798 * 799 * Enables multicast address in RAR and the use of the multicast hash table. 800 */ 801 s32 802 ixgbe_enable_mc(struct ixgbe_hw *hw) 803 { 804 return ixgbe_call_func(hw, hw->mac.ops.enable_mc, (hw), 805 IXGBE_NOT_IMPLEMENTED); 806 } 807 808 /* 809 * ixgbe_disable_mc - Disable multicast address in RAR 810 * @hw: pointer to hardware structure 811 * 812 * Disables multicast address in RAR and the use of the multicast hash table. 813 */ 814 s32 815 ixgbe_disable_mc(struct ixgbe_hw *hw) 816 { 817 return ixgbe_call_func(hw, hw->mac.ops.disable_mc, (hw), 818 IXGBE_NOT_IMPLEMENTED); 819 } 820 821 /* 822 * ixgbe_clear_vfta - Clear VLAN filter table 823 * @hw: pointer to hardware structure 824 * 825 * Clears the VLAN filer table, and the VMDq index associated with the filter 826 */ 827 s32 828 ixgbe_clear_vfta(struct ixgbe_hw *hw) 829 { 830 return ixgbe_call_func(hw, hw->mac.ops.clear_vfta, (hw), 831 IXGBE_NOT_IMPLEMENTED); 832 } 833 834 /* 835 * ixgbe_set_vfta - Set VLAN filter table 836 * @hw: pointer to hardware structure 837 * @vlan: VLAN id to write to VLAN filter 838 * @vind: VMDq output index that maps queue to VLAN id in VFTA 839 * @vlan_on: boolean flag to turn on/off VLAN in VFTA 840 * 841 * Turn on/off specified VLAN in the VLAN filter table. 842 */ 843 s32 844 ixgbe_set_vfta(struct ixgbe_hw *hw, u32 vlan, u32 vind, bool vlan_on) 845 { 846 return ixgbe_call_func(hw, hw->mac.ops.set_vfta, (hw, vlan, vind, 847 vlan_on), IXGBE_NOT_IMPLEMENTED); 848 } 849 850 /* 851 * ixgbe_fc_enable - Enable flow control 852 * @hw: pointer to hardware structure 853 * @packetbuf_num: packet buffer number (0-7) 854 * 855 * Configures the flow control settings based on SW configuration. 856 */ 857 s32 858 ixgbe_fc_enable(struct ixgbe_hw *hw, s32 packetbuf_num) 859 { 860 return ixgbe_call_func(hw, hw->mac.ops.fc_enable, (hw, packetbuf_num), 861 IXGBE_NOT_IMPLEMENTED); 862 } 863 864 /* 865 * ixgbe_read_analog_reg8 - Reads 8 bit analog register 866 * @hw: pointer to hardware structure 867 * @reg: analog register to read 868 * @val: read value 869 * 870 * Performs write operation to analog register specified. 871 */ 872 s32 873 ixgbe_read_analog_reg8(struct ixgbe_hw *hw, u32 reg, u8 *val) 874 { 875 return ixgbe_call_func(hw, hw->mac.ops.read_analog_reg8, (hw, reg, 876 val), IXGBE_NOT_IMPLEMENTED); 877 } 878 879 /* 880 * ixgbe_write_analog_reg8 - Writes 8 bit analog register 881 * @hw: pointer to hardware structure 882 * @reg: analog register to write 883 * @val: value to write 884 * 885 * Performs write operation to Atlas analog register specified. 886 */ 887 s32 888 ixgbe_write_analog_reg8(struct ixgbe_hw *hw, u32 reg, u8 val) 889 { 890 return ixgbe_call_func(hw, hw->mac.ops.write_analog_reg8, (hw, reg, 891 val), IXGBE_NOT_IMPLEMENTED); 892 } 893 894 /* 895 * ixgbe_init_uta_tables - Initializes Unicast Table Arrays. 896 * @hw: pointer to hardware structure 897 * 898 * Initializes the Unicast Table Arrays to zero on device load. This 899 * is part of the Rx init addr execution path. 900 */ 901 s32 902 ixgbe_init_uta_tables(struct ixgbe_hw *hw) 903 { 904 return ixgbe_call_func(hw, hw->mac.ops.init_uta_tables, (hw), 905 IXGBE_NOT_IMPLEMENTED); 906 } 907 908 /* 909 * ixgbe_read_i2c_byte - Reads 8 bit word over I2C at specified device address 910 * @hw: pointer to hardware structure 911 * @byte_offset: byte offset to read 912 * @data: value read 913 * 914 * Performs byte read operation to SFP module's EEPROM over I2C interface. 915 */ 916 s32 917 ixgbe_read_i2c_byte(struct ixgbe_hw *hw, u8 byte_offset, u8 dev_addr, 918 u8 *data) 919 { 920 return ixgbe_call_func(hw, hw->phy.ops.read_i2c_byte, (hw, byte_offset, 921 dev_addr, data), IXGBE_NOT_IMPLEMENTED); 922 } 923 924 /* 925 * ixgbe_write_i2c_byte - Writes 8 bit word over I2C 926 * @hw: pointer to hardware structure 927 * @byte_offset: byte offset to write 928 * @data: value to write 929 * 930 * Performs byte write operation to SFP module's EEPROM over I2C interface 931 * at a specified device address. 932 */ 933 s32 934 ixgbe_write_i2c_byte(struct ixgbe_hw *hw, u8 byte_offset, u8 dev_addr, 935 u8 data) 936 { 937 return ixgbe_call_func(hw, hw->phy.ops.write_i2c_byte, 938 (hw, byte_offset, dev_addr, data), IXGBE_NOT_IMPLEMENTED); 939 } 940 941 /* 942 * ixgbe_write_i2c_eeprom - Writes 8 bit EEPROM word over I2C interface 943 * @hw: pointer to hardware structure 944 * @byte_offset: EEPROM byte offset to write 945 * @eeprom_data: value to write 946 * 947 * Performs byte write operation to SFP module's EEPROM over I2C interface. 948 */ 949 s32 950 ixgbe_write_i2c_eeprom(struct ixgbe_hw *hw, u8 byte_offset, u8 eeprom_data) 951 { 952 return ixgbe_call_func(hw, hw->phy.ops.write_i2c_eeprom, 953 (hw, byte_offset, eeprom_data), IXGBE_NOT_IMPLEMENTED); 954 } 955 956 /* 957 * ixgbe_read_i2c_eeprom - Reads 8 bit EEPROM word over I2C interface 958 * @hw: pointer to hardware structure 959 * @byte_offset: EEPROM byte offset to read 960 * @eeprom_data: value read 961 * 962 * Performs byte read operation to SFP module's EEPROM over I2C interface. 963 */ 964 s32 965 ixgbe_read_i2c_eeprom(struct ixgbe_hw *hw, u8 byte_offset, u8 *eeprom_data) 966 { 967 return ixgbe_call_func(hw, hw->phy.ops.read_i2c_eeprom, 968 (hw, byte_offset, eeprom_data), IXGBE_NOT_IMPLEMENTED); 969 } 970 971 /* 972 * ixgbe_get_supported_physical_layer - Returns physical layer type 973 * @hw: pointer to hardware structure 974 * 975 * Determines physical layer capabilities of the current configuration. 976 */ 977 u32 978 ixgbe_get_supported_physical_layer(struct ixgbe_hw *hw) 979 { 980 return ixgbe_call_func(hw, hw->mac.ops.get_supported_physical_layer, 981 (hw), IXGBE_NOT_IMPLEMENTED); 982 } 983 984 /* 985 * ixgbe_enable_rx_dma - Enables Rx DMA unit, dependant on device specifics 986 * @hw: pointer to hardware structure 987 * @regval: bitfield to write to the Rx DMA register 988 * 989 * Enables the Rx DMA unit of the device. 990 */ 991 s32 992 ixgbe_enable_rx_dma(struct ixgbe_hw *hw, u32 regval) 993 { 994 return ixgbe_call_func(hw, hw->mac.ops.enable_rx_dma, 995 (hw, regval), IXGBE_NOT_IMPLEMENTED); 996 } 997 998 /* 999 * ixgbe_acquire_swfw_semaphore - Acquire SWFW semaphore 1000 * @hw: pointer to hardware structure 1001 * @mask: Mask to specify which semaphore to acquire 1002 * 1003 * Acquires the SWFW semaphore through SW_FW_SYNC register for the specified 1004 * function (CSR, PHY0, PHY1, EEPROM, Flash) 1005 */ 1006 s32 1007 ixgbe_acquire_swfw_semaphore(struct ixgbe_hw *hw, u16 mask) 1008 { 1009 return ixgbe_call_func(hw, hw->mac.ops.acquire_swfw_sync, 1010 (hw, mask), IXGBE_NOT_IMPLEMENTED); 1011 } 1012 1013 /* 1014 * ixgbe_release_swfw_semaphore - Release SWFW semaphore 1015 * @hw: pointer to hardware structure 1016 * @mask: Mask to specify which semaphore to release 1017 * 1018 * Releases the SWFW semaphore through SW_FW_SYNC register for the specified 1019 * function (CSR, PHY0, PHY1, EEPROM, Flash) 1020 */ 1021 void 1022 ixgbe_release_swfw_semaphore(struct ixgbe_hw *hw, u16 mask) 1023 { 1024 if (hw->mac.ops.release_swfw_sync) 1025 hw->mac.ops.release_swfw_sync(hw, mask); 1026 } 1027