1 /****************************************************************************** 2 3 Copyright (c) 2001-2012, Intel Corporation 4 All rights reserved. 5 6 Redistribution and use in source and binary forms, with or without 7 modification, are permitted provided that the following conditions are met: 8 9 1. Redistributions of source code must retain the above copyright notice, 10 this list of conditions and the following disclaimer. 11 12 2. Redistributions in binary form must reproduce the above copyright 13 notice, this list of conditions and the following disclaimer in the 14 documentation and/or other materials provided with the distribution. 15 16 3. Neither the name of the Intel Corporation nor the names of its 17 contributors may be used to endorse or promote products derived from 18 this software without specific prior written permission. 19 20 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 21 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 23 ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 24 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30 POSSIBILITY OF SUCH DAMAGE. 31 32 ******************************************************************************/ 33 /*$FreeBSD: src/sys/dev/ixgbe/ixgbe_api.c,v 1.13 2012/07/05 20:51:44 jfv Exp $*/ 34 35 #include "ixgbe_api.h" 36 #include "ixgbe_common.h" 37 38 /** 39 * ixgbe_init_shared_code - Initialize the shared code 40 * @hw: pointer to hardware structure 41 * 42 * This will assign function pointers and assign the MAC type and PHY code. 43 * Does not touch the hardware. This function must be called prior to any 44 * other function in the shared code. The ixgbe_hw structure should be 45 * memset to 0 prior to calling this function. The following fields in 46 * hw structure should be filled in prior to calling this function: 47 * hw_addr, back, device_id, vendor_id, subsystem_device_id, 48 * subsystem_vendor_id, and revision_id 49 **/ 50 s32 ixgbe_init_shared_code(struct ixgbe_hw *hw) 51 { 52 s32 status; 53 54 DEBUGFUNC("ixgbe_init_shared_code"); 55 56 /* 57 * Set the mac type 58 */ 59 ixgbe_set_mac_type(hw); 60 61 switch (hw->mac.type) { 62 case ixgbe_mac_82598EB: 63 status = ixgbe_init_ops_82598(hw); 64 break; 65 case ixgbe_mac_82599EB: 66 status = ixgbe_init_ops_82599(hw); 67 break; 68 case ixgbe_mac_X540: 69 status = ixgbe_init_ops_X540(hw); 70 break; 71 default: 72 status = IXGBE_ERR_DEVICE_NOT_SUPPORTED; 73 break; 74 } 75 76 return status; 77 } 78 79 /** 80 * ixgbe_set_mac_type - Sets MAC type 81 * @hw: pointer to the HW structure 82 * 83 * This function sets the mac type of the adapter based on the 84 * vendor ID and device ID stored in the hw structure. 85 **/ 86 s32 ixgbe_set_mac_type(struct ixgbe_hw *hw) 87 { 88 s32 ret_val = IXGBE_SUCCESS; 89 90 DEBUGFUNC("ixgbe_set_mac_type\n"); 91 92 if (hw->vendor_id == IXGBE_INTEL_VENDOR_ID) { 93 switch (hw->device_id) { 94 case IXGBE_DEV_ID_82598: 95 case IXGBE_DEV_ID_82598_BX: 96 case IXGBE_DEV_ID_82598AF_SINGLE_PORT: 97 case IXGBE_DEV_ID_82598AF_DUAL_PORT: 98 case IXGBE_DEV_ID_82598AT: 99 case IXGBE_DEV_ID_82598AT2: 100 case IXGBE_DEV_ID_82598EB_CX4: 101 case IXGBE_DEV_ID_82598_CX4_DUAL_PORT: 102 case IXGBE_DEV_ID_82598_DA_DUAL_PORT: 103 case IXGBE_DEV_ID_82598_SR_DUAL_PORT_EM: 104 case IXGBE_DEV_ID_82598EB_XF_LR: 105 case IXGBE_DEV_ID_82598EB_SFP_LOM: 106 hw->mac.type = ixgbe_mac_82598EB; 107 break; 108 case IXGBE_DEV_ID_82599_KX4: 109 case IXGBE_DEV_ID_82599_KX4_MEZZ: 110 case IXGBE_DEV_ID_82599_XAUI_LOM: 111 case IXGBE_DEV_ID_82599_COMBO_BACKPLANE: 112 case IXGBE_DEV_ID_82599_KR: 113 case IXGBE_DEV_ID_82599_SFP: 114 case IXGBE_DEV_ID_82599_BACKPLANE_FCOE: 115 case IXGBE_DEV_ID_82599_SFP_FCOE: 116 case IXGBE_DEV_ID_82599_SFP_EM: 117 case IXGBE_DEV_ID_82599_SFP_SF2: 118 case IXGBE_DEV_ID_82599EN_SFP: 119 case IXGBE_DEV_ID_82599_CX4: 120 case IXGBE_DEV_ID_82599_T3_LOM: 121 hw->mac.type = ixgbe_mac_82599EB; 122 break; 123 case IXGBE_DEV_ID_82599_VF: 124 hw->mac.type = ixgbe_mac_82599_vf; 125 break; 126 case IXGBE_DEV_ID_X540_VF: 127 hw->mac.type = ixgbe_mac_X540_vf; 128 break; 129 case IXGBE_DEV_ID_X540T: 130 case IXGBE_DEV_ID_X540T1: 131 hw->mac.type = ixgbe_mac_X540; 132 break; 133 default: 134 ret_val = IXGBE_ERR_DEVICE_NOT_SUPPORTED; 135 break; 136 } 137 } else { 138 ret_val = IXGBE_ERR_DEVICE_NOT_SUPPORTED; 139 } 140 141 DEBUGOUT2("ixgbe_set_mac_type found mac: %d, returns: %d\n", 142 hw->mac.type, ret_val); 143 return ret_val; 144 } 145 146 /** 147 * ixgbe_init_hw - Initialize the hardware 148 * @hw: pointer to hardware structure 149 * 150 * Initialize the hardware by resetting and then starting the hardware 151 **/ 152 s32 ixgbe_init_hw(struct ixgbe_hw *hw) 153 { 154 return ixgbe_call_func(hw, hw->mac.ops.init_hw, (hw), 155 IXGBE_NOT_IMPLEMENTED); 156 } 157 158 /** 159 * ixgbe_reset_hw - Performs a hardware reset 160 * @hw: pointer to hardware structure 161 * 162 * Resets the hardware by resetting the transmit and receive units, masks and 163 * clears all interrupts, performs a PHY reset, and performs a MAC reset 164 **/ 165 s32 ixgbe_reset_hw(struct ixgbe_hw *hw) 166 { 167 return ixgbe_call_func(hw, hw->mac.ops.reset_hw, (hw), 168 IXGBE_NOT_IMPLEMENTED); 169 } 170 171 /** 172 * ixgbe_start_hw - Prepares hardware for Rx/Tx 173 * @hw: pointer to hardware structure 174 * 175 * Starts the hardware by filling the bus info structure and media type, 176 * clears all on chip counters, initializes receive address registers, 177 * multicast table, VLAN filter table, calls routine to setup link and 178 * flow control settings, and leaves transmit and receive units disabled 179 * and uninitialized. 180 **/ 181 s32 ixgbe_start_hw(struct ixgbe_hw *hw) 182 { 183 return ixgbe_call_func(hw, hw->mac.ops.start_hw, (hw), 184 IXGBE_NOT_IMPLEMENTED); 185 } 186 187 /** 188 * ixgbe_enable_relaxed_ordering - Enables tx relaxed ordering, 189 * which is disabled by default in ixgbe_start_hw(); 190 * 191 * @hw: pointer to hardware structure 192 * 193 * Enable relaxed ordering; 194 **/ 195 void ixgbe_enable_relaxed_ordering(struct ixgbe_hw *hw) 196 { 197 if (hw->mac.ops.enable_relaxed_ordering) 198 hw->mac.ops.enable_relaxed_ordering(hw); 199 } 200 201 /** 202 * ixgbe_clear_hw_cntrs - Clear hardware counters 203 * @hw: pointer to hardware structure 204 * 205 * Clears all hardware statistics counters by reading them from the hardware 206 * Statistics counters are clear on read. 207 **/ 208 s32 ixgbe_clear_hw_cntrs(struct ixgbe_hw *hw) 209 { 210 return ixgbe_call_func(hw, hw->mac.ops.clear_hw_cntrs, (hw), 211 IXGBE_NOT_IMPLEMENTED); 212 } 213 214 /** 215 * ixgbe_get_media_type - Get media type 216 * @hw: pointer to hardware structure 217 * 218 * Returns the media type (fiber, copper, backplane) 219 **/ 220 enum ixgbe_media_type ixgbe_get_media_type(struct ixgbe_hw *hw) 221 { 222 return ixgbe_call_func(hw, hw->mac.ops.get_media_type, (hw), 223 ixgbe_media_type_unknown); 224 } 225 226 /** 227 * ixgbe_get_mac_addr - Get MAC address 228 * @hw: pointer to hardware structure 229 * @mac_addr: Adapter MAC address 230 * 231 * Reads the adapter's MAC address from the first Receive Address Register 232 * (RAR0) A reset of the adapter must have been performed prior to calling 233 * this function in order for the MAC address to have been loaded from the 234 * EEPROM into RAR0 235 **/ 236 s32 ixgbe_get_mac_addr(struct ixgbe_hw *hw, u8 *mac_addr) 237 { 238 return ixgbe_call_func(hw, hw->mac.ops.get_mac_addr, 239 (hw, mac_addr), IXGBE_NOT_IMPLEMENTED); 240 } 241 242 /** 243 * ixgbe_get_san_mac_addr - Get SAN MAC address 244 * @hw: pointer to hardware structure 245 * @san_mac_addr: SAN MAC address 246 * 247 * Reads the SAN MAC address from the EEPROM, if it's available. This is 248 * per-port, so set_lan_id() must be called before reading the addresses. 249 **/ 250 s32 ixgbe_get_san_mac_addr(struct ixgbe_hw *hw, u8 *san_mac_addr) 251 { 252 return ixgbe_call_func(hw, hw->mac.ops.get_san_mac_addr, 253 (hw, san_mac_addr), IXGBE_NOT_IMPLEMENTED); 254 } 255 256 /** 257 * ixgbe_set_san_mac_addr - Write a SAN MAC address 258 * @hw: pointer to hardware structure 259 * @san_mac_addr: SAN MAC address 260 * 261 * Writes A SAN MAC address to the EEPROM. 262 **/ 263 s32 ixgbe_set_san_mac_addr(struct ixgbe_hw *hw, u8 *san_mac_addr) 264 { 265 return ixgbe_call_func(hw, hw->mac.ops.set_san_mac_addr, 266 (hw, san_mac_addr), IXGBE_NOT_IMPLEMENTED); 267 } 268 269 /** 270 * ixgbe_get_device_caps - Get additional device capabilities 271 * @hw: pointer to hardware structure 272 * @device_caps: the EEPROM word for device capabilities 273 * 274 * Reads the extra device capabilities from the EEPROM 275 **/ 276 s32 ixgbe_get_device_caps(struct ixgbe_hw *hw, u16 *device_caps) 277 { 278 return ixgbe_call_func(hw, hw->mac.ops.get_device_caps, 279 (hw, device_caps), IXGBE_NOT_IMPLEMENTED); 280 } 281 282 /** 283 * ixgbe_get_wwn_prefix - Get alternative WWNN/WWPN prefix from the EEPROM 284 * @hw: pointer to hardware structure 285 * @wwnn_prefix: the alternative WWNN prefix 286 * @wwpn_prefix: the alternative WWPN prefix 287 * 288 * This function will read the EEPROM from the alternative SAN MAC address 289 * block to check the support for the alternative WWNN/WWPN prefix support. 290 **/ 291 s32 ixgbe_get_wwn_prefix(struct ixgbe_hw *hw, u16 *wwnn_prefix, 292 u16 *wwpn_prefix) 293 { 294 return ixgbe_call_func(hw, hw->mac.ops.get_wwn_prefix, 295 (hw, wwnn_prefix, wwpn_prefix), 296 IXGBE_NOT_IMPLEMENTED); 297 } 298 299 /** 300 * ixgbe_get_fcoe_boot_status - Get FCOE boot status from EEPROM 301 * @hw: pointer to hardware structure 302 * @bs: the fcoe boot status 303 * 304 * This function will read the FCOE boot status from the iSCSI FCOE block 305 **/ 306 s32 ixgbe_get_fcoe_boot_status(struct ixgbe_hw *hw, u16 *bs) 307 { 308 return ixgbe_call_func(hw, hw->mac.ops.get_fcoe_boot_status, 309 (hw, bs), 310 IXGBE_NOT_IMPLEMENTED); 311 } 312 313 /** 314 * ixgbe_get_bus_info - Set PCI bus info 315 * @hw: pointer to hardware structure 316 * 317 * Sets the PCI bus info (speed, width, type) within the ixgbe_hw structure 318 **/ 319 s32 ixgbe_get_bus_info(struct ixgbe_hw *hw) 320 { 321 return ixgbe_call_func(hw, hw->mac.ops.get_bus_info, (hw), 322 IXGBE_NOT_IMPLEMENTED); 323 } 324 325 /** 326 * ixgbe_get_num_of_tx_queues - Get Tx queues 327 * @hw: pointer to hardware structure 328 * 329 * Returns the number of transmit queues for the given adapter. 330 **/ 331 u32 ixgbe_get_num_of_tx_queues(struct ixgbe_hw *hw) 332 { 333 return hw->mac.max_tx_queues; 334 } 335 336 /** 337 * ixgbe_get_num_of_rx_queues - Get Rx queues 338 * @hw: pointer to hardware structure 339 * 340 * Returns the number of receive queues for the given adapter. 341 **/ 342 u32 ixgbe_get_num_of_rx_queues(struct ixgbe_hw *hw) 343 { 344 return hw->mac.max_rx_queues; 345 } 346 347 /** 348 * ixgbe_stop_adapter - Disable Rx/Tx units 349 * @hw: pointer to hardware structure 350 * 351 * Sets the adapter_stopped flag within ixgbe_hw struct. Clears interrupts, 352 * disables transmit and receive units. The adapter_stopped flag is used by 353 * the shared code and drivers to determine if the adapter is in a stopped 354 * state and should not touch the hardware. 355 **/ 356 s32 ixgbe_stop_adapter(struct ixgbe_hw *hw) 357 { 358 return ixgbe_call_func(hw, hw->mac.ops.stop_adapter, (hw), 359 IXGBE_NOT_IMPLEMENTED); 360 } 361 362 /** 363 * ixgbe_read_pba_string - Reads part number string from EEPROM 364 * @hw: pointer to hardware structure 365 * @pba_num: stores the part number string from the EEPROM 366 * @pba_num_size: part number string buffer length 367 * 368 * Reads the part number string from the EEPROM. 369 **/ 370 s32 ixgbe_read_pba_string(struct ixgbe_hw *hw, u8 *pba_num, u32 pba_num_size) 371 { 372 return ixgbe_read_pba_string_generic(hw, pba_num, pba_num_size); 373 } 374 375 /** 376 * ixgbe_read_pba_num - Reads part number from EEPROM 377 * @hw: pointer to hardware structure 378 * @pba_num: stores the part number from the EEPROM 379 * 380 * Reads the part number from the EEPROM. 381 **/ 382 s32 ixgbe_read_pba_num(struct ixgbe_hw *hw, u32 *pba_num) 383 { 384 return ixgbe_read_pba_num_generic(hw, pba_num); 385 } 386 387 /** 388 * ixgbe_identify_phy - Get PHY type 389 * @hw: pointer to hardware structure 390 * 391 * Determines the physical layer module found on the current adapter. 392 **/ 393 s32 ixgbe_identify_phy(struct ixgbe_hw *hw) 394 { 395 s32 status = IXGBE_SUCCESS; 396 397 if (hw->phy.type == ixgbe_phy_unknown) { 398 status = ixgbe_call_func(hw, hw->phy.ops.identify, (hw), 399 IXGBE_NOT_IMPLEMENTED); 400 } 401 402 return status; 403 } 404 405 /** 406 * ixgbe_reset_phy - Perform a PHY reset 407 * @hw: pointer to hardware structure 408 **/ 409 s32 ixgbe_reset_phy(struct ixgbe_hw *hw) 410 { 411 s32 status = IXGBE_SUCCESS; 412 413 if (hw->phy.type == ixgbe_phy_unknown) { 414 if (ixgbe_identify_phy(hw) != IXGBE_SUCCESS) 415 status = IXGBE_ERR_PHY; 416 } 417 418 if (status == IXGBE_SUCCESS) { 419 status = ixgbe_call_func(hw, hw->phy.ops.reset, (hw), 420 IXGBE_NOT_IMPLEMENTED); 421 } 422 return status; 423 } 424 425 /** 426 * ixgbe_get_phy_firmware_version - 427 * @hw: pointer to hardware structure 428 * @firmware_version: pointer to firmware version 429 **/ 430 s32 ixgbe_get_phy_firmware_version(struct ixgbe_hw *hw, u16 *firmware_version) 431 { 432 s32 status = IXGBE_SUCCESS; 433 434 status = ixgbe_call_func(hw, hw->phy.ops.get_firmware_version, 435 (hw, firmware_version), 436 IXGBE_NOT_IMPLEMENTED); 437 return status; 438 } 439 440 /** 441 * ixgbe_read_phy_reg - Read PHY register 442 * @hw: pointer to hardware structure 443 * @reg_addr: 32 bit address of PHY register to read 444 * @phy_data: Pointer to read data from PHY register 445 * 446 * Reads a value from a specified PHY register 447 **/ 448 s32 ixgbe_read_phy_reg(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type, 449 u16 *phy_data) 450 { 451 if (hw->phy.id == 0) 452 ixgbe_identify_phy(hw); 453 454 return ixgbe_call_func(hw, hw->phy.ops.read_reg, (hw, reg_addr, 455 device_type, phy_data), IXGBE_NOT_IMPLEMENTED); 456 } 457 458 /** 459 * ixgbe_write_phy_reg - Write PHY register 460 * @hw: pointer to hardware structure 461 * @reg_addr: 32 bit PHY register to write 462 * @phy_data: Data to write to the PHY register 463 * 464 * Writes a value to specified PHY register 465 **/ 466 s32 ixgbe_write_phy_reg(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type, 467 u16 phy_data) 468 { 469 if (hw->phy.id == 0) 470 ixgbe_identify_phy(hw); 471 472 return ixgbe_call_func(hw, hw->phy.ops.write_reg, (hw, reg_addr, 473 device_type, phy_data), IXGBE_NOT_IMPLEMENTED); 474 } 475 476 /** 477 * ixgbe_setup_phy_link - Restart PHY autoneg 478 * @hw: pointer to hardware structure 479 * 480 * Restart autonegotiation and PHY and waits for completion. 481 **/ 482 s32 ixgbe_setup_phy_link(struct ixgbe_hw *hw) 483 { 484 return ixgbe_call_func(hw, hw->phy.ops.setup_link, (hw), 485 IXGBE_NOT_IMPLEMENTED); 486 } 487 488 /** 489 * ixgbe_check_phy_link - Determine link and speed status 490 * @hw: pointer to hardware structure 491 * 492 * Reads a PHY register to determine if link is up and the current speed for 493 * the PHY. 494 **/ 495 s32 ixgbe_check_phy_link(struct ixgbe_hw *hw, ixgbe_link_speed *speed, 496 bool *link_up) 497 { 498 return ixgbe_call_func(hw, hw->phy.ops.check_link, (hw, speed, 499 link_up), IXGBE_NOT_IMPLEMENTED); 500 } 501 502 /** 503 * ixgbe_setup_phy_link_speed - Set auto advertise 504 * @hw: pointer to hardware structure 505 * @speed: new link speed 506 * @autoneg: TRUE if autonegotiation enabled 507 * 508 * Sets the auto advertised capabilities 509 **/ 510 s32 ixgbe_setup_phy_link_speed(struct ixgbe_hw *hw, ixgbe_link_speed speed, 511 bool autoneg, 512 bool autoneg_wait_to_complete) 513 { 514 return ixgbe_call_func(hw, hw->phy.ops.setup_link_speed, (hw, speed, 515 autoneg, autoneg_wait_to_complete), 516 IXGBE_NOT_IMPLEMENTED); 517 } 518 519 /** 520 * ixgbe_check_link - Get link and speed status 521 * @hw: pointer to hardware structure 522 * 523 * Reads the links register to determine if link is up and the current speed 524 **/ 525 s32 ixgbe_check_link(struct ixgbe_hw *hw, ixgbe_link_speed *speed, 526 bool *link_up, bool link_up_wait_to_complete) 527 { 528 return ixgbe_call_func(hw, hw->mac.ops.check_link, (hw, speed, 529 link_up, link_up_wait_to_complete), 530 IXGBE_NOT_IMPLEMENTED); 531 } 532 533 /** 534 * ixgbe_disable_tx_laser - Disable Tx laser 535 * @hw: pointer to hardware structure 536 * 537 * If the driver needs to disable the laser on SFI optics. 538 **/ 539 void ixgbe_disable_tx_laser(struct ixgbe_hw *hw) 540 { 541 if (hw->mac.ops.disable_tx_laser) 542 hw->mac.ops.disable_tx_laser(hw); 543 } 544 545 /** 546 * ixgbe_enable_tx_laser - Enable Tx laser 547 * @hw: pointer to hardware structure 548 * 549 * If the driver needs to enable the laser on SFI optics. 550 **/ 551 void ixgbe_enable_tx_laser(struct ixgbe_hw *hw) 552 { 553 if (hw->mac.ops.enable_tx_laser) 554 hw->mac.ops.enable_tx_laser(hw); 555 } 556 557 /** 558 * ixgbe_flap_tx_laser - flap Tx laser to start autotry process 559 * @hw: pointer to hardware structure 560 * 561 * When the driver changes the link speeds that it can support then 562 * flap the tx laser to alert the link partner to start autotry 563 * process on its end. 564 **/ 565 void ixgbe_flap_tx_laser(struct ixgbe_hw *hw) 566 { 567 if (hw->mac.ops.flap_tx_laser) 568 hw->mac.ops.flap_tx_laser(hw); 569 } 570 571 /** 572 * ixgbe_setup_link - Set link speed 573 * @hw: pointer to hardware structure 574 * @speed: new link speed 575 * @autoneg: TRUE if autonegotiation enabled 576 * 577 * Configures link settings. Restarts the link. 578 * Performs autonegotiation if needed. 579 **/ 580 s32 ixgbe_setup_link(struct ixgbe_hw *hw, ixgbe_link_speed speed, 581 bool autoneg, 582 bool autoneg_wait_to_complete) 583 { 584 return ixgbe_call_func(hw, hw->mac.ops.setup_link, (hw, speed, 585 autoneg, autoneg_wait_to_complete), 586 IXGBE_NOT_IMPLEMENTED); 587 } 588 589 /** 590 * ixgbe_get_link_capabilities - Returns link capabilities 591 * @hw: pointer to hardware structure 592 * 593 * Determines the link capabilities of the current configuration. 594 **/ 595 s32 ixgbe_get_link_capabilities(struct ixgbe_hw *hw, ixgbe_link_speed *speed, 596 bool *autoneg) 597 { 598 return ixgbe_call_func(hw, hw->mac.ops.get_link_capabilities, (hw, 599 speed, autoneg), IXGBE_NOT_IMPLEMENTED); 600 } 601 602 /** 603 * ixgbe_led_on - Turn on LEDs 604 * @hw: pointer to hardware structure 605 * @index: led number to turn on 606 * 607 * Turns on the software controllable LEDs. 608 **/ 609 s32 ixgbe_led_on(struct ixgbe_hw *hw, u32 index) 610 { 611 return ixgbe_call_func(hw, hw->mac.ops.led_on, (hw, index), 612 IXGBE_NOT_IMPLEMENTED); 613 } 614 615 /** 616 * ixgbe_led_off - Turn off LEDs 617 * @hw: pointer to hardware structure 618 * @index: led number to turn off 619 * 620 * Turns off the software controllable LEDs. 621 **/ 622 s32 ixgbe_led_off(struct ixgbe_hw *hw, u32 index) 623 { 624 return ixgbe_call_func(hw, hw->mac.ops.led_off, (hw, index), 625 IXGBE_NOT_IMPLEMENTED); 626 } 627 628 /** 629 * ixgbe_blink_led_start - Blink LEDs 630 * @hw: pointer to hardware structure 631 * @index: led number to blink 632 * 633 * Blink LED based on index. 634 **/ 635 s32 ixgbe_blink_led_start(struct ixgbe_hw *hw, u32 index) 636 { 637 return ixgbe_call_func(hw, hw->mac.ops.blink_led_start, (hw, index), 638 IXGBE_NOT_IMPLEMENTED); 639 } 640 641 /** 642 * ixgbe_blink_led_stop - Stop blinking LEDs 643 * @hw: pointer to hardware structure 644 * 645 * Stop blinking LED based on index. 646 **/ 647 s32 ixgbe_blink_led_stop(struct ixgbe_hw *hw, u32 index) 648 { 649 return ixgbe_call_func(hw, hw->mac.ops.blink_led_stop, (hw, index), 650 IXGBE_NOT_IMPLEMENTED); 651 } 652 653 /** 654 * ixgbe_init_eeprom_params - Initialize EEPROM parameters 655 * @hw: pointer to hardware structure 656 * 657 * Initializes the EEPROM parameters ixgbe_eeprom_info within the 658 * ixgbe_hw struct in order to set up EEPROM access. 659 **/ 660 s32 ixgbe_init_eeprom_params(struct ixgbe_hw *hw) 661 { 662 return ixgbe_call_func(hw, hw->eeprom.ops.init_params, (hw), 663 IXGBE_NOT_IMPLEMENTED); 664 } 665 666 667 /** 668 * ixgbe_write_eeprom - Write word to EEPROM 669 * @hw: pointer to hardware structure 670 * @offset: offset within the EEPROM to be written to 671 * @data: 16 bit word to be written to the EEPROM 672 * 673 * Writes 16 bit value to EEPROM. If ixgbe_eeprom_update_checksum is not 674 * called after this function, the EEPROM will most likely contain an 675 * invalid checksum. 676 **/ 677 s32 ixgbe_write_eeprom(struct ixgbe_hw *hw, u16 offset, u16 data) 678 { 679 return ixgbe_call_func(hw, hw->eeprom.ops.write, (hw, offset, data), 680 IXGBE_NOT_IMPLEMENTED); 681 } 682 683 /** 684 * ixgbe_write_eeprom_buffer - Write word(s) to EEPROM 685 * @hw: pointer to hardware structure 686 * @offset: offset within the EEPROM to be written to 687 * @data: 16 bit word(s) to be written to the EEPROM 688 * @words: number of words 689 * 690 * Writes 16 bit word(s) to EEPROM. If ixgbe_eeprom_update_checksum is not 691 * called after this function, the EEPROM will most likely contain an 692 * invalid checksum. 693 **/ 694 s32 ixgbe_write_eeprom_buffer(struct ixgbe_hw *hw, u16 offset, u16 words, 695 u16 *data) 696 { 697 return ixgbe_call_func(hw, hw->eeprom.ops.write_buffer, 698 (hw, offset, words, data), 699 IXGBE_NOT_IMPLEMENTED); 700 } 701 702 /** 703 * ixgbe_read_eeprom - Read word from EEPROM 704 * @hw: pointer to hardware structure 705 * @offset: offset within the EEPROM to be read 706 * @data: read 16 bit value from EEPROM 707 * 708 * Reads 16 bit value from EEPROM 709 **/ 710 s32 ixgbe_read_eeprom(struct ixgbe_hw *hw, u16 offset, u16 *data) 711 { 712 return ixgbe_call_func(hw, hw->eeprom.ops.read, (hw, offset, data), 713 IXGBE_NOT_IMPLEMENTED); 714 } 715 716 /** 717 * ixgbe_read_eeprom_buffer - Read word(s) from EEPROM 718 * @hw: pointer to hardware structure 719 * @offset: offset within the EEPROM to be read 720 * @data: read 16 bit word(s) from EEPROM 721 * @words: number of words 722 * 723 * Reads 16 bit word(s) from EEPROM 724 **/ 725 s32 ixgbe_read_eeprom_buffer(struct ixgbe_hw *hw, u16 offset, 726 u16 words, u16 *data) 727 { 728 return ixgbe_call_func(hw, hw->eeprom.ops.read_buffer, 729 (hw, offset, words, data), 730 IXGBE_NOT_IMPLEMENTED); 731 } 732 733 /** 734 * ixgbe_validate_eeprom_checksum - Validate EEPROM checksum 735 * @hw: pointer to hardware structure 736 * @checksum_val: calculated checksum 737 * 738 * Performs checksum calculation and validates the EEPROM checksum 739 **/ 740 s32 ixgbe_validate_eeprom_checksum(struct ixgbe_hw *hw, u16 *checksum_val) 741 { 742 return ixgbe_call_func(hw, hw->eeprom.ops.validate_checksum, 743 (hw, checksum_val), IXGBE_NOT_IMPLEMENTED); 744 } 745 746 /** 747 * ixgbe_eeprom_update_checksum - Updates the EEPROM checksum 748 * @hw: pointer to hardware structure 749 **/ 750 s32 ixgbe_update_eeprom_checksum(struct ixgbe_hw *hw) 751 { 752 return ixgbe_call_func(hw, hw->eeprom.ops.update_checksum, (hw), 753 IXGBE_NOT_IMPLEMENTED); 754 } 755 756 /** 757 * ixgbe_insert_mac_addr - Find a RAR for this mac address 758 * @hw: pointer to hardware structure 759 * @addr: Address to put into receive address register 760 * @vmdq: VMDq pool to assign 761 * 762 * Puts an ethernet address into a receive address register, or 763 * finds the rar that it is aleady in; adds to the pool list 764 **/ 765 s32 ixgbe_insert_mac_addr(struct ixgbe_hw *hw, u8 *addr, u32 vmdq) 766 { 767 return ixgbe_call_func(hw, hw->mac.ops.insert_mac_addr, 768 (hw, addr, vmdq), 769 IXGBE_NOT_IMPLEMENTED); 770 } 771 772 /** 773 * ixgbe_set_rar - Set Rx address register 774 * @hw: pointer to hardware structure 775 * @index: Receive address register to write 776 * @addr: Address to put into receive address register 777 * @vmdq: VMDq "set" 778 * @enable_addr: set flag that address is active 779 * 780 * Puts an ethernet address into a receive address register. 781 **/ 782 s32 ixgbe_set_rar(struct ixgbe_hw *hw, u32 index, u8 *addr, u32 vmdq, 783 u32 enable_addr) 784 { 785 return ixgbe_call_func(hw, hw->mac.ops.set_rar, (hw, index, addr, vmdq, 786 enable_addr), IXGBE_NOT_IMPLEMENTED); 787 } 788 789 /** 790 * ixgbe_clear_rar - Clear Rx address register 791 * @hw: pointer to hardware structure 792 * @index: Receive address register to write 793 * 794 * Puts an ethernet address into a receive address register. 795 **/ 796 s32 ixgbe_clear_rar(struct ixgbe_hw *hw, u32 index) 797 { 798 return ixgbe_call_func(hw, hw->mac.ops.clear_rar, (hw, index), 799 IXGBE_NOT_IMPLEMENTED); 800 } 801 802 /** 803 * ixgbe_set_vmdq - Associate a VMDq index with a receive address 804 * @hw: pointer to hardware structure 805 * @rar: receive address register index to associate with VMDq index 806 * @vmdq: VMDq set or pool index 807 **/ 808 s32 ixgbe_set_vmdq(struct ixgbe_hw *hw, u32 rar, u32 vmdq) 809 { 810 return ixgbe_call_func(hw, hw->mac.ops.set_vmdq, (hw, rar, vmdq), 811 IXGBE_NOT_IMPLEMENTED); 812 813 } 814 815 /** 816 * ixgbe_set_vmdq_san_mac - Associate VMDq index 127 with a receive address 817 * @hw: pointer to hardware structure 818 * @vmdq: VMDq default pool index 819 **/ 820 s32 ixgbe_set_vmdq_san_mac(struct ixgbe_hw *hw, u32 vmdq) 821 { 822 return ixgbe_call_func(hw, hw->mac.ops.set_vmdq_san_mac, 823 (hw, vmdq), IXGBE_NOT_IMPLEMENTED); 824 } 825 826 /** 827 * ixgbe_clear_vmdq - Disassociate a VMDq index from a receive address 828 * @hw: pointer to hardware structure 829 * @rar: receive address register index to disassociate with VMDq index 830 * @vmdq: VMDq set or pool index 831 **/ 832 s32 ixgbe_clear_vmdq(struct ixgbe_hw *hw, u32 rar, u32 vmdq) 833 { 834 return ixgbe_call_func(hw, hw->mac.ops.clear_vmdq, (hw, rar, vmdq), 835 IXGBE_NOT_IMPLEMENTED); 836 } 837 838 /** 839 * ixgbe_init_rx_addrs - Initializes receive address filters. 840 * @hw: pointer to hardware structure 841 * 842 * Places the MAC address in receive address register 0 and clears the rest 843 * of the receive address registers. Clears the multicast table. Assumes 844 * the receiver is in reset when the routine is called. 845 **/ 846 s32 ixgbe_init_rx_addrs(struct ixgbe_hw *hw) 847 { 848 return ixgbe_call_func(hw, hw->mac.ops.init_rx_addrs, (hw), 849 IXGBE_NOT_IMPLEMENTED); 850 } 851 852 /** 853 * ixgbe_get_num_rx_addrs - Returns the number of RAR entries. 854 * @hw: pointer to hardware structure 855 **/ 856 u32 ixgbe_get_num_rx_addrs(struct ixgbe_hw *hw) 857 { 858 return hw->mac.num_rar_entries; 859 } 860 861 /** 862 * ixgbe_update_uc_addr_list - Updates the MAC's list of secondary addresses 863 * @hw: pointer to hardware structure 864 * @addr_list: the list of new multicast addresses 865 * @addr_count: number of addresses 866 * @func: iterator function to walk the multicast address list 867 * 868 * The given list replaces any existing list. Clears the secondary addrs from 869 * receive address registers. Uses unused receive address registers for the 870 * first secondary addresses, and falls back to promiscuous mode as needed. 871 **/ 872 s32 ixgbe_update_uc_addr_list(struct ixgbe_hw *hw, u8 *addr_list, 873 u32 addr_count, ixgbe_mc_addr_itr func) 874 { 875 return ixgbe_call_func(hw, hw->mac.ops.update_uc_addr_list, (hw, 876 addr_list, addr_count, func), 877 IXGBE_NOT_IMPLEMENTED); 878 } 879 880 /** 881 * ixgbe_update_mc_addr_list - Updates the MAC's list of multicast addresses 882 * @hw: pointer to hardware structure 883 * @mc_addr_list: the list of new multicast addresses 884 * @mc_addr_count: number of addresses 885 * @func: iterator function to walk the multicast address list 886 * 887 * The given list replaces any existing list. Clears the MC addrs from receive 888 * address registers and the multicast table. Uses unused receive address 889 * registers for the first multicast addresses, and hashes the rest into the 890 * multicast table. 891 **/ 892 s32 ixgbe_update_mc_addr_list(struct ixgbe_hw *hw, u8 *mc_addr_list, 893 u32 mc_addr_count, ixgbe_mc_addr_itr func, 894 bool clear) 895 { 896 return ixgbe_call_func(hw, hw->mac.ops.update_mc_addr_list, (hw, 897 mc_addr_list, mc_addr_count, func, clear), 898 IXGBE_NOT_IMPLEMENTED); 899 } 900 901 /** 902 * ixgbe_enable_mc - Enable multicast address in RAR 903 * @hw: pointer to hardware structure 904 * 905 * Enables multicast address in RAR and the use of the multicast hash table. 906 **/ 907 s32 ixgbe_enable_mc(struct ixgbe_hw *hw) 908 { 909 return ixgbe_call_func(hw, hw->mac.ops.enable_mc, (hw), 910 IXGBE_NOT_IMPLEMENTED); 911 } 912 913 /** 914 * ixgbe_disable_mc - Disable multicast address in RAR 915 * @hw: pointer to hardware structure 916 * 917 * Disables multicast address in RAR and the use of the multicast hash table. 918 **/ 919 s32 ixgbe_disable_mc(struct ixgbe_hw *hw) 920 { 921 return ixgbe_call_func(hw, hw->mac.ops.disable_mc, (hw), 922 IXGBE_NOT_IMPLEMENTED); 923 } 924 925 /** 926 * ixgbe_clear_vfta - Clear VLAN filter table 927 * @hw: pointer to hardware structure 928 * 929 * Clears the VLAN filer table, and the VMDq index associated with the filter 930 **/ 931 s32 ixgbe_clear_vfta(struct ixgbe_hw *hw) 932 { 933 return ixgbe_call_func(hw, hw->mac.ops.clear_vfta, (hw), 934 IXGBE_NOT_IMPLEMENTED); 935 } 936 937 /** 938 * ixgbe_set_vfta - Set VLAN filter table 939 * @hw: pointer to hardware structure 940 * @vlan: VLAN id to write to VLAN filter 941 * @vind: VMDq output index that maps queue to VLAN id in VFTA 942 * @vlan_on: boolean flag to turn on/off VLAN in VFTA 943 * 944 * Turn on/off specified VLAN in the VLAN filter table. 945 **/ 946 s32 ixgbe_set_vfta(struct ixgbe_hw *hw, u32 vlan, u32 vind, bool vlan_on) 947 { 948 return ixgbe_call_func(hw, hw->mac.ops.set_vfta, (hw, vlan, vind, 949 vlan_on), IXGBE_NOT_IMPLEMENTED); 950 } 951 952 /** 953 * ixgbe_set_vlvf - Set VLAN Pool Filter 954 * @hw: pointer to hardware structure 955 * @vlan: VLAN id to write to VLAN filter 956 * @vind: VMDq output index that maps queue to VLAN id in VFVFB 957 * @vlan_on: boolean flag to turn on/off VLAN in VFVF 958 * @vfta_changed: pointer to boolean flag which indicates whether VFTA 959 * should be changed 960 * 961 * Turn on/off specified bit in VLVF table. 962 **/ 963 s32 ixgbe_set_vlvf(struct ixgbe_hw *hw, u32 vlan, u32 vind, bool vlan_on, 964 bool *vfta_changed) 965 { 966 return ixgbe_call_func(hw, hw->mac.ops.set_vlvf, (hw, vlan, vind, 967 vlan_on, vfta_changed), IXGBE_NOT_IMPLEMENTED); 968 } 969 970 /** 971 * ixgbe_fc_enable - Enable flow control 972 * @hw: pointer to hardware structure 973 * 974 * Configures the flow control settings based on SW configuration. 975 **/ 976 s32 ixgbe_fc_enable(struct ixgbe_hw *hw) 977 { 978 return ixgbe_call_func(hw, hw->mac.ops.fc_enable, (hw), 979 IXGBE_NOT_IMPLEMENTED); 980 } 981 982 /** 983 * ixgbe_set_fw_drv_ver - Try to send the driver version number FW 984 * @hw: pointer to hardware structure 985 * @maj: driver major number to be sent to firmware 986 * @min: driver minor number to be sent to firmware 987 * @build: driver build number to be sent to firmware 988 * @ver: driver version number to be sent to firmware 989 **/ 990 s32 ixgbe_set_fw_drv_ver(struct ixgbe_hw *hw, u8 maj, u8 min, u8 build, 991 u8 ver) 992 { 993 return ixgbe_call_func(hw, hw->mac.ops.set_fw_drv_ver, (hw, maj, min, 994 build, ver), IXGBE_NOT_IMPLEMENTED); 995 } 996 997 998 /** 999 * ixgbe_read_analog_reg8 - Reads 8 bit analog register 1000 * @hw: pointer to hardware structure 1001 * @reg: analog register to read 1002 * @val: read value 1003 * 1004 * Performs write operation to analog register specified. 1005 **/ 1006 s32 ixgbe_read_analog_reg8(struct ixgbe_hw *hw, u32 reg, u8 *val) 1007 { 1008 return ixgbe_call_func(hw, hw->mac.ops.read_analog_reg8, (hw, reg, 1009 val), IXGBE_NOT_IMPLEMENTED); 1010 } 1011 1012 /** 1013 * ixgbe_write_analog_reg8 - Writes 8 bit analog register 1014 * @hw: pointer to hardware structure 1015 * @reg: analog register to write 1016 * @val: value to write 1017 * 1018 * Performs write operation to Atlas analog register specified. 1019 **/ 1020 s32 ixgbe_write_analog_reg8(struct ixgbe_hw *hw, u32 reg, u8 val) 1021 { 1022 return ixgbe_call_func(hw, hw->mac.ops.write_analog_reg8, (hw, reg, 1023 val), IXGBE_NOT_IMPLEMENTED); 1024 } 1025 1026 /** 1027 * ixgbe_init_uta_tables - Initializes Unicast Table Arrays. 1028 * @hw: pointer to hardware structure 1029 * 1030 * Initializes the Unicast Table Arrays to zero on device load. This 1031 * is part of the Rx init addr execution path. 1032 **/ 1033 s32 ixgbe_init_uta_tables(struct ixgbe_hw *hw) 1034 { 1035 return ixgbe_call_func(hw, hw->mac.ops.init_uta_tables, (hw), 1036 IXGBE_NOT_IMPLEMENTED); 1037 } 1038 1039 /** 1040 * ixgbe_read_i2c_byte - Reads 8 bit word over I2C at specified device address 1041 * @hw: pointer to hardware structure 1042 * @byte_offset: byte offset to read 1043 * @data: value read 1044 * 1045 * Performs byte read operation to SFP module's EEPROM over I2C interface. 1046 **/ 1047 s32 ixgbe_read_i2c_byte(struct ixgbe_hw *hw, u8 byte_offset, u8 dev_addr, 1048 u8 *data) 1049 { 1050 return ixgbe_call_func(hw, hw->phy.ops.read_i2c_byte, (hw, byte_offset, 1051 dev_addr, data), IXGBE_NOT_IMPLEMENTED); 1052 } 1053 1054 /** 1055 * ixgbe_write_i2c_byte - Writes 8 bit word over I2C 1056 * @hw: pointer to hardware structure 1057 * @byte_offset: byte offset to write 1058 * @data: value to write 1059 * 1060 * Performs byte write operation to SFP module's EEPROM over I2C interface 1061 * at a specified device address. 1062 **/ 1063 s32 ixgbe_write_i2c_byte(struct ixgbe_hw *hw, u8 byte_offset, u8 dev_addr, 1064 u8 data) 1065 { 1066 return ixgbe_call_func(hw, hw->phy.ops.write_i2c_byte, (hw, byte_offset, 1067 dev_addr, data), IXGBE_NOT_IMPLEMENTED); 1068 } 1069 1070 /** 1071 * ixgbe_write_i2c_eeprom - Writes 8 bit EEPROM word over I2C interface 1072 * @hw: pointer to hardware structure 1073 * @byte_offset: EEPROM byte offset to write 1074 * @eeprom_data: value to write 1075 * 1076 * Performs byte write operation to SFP module's EEPROM over I2C interface. 1077 **/ 1078 s32 ixgbe_write_i2c_eeprom(struct ixgbe_hw *hw, 1079 u8 byte_offset, u8 eeprom_data) 1080 { 1081 return ixgbe_call_func(hw, hw->phy.ops.write_i2c_eeprom, 1082 (hw, byte_offset, eeprom_data), 1083 IXGBE_NOT_IMPLEMENTED); 1084 } 1085 1086 /** 1087 * ixgbe_read_i2c_eeprom - Reads 8 bit EEPROM word over I2C interface 1088 * @hw: pointer to hardware structure 1089 * @byte_offset: EEPROM byte offset to read 1090 * @eeprom_data: value read 1091 * 1092 * Performs byte read operation to SFP module's EEPROM over I2C interface. 1093 **/ 1094 s32 ixgbe_read_i2c_eeprom(struct ixgbe_hw *hw, u8 byte_offset, u8 *eeprom_data) 1095 { 1096 return ixgbe_call_func(hw, hw->phy.ops.read_i2c_eeprom, 1097 (hw, byte_offset, eeprom_data), 1098 IXGBE_NOT_IMPLEMENTED); 1099 } 1100 1101 /** 1102 * ixgbe_get_supported_physical_layer - Returns physical layer type 1103 * @hw: pointer to hardware structure 1104 * 1105 * Determines physical layer capabilities of the current configuration. 1106 **/ 1107 u32 ixgbe_get_supported_physical_layer(struct ixgbe_hw *hw) 1108 { 1109 return ixgbe_call_func(hw, hw->mac.ops.get_supported_physical_layer, 1110 (hw), IXGBE_PHYSICAL_LAYER_UNKNOWN); 1111 } 1112 1113 /** 1114 * ixgbe_enable_rx_dma - Enables Rx DMA unit, dependent on device specifics 1115 * @hw: pointer to hardware structure 1116 * @regval: bitfield to write to the Rx DMA register 1117 * 1118 * Enables the Rx DMA unit of the device. 1119 **/ 1120 s32 ixgbe_enable_rx_dma(struct ixgbe_hw *hw, u32 regval) 1121 { 1122 return ixgbe_call_func(hw, hw->mac.ops.enable_rx_dma, 1123 (hw, regval), IXGBE_NOT_IMPLEMENTED); 1124 } 1125 1126 /** 1127 * ixgbe_disable_sec_rx_path - Stops the receive data path 1128 * @hw: pointer to hardware structure 1129 * 1130 * Stops the receive data path. 1131 **/ 1132 s32 ixgbe_disable_sec_rx_path(struct ixgbe_hw *hw) 1133 { 1134 return ixgbe_call_func(hw, hw->mac.ops.disable_sec_rx_path, 1135 (hw), IXGBE_NOT_IMPLEMENTED); 1136 } 1137 1138 /** 1139 * ixgbe_enable_sec_rx_path - Enables the receive data path 1140 * @hw: pointer to hardware structure 1141 * 1142 * Enables the receive data path. 1143 **/ 1144 s32 ixgbe_enable_sec_rx_path(struct ixgbe_hw *hw) 1145 { 1146 return ixgbe_call_func(hw, hw->mac.ops.enable_sec_rx_path, 1147 (hw), IXGBE_NOT_IMPLEMENTED); 1148 } 1149 1150 /** 1151 * ixgbe_acquire_swfw_semaphore - Acquire SWFW semaphore 1152 * @hw: pointer to hardware structure 1153 * @mask: Mask to specify which semaphore to acquire 1154 * 1155 * Acquires the SWFW semaphore through SW_FW_SYNC register for the specified 1156 * function (CSR, PHY0, PHY1, EEPROM, Flash) 1157 **/ 1158 s32 ixgbe_acquire_swfw_semaphore(struct ixgbe_hw *hw, u16 mask) 1159 { 1160 return ixgbe_call_func(hw, hw->mac.ops.acquire_swfw_sync, 1161 (hw, mask), IXGBE_NOT_IMPLEMENTED); 1162 } 1163 1164 /** 1165 * ixgbe_release_swfw_semaphore - Release SWFW semaphore 1166 * @hw: pointer to hardware structure 1167 * @mask: Mask to specify which semaphore to release 1168 * 1169 * Releases the SWFW semaphore through SW_FW_SYNC register for the specified 1170 * function (CSR, PHY0, PHY1, EEPROM, Flash) 1171 **/ 1172 void ixgbe_release_swfw_semaphore(struct ixgbe_hw *hw, u16 mask) 1173 { 1174 if (hw->mac.ops.release_swfw_sync) 1175 hw->mac.ops.release_swfw_sync(hw, mask); 1176 } 1177 1178